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    • 2. 发明申请
    • INTERFACE CIRCUIT
    • 接口电路
    • WO2002089421A2
    • 2002-11-07
    • PCT/EP2002/004286
    • 2002-04-18
    • THOMSON LICENSING S.A.SCHWEIDLER, SiegfriedHAUPT, DieterGAEDKE, KlausBORSUM, MalteSCHÜTZE, Herbert
    • SCHWEIDLER, SiegfriedHAUPT, DieterGAEDKE, KlausBORSUM, MalteSCHÜTZE, Herbert
    • H04L12/46
    • H04L12/40091H04L12/4011H04L12/40117H04L12/4625H04L12/6418
    • The invention deals with a wireless extension of the IEEE 1394 bus. Considered is a scenario where two clustersof 1394 devices are linked to each other by means of a wireless bridge (9). The devices of one cluster shall communicate with devices of the other cluster without being bridge-aware. The wireless bridge, however, provides for a bus reset isolation. This causes a problem each time a bus reset occurs in one of the clusters. To solve this problem it is proposed to implement a buffer memory (22) for self-identification packets in the 1394 interfaces (11) of both boxes of said wireless bridge (9). In particular these buffer memories (22) shall be implemented in the physical layer section (21) of the 1394 interfaces (11). With these buffer memories the self-identification packets of the bus stations in the other cluster can be collected and they can easily be read out during the self-configuration phase of the network after a bus reset when the bus grant is assigned to the box of the wireless bridge that is also connected to the bus where the bus reset has occurred. The physical layer section of the 1394 interface transmits artificial self-identification packets for all bus stations of the other cluster so that data communication can continue without long delays.
    • 本发明涉及IEEE 1394总线的无线扩展。 被认为是一个场景,其中1394个设备的两个集群通过无线网桥彼此链接(9)。 一个集群的设备应与其他集群的设备进行通信,而不需要桥接。 然而,无线网桥提供总线复位隔离。 这会在每次集群中发生总线复位时产生问题。 为了解决这个问题,提出了在所述无线网桥(9)的两个盒子的1394接口(11)中实现用于自识别分组的缓冲存储器(22)。 特别地,这些缓冲存储器(22)应在1394接口(11)的物理层部分(21)中实现。 利用这些缓冲存储器,可以收集另一个集群中的总线站的自身识别分组,并且当总线授权分配给盒子的总线复位时,可以容易地在总线复位之后在网络的自配置阶段期间读出它们 也连接到总线复位发生的总线的无线网桥。 1394接口的物理层部分为其他集群的所有总线站发送人工自识别分组,以便数据通信可以不间断地延续。
    • 6. 发明申请
    • PHYSICAL LAYER CIRCUIT AND INTERFACE CIRCUIT
    • 物理层电路和接口电路
    • WO2003063432A1
    • 2003-07-31
    • PCT/EP2003/000203
    • 2003-01-11
    • THOMSON LICENSING S.A.HAUPT, DieterGAEDKE, KlausSCHWEIDLER, Siegfried
    • HAUPT, DieterGAEDKE, KlausSCHWEIDLER, Siegfried
    • H04L12/64
    • H04L12/40078H04L12/40091H04L12/4011H04L12/64
    • The invention deals with a physical layer circuit (21) for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge (9). The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory (22) for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit (21). The invention solves the problem by means of configuration means (24) in the physical layer circuit (21). These configuration means enable either to configure the physical layer circuit (21) as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID packets in said buffer memory (22) or else configuring the physical layer circuit (21) as a standard physical layer circuit that disables the buffering of said node-ID packets. The new type of physical layer circuit is pin compatible with a standard physical layer circuit.
    • 本发明涉及用于IEEE1394总线的物理层电路(21)。 被认为是一个场景,其中1394个设备的两个集群通过无线网桥彼此链接(9)。 一个集群的设备应与其他集群的设备进行通信,而不需要桥接。 在这种情况下,每个集群中存在两种不同类型的1394设备。 一个设备是桥接门户,并具有桥接功能。 群集中的所有其他1394设备将不具有桥接功能。 由于具有桥接功能的设备需要具有用于缓冲节点ID分组的特定缓冲存储器(22),通常存在不同类型的1394设备所需的两种不同类型的物理层电路。 本发明涉及如何实现在不同类型的1394设备中使用相同类型的物理层电路(21)的问题。 本发明通过物理层电路(21)中的配置装置(24)解决了这个问题。 这些配置意味着能够通过将所述节点ID分组缓冲在所述缓冲存储器(22)中来将物理层电路(21)配置为桥接门户物理层电路来支持桥接功能,或者将物理层电路(21)配置为 禁止所述节点ID分组的缓冲的标准物理层电路。 新型物理层电路与标准物理层电路引脚兼容。
    • 8. 发明公开
    • PHYSICAL LAYER CIRCUIT AND INTERFACE CIRCUIT
    • 电路的物理层和接口电路
    • EP1468534A1
    • 2004-10-20
    • EP03708053.8
    • 2003-01-11
    • Thomson Licensing S.A.
    • HAUPT, DieterGAEDKE, KlausSCHWEIDLER, Siegfried
    • H04L12/64
    • H04L12/40078H04L12/40091H04L12/4011H04L12/64
    • The invention deals with a physical layer circuit (21) for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge (9). The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory (22) for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit (21). The invention solves the problem by means of configuration means (24) in the physical layer circuit (21). These configuration means enable either to configure the physical layer circuit (21) as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID packets in said buffer memory (22) or else configuring the physical layer circuit (21) as a standard physical layer circuit that disables the buffering of said node-ID packets. The new type of physical layer circuit is pin compatible with a standard physical layer circuit.