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2. 发明授权

US06404243B1 System and method for controlling delay times in floating-body CMOSFET inverters 失效
标题翻译：用于控制浮体CMOSFET逆变器的延迟时间的系统和方法
公开(公告)号：US06404243B1
公开(公告)日：2002-06-11
申请号：US09759718
申请日：2001-01-12
申请人： Kenneth Koch, II , William Weiner
发明人： Kenneth Koch, II , William Weiner
IPC分类号： H03B2100
CPC分类号： H03K5/159 , H03K5/133 , H03K19/0013 , H03K19/01707 , H03K2005/00136
摘要： The present invention discloses a floating body architecture CMOSFET inverter with body biasing inverters added for controlling the delay time of the inverter. At least one body biasing inverter is connected between the main inverter's input and the body terminals of the FETs of the inverter. By supplying a representation of the input voltage to the body terminals of the p-channel and n-channel FETs, the preferred embodiment of the present invention is able to control the history dependent delay time associated with the variable source-to-body voltages in floating body CMOSFET inverters. The delay time is minimized by adding an odd number of body biasing inverter stages into the main inverter circuit. The delay time can also be maximized by adding an even number of body biasing inverter stages into the circuit.
摘要翻译：本发明公开了一种用于控制逆变器的延迟时间的体积偏置逆变器的浮体结构CMOSFET逆变器。在主逆变器的输入端和变频器的FET的主体端子之间连接有至少一个主体偏置逆变器。通过向p沟道和n沟道FET的体式端子提供输入电压的表示，本发明的优选实施例能够控制与可变源极对体电压相关联的与历史相关的延迟时间浮体CMOSFET逆变器。通过向主逆变器电路中添加奇数个体偏置反相器级来延迟时间被最小化。通过在电路中添加偶数个体偏置反相器级，延迟时间也可以最大化。

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