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1. 发明授权

US5678222A Modulation and frequency conversion by time sharing 失效
标题翻译：通过分时调制和频率转换
公开(公告)号：US5678222A
公开(公告)日：1997-10-14
申请号：US321501
申请日：1994-10-12
申请人： Thomas Hornak , Andrew Z. Grzegorek , William J. McFarland , Richard C. Walker , Scott D. Willingham
发明人： Thomas Hornak , Andrew Z. Grzegorek , William J. McFarland , Richard C. Walker , Scott D. Willingham
IPC分类号： H04L27/34 , H03B19/00 , H03B27/00 , H03D7/00 , H03D7/14 , H03D7/16 , H03D7/18 , H04B1/10 , H04B1/26 , H04L27/18 , H04B1/16
CPC分类号： H03D7/00 , H03D7/1441 , H03D7/1483 , H03D7/165 , H03D7/18 , H03B19/00 , H03B2200/0064 , H03B27/00 , H03D2200/0017 , H03D2200/005 , H03D2200/006 , H03D2200/0078 , H03D2200/0082 , H03D7/161
摘要： A time-share mixer circuit and a frequency converter, an I-Q modulator, and an I-Q demodulator. A switching signal drives the time-share mixer circuit to alternate between two output signals. The first output signal represents the output of a mixer having a given signal input and a local oscillator signal with a first phase as its local oscillator input. The second output signal represents the output of the mixer having the same input signal and the local oscillator signal with a second phase that differs from the first phase by 90 degrees as its local oscillator input signal. The frequency converter uses the time-share mixer in combination with a switched output phase shifter that switches in sync with the phase of the local oscillator signal to generate a phase shifted output signal in which the time average of an undesired image signal is substantially reduced compared to time average of the desired signal. The phase shifted output signal is then amplified by a bandpass amplifier. A clocked inverter in series with one of the mixer ports provides improved performance by eliminating the need for two precisely phase-shifted local oscillator signals.
摘要翻译：时分混频器电路和频率转换器，I-Q调制器和I-Q解调器。开关信号驱动时间共享混频器电路在两个输出信号之间交替。第一输出信号表示具有给定信号输入的混频器的输出和具有第一相位的本地振荡器信号作为其本地振荡器输入。第二输出信号表示具有相同输入信号的混频器的输出和具有与第一相位相差90度的第二相位的本地振荡器信号作为其本地振荡器输入信号。变频器使用时间共享混频器与开关输出移相器组合，其切换与本地振荡器信号的相位同步，以产生相移输出信号，其中期望图像信号的时间平均值大大减少到期望信号的时间平均值。相移输出信号然后被带通放大器放大。与其中一个混频器端口串联的时钟反相器通过消除对两个精确相移的本地振荡器信号的需要而提高了性能。

2. 发明授权

US4791653A Pseudorandom word sequence synchronizer 失效
标题翻译：伪随机字序同步器
公开(公告)号：US4791653A
公开(公告)日：1988-12-13
申请号：US89291
申请日：1987-08-25
申请人： William J. McFarland , Richard C. Walker
发明人： William J. McFarland , Richard C. Walker
IPC分类号： H04L1/00 , C07C27/00 , C07C45/00 , C07C67/00 , H04J3/14 , H04L1/24 , H04L7/00 , H04L7/04
CPC分类号： H04L1/24 , H04J3/14 , H04L7/043
摘要： A bit-error-rate tester provides for testing of links with different numbers of channels without replacing or reconfiguring an included pseudorandom word sequence (PRWS) generator. The tester includes a transmitter and a receiver, each with generators for parallel evenly staggered pseudorandom bit sequence (PRBS) replicas collectively constituting the PRWS. The receiver generator is a copy of the transmitter generator so that it can predict the PRWS received from the transmitter. Comparators are provided so that incoming and locally generating sequences can be compared to determine bit error rates. Synchronization of the receiver generator is effected using a pattern detector coupled to at least one reception line. When a predetermined pattern is detected, an injector injects registers of the receiver generator with a predetermined bit pattern. Afterwards, the receiver generator autonomously generates its PRWS synchronously with the PRWS received from the transmitting generator. A further embodiment provides for rerouting of crossed transmission channels as well as synchronization. In either case, there is no requirement that all available channels be active to effect synchronization.

3. 发明授权

US5138287A High frequency common mode choke 失效
标题翻译：高频通用模式选择
公开(公告)号：US5138287A
公开(公告)日：1992-08-11
申请号：US522287
申请日：1990-05-11
申请人： John Domokos , Richard C. Walker , William J. McFarland
发明人： John Domokos , Richard C. Walker , William J. McFarland
IPC分类号： H01P1/16 , H01P5/00 , H01P5/10 , H01P5/12 , H01P5/18
CPC分类号： H01P5/12
摘要： A choke for reducing common mode signals in high frequency circuits. A microstrip transmission line includes a pair of conductors spaced above a ground plane conductor. In input and output regions the conductors are spaced relatively far apart from each other such that each conductor presents a characteristic impedance that is similar for common mode and for differential mode signals. Between the input and output regions the conductors are located much closes together such that they present different characteristic impedances to common mode and to differential mode signals so as to reflect the common mode signal but not the differential mode signal. In another version a hole in the ground plane beneath the conductors is partially occupied by a conductive island that is coupled to the ground plane through a resistance to absorb the common mode signal rather than reflecting it. Other versions are realized in a pair of parallel coaxial cables and in a coplanar transmission line.

4. 发明授权

US5438621A DC-free line code and bit and frame synchronization for arbitrary data transmission 失效
标题翻译：无需线路代码以及用于任意数据传输的位和帧同步
公开(公告)号：US5438621A
公开(公告)日：1995-08-01
申请号：US857924
申请日：1992-05-05
申请人： Thomas Hornak , Patrick Petruno , Richard C. Walker , Benny W. H. Lai , Chu-Sun Yen , Cheryl L. Stout , Jieh-Tsorng Wu
发明人： Thomas Hornak , Patrick Petruno , Richard C. Walker , Benny W. H. Lai , Chu-Sun Yen , Cheryl L. Stout , Jieh-Tsorng Wu
IPC分类号： H03M5/14 , H04J3/06 , H04J3/12 , H04L7/04 , H04L25/49
CPC分类号： H04J3/12 , H03M5/145 , H04J3/0602 , H04L25/4915 , H04L2007/045
摘要： A method of encoding data for transmission over a communication link. A cumulative polarity of previously-transmitted frames is maintained. A frame is prepared for transmission by combining a data word with a plurality of additional bits. The additional bits provide a master transition. A phantom bit is encoded in the additional bits. If the polarity of the frame is the same as the cumulative polarity, the data bits or in some instances all the bits are inverted so as to maintain balance. Control words and fill words are provided and are distinguished from data words by encoding the additional bits. Control words carry additional data or control instructions and are distinguished from fill words by the number of transitions. The phantom bit either conveys additional data or is used for such purposes as error checking.
摘要翻译： PCT No.PCT / US91 / 08483 Sec。 371日期：1992年5月5日 102（e）日期1992年5月5日PCT 1991年11月13日PCT PCT。出版物WO92 / 09162 日期：1992年5月29日。一种对通过通信链路传输的数据进行编码的方法。维持先前传输的帧的累积极性。通过组合数据字与多个附加位来准备用于发送的帧。附加位提供主转换。幻像位被编码在附加位中。如果帧的极性与累积极性相同，则数据位或在某些情况下所有位都被反转，以保持平衡。提供控制字和填充字，并通过编码附加位与数据字区分开。控制字携带附加数据或控制指令，并且通过转换次数与填充字区分开。幻影位传送附加数据或用于错误检查等目的。

5. 发明授权

US07259357B2 Electronically controlled sealing, unsealing and/or bonding with metal strip or wire coated with liquefiable substance for redundant application and tamper detection 失效
标题翻译：电子控制密封，开封和/或粘合金属带或涂有液化物质的电线，用于冗余应用和篡改检测
公开(公告)号：US07259357B2
公开(公告)日：2007-08-21
申请号：US10654992
申请日：2003-09-05
申请人： Richard C. Walker
发明人： Richard C. Walker
IPC分类号： H05B1/00 , B29C65/00 , C04B37/00
CPC分类号： B60R25/042 , B60R25/02 , B60R25/08 , B60R25/102 , B60R25/33 , B60R2325/205 , B60R2325/304 , B60T7/18 , B60T8/4266 , B60T8/4863 , B60W50/029 , B60W2550/402 , F02D41/021 , F02D41/042
摘要： The invention seals, unseals and/or bonds plastics, waxes and resins via a thermal metal strip or wire coated with liquefiable substances that melt to open or separate and cool to congeal, seal, vulcanize or bond together when the wire or strip is energized in a shorted state (to heat) or not energized (to cool). Electronic switch modalities and sealing applications are optionally taught for security and tamper detection. In one modality, a unique signal is sent to the gate leg of a micro-processing chip (e.g. an SCR switch) where firmware recognizes the signal and permits current through a thermal wire. This innovation is optionally employed for Homeland Security.
摘要翻译：本发明通过热金属带或涂覆有可液化物质的线密封，开封和/或粘合塑料，蜡和树脂，其在液体导电时被熔化以开启或分离并冷却以凝结，密封，硫化或粘合在一起短路状态（加热）或未通电（冷却）。电子开关模式和密封应用可选择用于安全和篡改检测。在一种模式中，唯一的信号被发送到微处理芯片（例如SCR开关）的门支脚，其中固件识别信号并允许电流通过热线。这项创新可选择用于国土安全。

6. 发明授权

US5498992A Unity gain positive feedback integrator with programmable charging currents and polarities 失效
标题翻译：具有可编程充电电流和极性的Unity增益正反馈积分器
公开(公告)号：US5498992A
公开(公告)日：1996-03-12
申请号：US358031
申请日：1994-12-14
申请人： Benny W. H. Lai , Richard C. Walker
发明人： Benny W. H. Lai , Richard C. Walker
IPC分类号： G06G7/184 , H03K4/58 , H03K4/52 , H03K4/56
CPC分类号： G06G7/184
摘要： An integrator includes a capacitor and a bootstrap circuit for detecting any leaking charge from the capacitor and replacing it. The integrator also includes a charge injection circuit for adjusting the charge applied to the capacitor in response to a digital control input to the charge injection circuit. The bootstrap circuit has two transistors to sense leaking charge, and two further transistors forming a differential pair. The bootstrap circuit uses positive feedback and unity gain to replenish the lost charge.
摘要翻译：积分器包括电容器和自举电路，用于检测来自电容器的任何泄漏电荷并将其替换。积分器还包括一个充电注入电路，用于响应于对电荷注入电路的数字控制输入来调节施加到电容器的电荷。自举电路具有两个用于检测泄漏电荷的晶体管，以及形成差分对的两个另外的晶体管。自举电路使用正反馈和统一增益来补充丢失的电荷。

7. 发明授权

US06862701B2 Data communication system with self-test facility 有权
标题翻译：具有自检设施的数据通信系统
公开(公告)号：US06862701B2
公开(公告)日：2005-03-01
申请号：US09801031
申请日：2001-03-06
申请人： Richard C. Walker , Patricia A. Thaler
发明人： Richard C. Walker , Patricia A. Thaler
IPC分类号： H04L12/26 , H04L1/24 , H04L29/14 , G01R31/28
CPC分类号： H04L1/244 , H04L1/203 , H04L1/241 , H04L1/242
摘要： Self testing of a data communication system that includes a presettable scrambler and a complementary presettable descrambler is performed by presetting the presettable scrambler to a preset state. A seed payload field is scrambled using the presettable scrambler to generate fields of a test sequence. The fields of the test sequence are transmitted and corresponding received test sequence fields are received. The received test sequence fields are descrambled using the presettable descrambler to generate respective recovered test sequence fields. Differences between the recovered test sequence fields and the seed payload field are then detected as errors. In an embodiment, the seed payload field and the preset state of the presettable scrambler are chosen to generate a test sequence that imposes a known stress, such as a given run length, to the data communication system.
摘要翻译：通过将预设的加扰器预设为预设状态来执行包括可预置的加扰器和互补预设解扰器的数据通信系统的自检。使用可预设扰频器对种子有效载荷字段进行加扰，以生成测试序列的字段。发送测试序列的字段并接收相应的接收到的测试序列字段。接收的测试序列字段使用可预设的解扰器进行解扰，以产生相应的恢复的测试序列字段。然后将恢复的测试序列字段和种子有效负载字段之间的差异检测为错误。在一个实施例中，选择种子有效载荷字段和预设的加扰器的预设状态以产生将已知应力（例如给定的行程长度）施加到数据通信系统的测试序列。

8. 发明授权

US06795064B2 Electro-optical material-based grey scale generating method 有权
标题翻译：基于光电材料的灰度生成方法
公开(公告)号：US06795064B2
公开(公告)日：2004-09-21
申请号：US09948732
申请日：2001-09-07
申请人： Richard C. Walker , Travis N. Blalock , Neela B. Gaddis
发明人： Richard C. Walker , Travis N. Blalock , Neela B. Gaddis
IPC分类号： G09G336
CPC分类号： G09G3/3688 , G09G3/2014 , G09G3/3651 , G09G3/3677 , G09G2300/0809 , G09G2300/0842 , G09G2310/0259 , G09G2320/0276
摘要： A grey scale is generated by modulating light in response to an information signal using an electro-optical material. An analog sample is derived from the information signal, a drive signal is generated in response to the analog sample and the drive signal is applied to the electro-optical material. The drive signal has a sequence of a first temporal portion and a second temporal portion. The first temporal portion has a temporal duration that has a pre-determined relationship to the analog sample, and the second temporal portion is the temporal complement of the first temporal portion.
摘要翻译：通过使用电光材料响应于信息信号调制光而产生灰度级。从信息信号导出模拟样本，响应于模拟样本产生驱动信号，并将驱动信号施加到电光材料上。驱动信号具有第一时间部分和第二时间部分的序列。第一时间部分具有与模拟样本具有预定关系的时间持续时间，并且第二时间部分是第一时间部分的时间补码。

9. 发明授权

US06760349B1 Multiplexer with channel sectioning, selectivity actuated current sources, and common-base amplifiers 有权
标题翻译：具有通道分段，选择性驱动电流源和公共基极放大器的多路复用器
公开(公告)号：US06760349B1
公开(公告)日：2004-07-06
申请号：US09654635
申请日：2000-09-05
申请人： Peter Ho , Graham M. Flower , Richard C. Walker
发明人： Peter Ho , Graham M. Flower , Richard C. Walker
IPC分类号： H04J302
CPC分类号： H04J3/047 , H03K17/6264
摘要： A multiplexer for use with switching apparatus for data communication networks. The multiplexer topology includes two or more groupings, or sections, each containing a plurality of individual channels. Each of the channels has an input buffer amplifier and an output Ft-doubler circuit. The outputs of all of the channels within a each particular channel section are connected in parallel relation, and fed to respective common-base transistor amplifiers. The outputs of all of the common-base amplifiers for each channel section, in turn, are connected in parallel and fed to the inputs of a pair of emitter-follower amplifiers. Through the use of selectively actuated current sources, each multiplexer channel is normally biased off, unless that channel is selected for a switching operation. Bleeder current sources are applied to the emitters of the common-base amplifiers to reduce output jitter from the channels which are biased off. The multiplexer architecture provides high speed operation from channel sectioning, and low power consumption by reducing both the amount of current drawn and the voltage potential necessary, to operate the multiplexer.
摘要翻译：一种用于数据通信网络的交换装置的多路复用器。复用器拓扑包括两个或更多个分组，每个分组包含多个单独的信道。每个通道都有一个输入缓冲放大器和一个输出Ft倍增电路。每个特定通道部分内的所有通道的输出以并联方式连接，并馈送到相应的公共基极晶体管放大器。每个通道部分的所有公共基极放大器的输出又并联连接并馈送到一对发射极跟随放大器的输入端。通过使用选择性激励的电流源，除非为切换操作选择了该通道，否则每个复用器通道通常被偏置。泄放电流源被施加到公共基极放大器的发射极，以减少偏置的通道的输出抖动。多路复用器架构通过减少所需的电流量和所需的电压来提供通道分段的高速操作和低功耗，以操作多路复用器。

10. 发明授权

US06359662B1 Method and system for compensating for defects in a multi-light valve display system 有权
标题翻译：用于补偿多光阀显示系统中的缺陷的方法和系统
公开(公告)号：US06359662B1
公开(公告)日：2002-03-19
申请号：US09435094
申请日：1999-11-05
申请人： Richard C. Walker
发明人： Richard C. Walker
IPC分类号： H04N574
CPC分类号： G09G3/3413 , G09G3/34 , G09G2310/0235 , G09G2330/08 , G09G2330/10
摘要： A method and system for compensating for defects in a multi-light valve display allows for the compensation of defective pixels in a display. By sequentially illuminating all light valves in a multi-light valve system with all colors, or wavelengths, available in the display, each light valve modulates the full gamut of colors available in the system. In this manner, the remaining light valves can compensate for a defective pixel in one of the light valves. The invention also includes an active compensation feature, whereby defective pixels in the display are identified and are compensated for by an associated display driver.
摘要翻译：用于补偿多光阀显示器中的缺陷的方法和系统允许补偿显示器中的缺陷像素。通过在显示器中可用的所有颜色或波长的多光阀系统中顺序照亮所有光阀，每个光阀调制系统中可用的全部颜色色域。以这种方式，剩余的光阀可以补偿其中一个光阀中的缺陷像素。本发明还包括有源补偿特征，由此显示器中的缺陷像素被识别并由相关的显示驱动器进行补偿。

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