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1. 发明申请

US20060291268A1 Intergrated semiconductor memory and method for producing an integrated semiconductor memory 有权
标题翻译：集成半导体存储器和集成半导体存储器的制造方法
公开(公告)号：US20060291268A1
公开(公告)日：2006-12-28
申请号：US11441805
申请日：2006-05-26
申请人： Thomas Happ , Cay-Uwe Pinnow , Ralf Symanczyk , Klaus-Dieter Ufert
发明人： Thomas Happ , Cay-Uwe Pinnow , Ralf Symanczyk , Klaus-Dieter Ufert
IPC分类号： G11C17/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144 , H01L45/1666
摘要： An integrated semiconductor memory includes a storage medium (6) arranged between two electrodes (10, 20), which storage medium may be a phase change medium, for example. The storage medium (6) can be put into a first state or a second state by means of an electric current, as a result of which an item of information can be stored. According to embodiments of the invention, a layer plane (L) is provided in which impurity particles made from a material (4) are embedded, as a result of which the current density in the storage medium is locally increased and the programming current required for reprogramming is reduced. As a result, the current consumption of memory elements containing a phase change medium is reduced, so that for the first time they can be embodied with minimal feature size, together with other components such as transistors, and integrated into a single semiconductor circuit and no longer have to be arranged in separate subcircuits.
摘要翻译：集成半导体存储器包括布置在两个电极（10,20）之间的存储介质（6），该存储介质可以是例如相变介质。存储介质（6）可以通过电流进入第一状态或第二状态，结果可以存储信息项。根据本发明的实施例，提供了一种层状平面（L），其中嵌入由材料（4）制成的杂质颗粒，结果存储介质中的电流密度局部增加，并且需要编程电流重编程减少。结果，包含相变介质的存储元件的电流消耗减少，使得它们可以首次以最小的特征尺寸与其他元件（例如晶体管）一体化，并且集成到单个半导体电路中，并且不存在更长的时间必须在单独的子电路中排列。

2. 发明授权

US07787279B2 Integrated circuit having a resistive memory 有权
标题翻译：具有电阻存储器的集成电路
公开(公告)号：US07787279B2
公开(公告)日：2010-08-31
申请号：US11441805
申请日：2006-05-26
申请人： Thomas D. Happ , Cay-Uwe Pinnow , Ralf Symanczyk , Klaus-Dieter Ufert
发明人： Thomas D. Happ , Cay-Uwe Pinnow , Ralf Symanczyk , Klaus-Dieter Ufert
IPC分类号： G11C11/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144 , H01L45/1666
摘要： An integrated semiconductor memory includes a storage medium (6) arranged between two electrodes (10, 20), which storage medium may be a phase change medium, for example. The storage medium (6) can be put into a first state or a second state by means of an electric current, as a result of which an item of information can be stored. According to embodiments of the invention, a layer plane (L) is provided in which impurity particles made from a material (4) are embedded, as a result of which the current density in the storage medium is locally increased and the programming current required for reprogramming is reduced. As a result, the current consumption of memory elements containing a phase change medium is reduced, so that for the first time they can be embodied with minimal feature size, together with other components such as transistors, and integrated into a single semiconductor circuit and no longer have to be arranged in separate subcircuits.
摘要翻译：集成半导体存储器包括布置在两个电极（10,20）之间的存储介质（6），该存储介质可以是例如相变介质。存储介质（6）可以通过电流进入第一状态或第二状态，结果可以存储信息项。根据本发明的实施例，提供了一种层状平面（L），其中嵌入由材料（4）制成的杂质颗粒，结果存储介质中的电流密度局部增加，并且需要编程电流重编程减少。结果，包含相变介质的存储元件的电流消耗减少，使得它们可以首次以最小的特征尺寸与其他元件（例如晶体管）一体化，并且集成到单个半导体电路中，并且不存在更长的时间必须在单独的子电路中排列。

3. 发明授权

US07329561B2 Fabricating memory components (PCRAMS) including memory cells based on a layer that changes phase state 有权
标题翻译：基于改变阶段状态的层，构建存储器组件（PCRAMS），包括存储器单元
公开(公告)号：US07329561B2
公开(公告)日：2008-02-12
申请号：US11210112
申请日：2005-08-24
申请人： Ralf Symanczyk , Cay-Uwe Pinnow , Thomas Happ
发明人： Ralf Symanczyk , Cay-Uwe Pinnow , Thomas Happ
IPC分类号： H01L21/06
CPC分类号： H01L45/144 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1273 , H01L45/16
摘要： A method is describe for fabricating memory components including memory cells based on an active material of an active layer, the phase state of which can be changed and which is enclosed between a bottom electrode and a top electrode. To reduce the current intensity of the programming current and the erase current required for programming and erasing of the memory element and therefore the quantity of heat which is required to change the phase state, a nanoporous aluminium oxide layer is used as a mask during the production of the active layer or the interface with the electrodes. The nanoporous aluminium oxide layer can be used as a positive mask, as a negative mask, or used directly as an insulating current aperture. The contact surface between electrode and active layer can be set in virtually any desired form by varying the process parameters of the aluminium oxide mask. Since the typical cell area of the memory cell is significantly larger than the mean diameter of the nanopores, a good homogeneity and reproducibility of the contacts results from a production engineering standpoint.
摘要翻译：描述了一种用于制造包括基于有源层的活性材料的存储器单元的存储器组件的方法，该有源层的相位状态可以被改变并且被包围在底部电极和顶部电极之间。为了降低编程电流的电流强度和存储元件的编程和擦除所需的擦除电流以及因此改变相位状态所需的热量，在生产过程中使用纳米孔氧化铝层作为掩模的活性层或与电极的界面。纳米多孔氧化铝层可以用作正掩模，作为负掩模，或直接用作绝缘电流孔。通过改变氧化铝掩模的工艺参数，电极和有源层之间的接触表面可以几乎任意形成。由于存储单元的典型单元面积显着大于纳米孔的平均直径，所以从生产工程的观点来看，接触的良好的均匀性和再现性。

4. 发明申请

US20060046379A1 Fabricating memory components (PCRAMS) including memory cells based on a layer that changes phase state 有权
标题翻译：基于改变阶段状态的层，构建存储器组件（PCRAMS），包括存储器单元
公开(公告)号：US20060046379A1
公开(公告)日：2006-03-02
申请号：US11210112
申请日：2005-08-24
申请人： Ralf Symanczyk , Cay-Uwe Pinnow , Thomas Happ
发明人： Ralf Symanczyk , Cay-Uwe Pinnow , Thomas Happ
IPC分类号： H01L21/8244
CPC分类号： H01L45/144 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1273 , H01L45/16
摘要： A method is describe for fabricating memory components including memory cells based on an active material of an active layer, the phase state of which can be changed and which is enclosed between a bottom electrode and a top electrode. To reduce the current intensity of the programming current and the erase current required for programming and erasing of the memory element and therefore the quantity of heat which is required to change the phase state, a nanoporous aluminium oxide layer is used as a mask during the production of the active layer or the interface with the electrodes. The nanoporous aluminium oxide layer can be used as a positive mask, as a negative mask, or used directly as an insulating current aperture. The contact surface between electrode and active layer can be set in virtually any desired form by varying the process parameters of the aluminium oxide mask. Since the typical cell area of the memory cell is significantly larger than the mean diameter of the nanopores, a good homogeneity and reproducibility of the contacts results from a production engineering standpoint.
摘要翻译：描述了一种用于制造包括基于有源层的活性材料的存储器单元的存储器组件的方法，该有源层的相位状态可以被改变并且被包围在底部电极和顶部电极之间。为了降低编程电流的电流强度和存储元件的编程和擦除所需的擦除电流以及因此改变相位状态所需的热量，在生产过程中使用纳米孔氧化铝层作为掩模的活性层或与电极的界面。纳米多孔氧化铝层可以用作正掩模，作为负掩模，或直接用作绝缘电流孔。通过改变氧化铝掩模的工艺参数，电极和有源层之间的接触表面可以几乎任意形成。由于存储单元的典型单元面积显着大于纳米孔的平均直径，所以从生产工程的观点来看，接触的良好的均匀性和再现性。

5. 发明申请

US20060205110A1 Method for manufacturing an electrolyte material layer in semiconductor memory devices 失效
标题翻译：在半导体存储器件中制造电解质材料层的方法
公开(公告)号：US20060205110A1
公开(公告)日：2006-09-14
申请号：US11076027
申请日：2005-03-10
申请人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
发明人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
IPC分类号： H01L21/06 , H01L21/20 , H01L21/8238 , H01L21/00
CPC分类号： H01L45/085 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/146 , H01L45/1616 , H01L45/1625 , H01L45/1641
摘要： A method for manufacturing an electrolyte material layer with a chalcogenide material incorporated or deposited therein for use in semiconductor memory devices, in particular resistively-switching memory devices or components. The method comprises the steps of producing a semiconductor substrate, depositing a binary chalcogenide layer onto the semiconductor substrate, depositing a sulphur-containing layer onto the binary chalcogenide layer, and creating a ternary chalcogenide layer comprising at least two different chalcogenide compounds ASexSy. One component A of the chalcogenide compounds ASexSy comprises materials of the IV elements main group, e.g., Ge, Si, or of a transition metal, preferably of the group consisting of Zn, Cd, Hg, or a combination thereof.
摘要翻译：一种用于制造电解质材料层的方法，所述电解质材料层具有结合或沉积在其中用于半导体存储器件，特别是电阻切换存储器件或部件的硫族化物材料。该方法包括以下步骤：制造半导体衬底，在半导体衬底上沉积二元硫族化物层，在二元硫族化物层上沉积含硫层，以及产生包含至少两种不同硫属化物化合物的三元硫族化物层， x 。硫属化物化合物的一个组分A包括IV元素主要组分的材料，例如Ge，Si或过渡金属，优选基团由Zn，Cd，Hg或其组合组成。

6. 发明授权

US07483293B2 Method for improving the thermal characteristics of semiconductor memory cells 失效
标题翻译：改善半导体存储单元的热特性的方法
公开(公告)号：US07483293B2
公开(公告)日：2009-01-27
申请号：US11261212
申请日：2005-10-28
申请人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
发明人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
IPC分类号： G11C11/00
CPC分类号： H01L45/1658 , G11C13/0011 , H01L45/085 , H01L45/1266 , H01L45/142 , H01L45/143
摘要： A non-volatile, resistively switching memory cell includes a first electrode, a second electrode and a solid electrolyte, which is arranged such that it makes contact between the electrodes, and is composed of an amorphous or partially amorphous, non-oxidic matrix and a metal which is distributed in the amorphous or partially amorphous, non-oxidic matrix and whose cations migrate to the cathode in the amorphous or partially amorphous, non-oxidic matrix under the influence of an electrical voltage, wherein the solid electrolyte contains one or more further metallic materials for stabilization of the amorphous state of the matrix.
摘要翻译：非易失性电阻开关存储单元包括第一电极，第二电极和固体电解质，其被布置成使得其在电极之间接触，并且由无定形或部分无定形的非氧化基质和分布在非晶或部分无定形非氧化基质中的金属，其阳离子在电压的影响下迁移至无定形或部分无定形非氧化基质中的阴极，其中固体电解质含有一种或多种金属材料用于稳定基体的非晶状态。

7. 发明授权

US07442605B2 Resistively switching memory 失效
标题翻译：电阻切换存储器
公开(公告)号：US07442605B2
公开(公告)日：2008-10-28
申请号：US11113332
申请日：2005-04-25
申请人： Klaus Dieter Ufert , Cay-Uwe Pinnow
发明人： Klaus Dieter Ufert , Cay-Uwe Pinnow
IPC分类号： H01L21/82
CPC分类号： G11C13/0011 , H01L45/085 , H01L45/1233 , H01L45/141 , H01L45/1658 , H01L45/1675
摘要： The present invention relates to a reproducible conditioning during the manufacturing of a resistively switching CBRAM memory cell comprising a first electrode and a second electrode with an active material positioned therebetween. The active material is adapted to be placed in a more or less electroconductive state by means of electrochemical switching processes. A CBRAM memory cell manufactured pursuant to the method according to the invention has, due to the improved conditioning, more reliable and more distinctly evaluable electrical switching properties. Moreover, no more forming step is necessary with the method according to the present invention.
摘要翻译：本发明涉及在制造电阻切换CBRAM存储单元期间的可再现调节，其包括第一电极和位于其间的活性材料的第二电极。活性材料适于通过电化学切换工艺置于或多或少的导电状态。根据本发明的方法制造的CBRAM存储单元由于改进的调理，具有更可靠和更明显的可评估电开关特性。此外，根据本发明的方法不需要更多的成型步骤。

8. 发明申请

US20110037014A1 METHOD FOR PRODUCING MEMORY HAVING A SOLID ELECTROLYTE MATERIAL REGION 有权
标题翻译：用于生产具有固体电解质材料区的存储器的方法
公开(公告)号：US20110037014A1
公开(公告)日：2011-02-17
申请号：US12913565
申请日：2010-10-27
申请人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
发明人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
IPC分类号： H01B1/00
CPC分类号： G11C13/0011 , H01L45/085 , H01L45/1233 , H01L45/142 , H01L45/143 , H01L45/1608
摘要： A method for producing a solid electrolyte material region for a memory element of a solid electrolyte memory cell. A first material is formed in substantially pure form. A thermal treatment is carried out in the presence of at least one second material, and the chalcogenide material of the solid electrolyte material region thereby being produced.
摘要翻译：一种固体电解质存储单元的存储元件固体电解质材料区域的制造方法。第一材料以基本上纯的形式形成。在至少一种第二材料的存在下进行热处理，由此生产固体电解质材料区域的硫族化物材料。

9. 发明授权

US07613028B2 Solid electrolyte switching element 有权
标题翻译：固体电解质开关元件
公开(公告)号：US07613028B2
公开(公告)日：2009-11-03
申请号：US11131498
申请日：2005-05-18
申请人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
发明人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
IPC分类号： G11C11/00
CPC分类号： G11C13/0011 , G11C2213/15 , G11C2213/34 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/142 , H01L45/143 , H01L45/145 , H01L45/146
摘要： A switching element for reversible switching between an electrically insulating OFF state and an electrically conductive ON state, having two electrodes, namely a reactive electrode and an inert electrode, and also a solid electrolyte arranged between the two electrodes, which is characterized by the fact that the electrical conductivity of the solid electrolyte increases as the temperature thereof rises, but essentially no longer increases below a critical decomposition temperature of the solid electrolyte.
摘要翻译：一种用于在电绝缘OFF状态和导电ON状态之间可逆切换的开关元件，具有两个电极，即反应电极和惰性电极，以及布置在两个电极之间的固体电解质，其特征在于，固体电解质的电导率随温度升高而增加，但基本上不再增加到低于固体电解质的临界分解温度。

10. 发明申请

US20060001000A1 Method for producing memory having a solid electrolyte material region 有权
标题翻译：具有固体电解质材料区域的记忆体的制造方法
公开(公告)号：US20060001000A1
公开(公告)日：2006-01-05
申请号：US11153964
申请日：2005-06-16
申请人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
发明人： Cay-Uwe Pinnow , Klaus-Dieter Ufert
IPC分类号： H01G2/00
CPC分类号： G11C13/0011 , H01L45/085 , H01L45/1233 , H01L45/142 , H01L45/143 , H01L45/1608
摘要： A method for producing a solid electrolyte material region for a memory element of a solid electrolyte memory cell. A first material is formed in substantially pure form. A thermal treatment is carried out in the presence of at least one second material, and the chalcogenide material of the solid electrolyte material region thereby being produced.
摘要翻译：一种固体电解质存储单元的存储元件固体电解质材料区域的制造方法。第一材料以基本上纯的形式形成。在至少一种第二材料的存在下进行热处理，由此生产固体电解质材料区域的硫族化物材料。

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