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1. 发明申请

US20060231924A1 BIPOLAR TRANSISTOR STRUCTURE WITH SELF-ALIGNED RAISED EXTRINSIC BASE AND METHODS 有权
标题翻译：具有自对准基极的双极晶体管结构和方法
公开(公告)号：US20060231924A1
公开(公告)日：2006-10-19
申请号：US11169444
申请日：2005-06-29
申请人： Thomas Adam , Kevin Chan , Alvin Joseph , Marwan Khater , Qizhi Liu , Beth Rainey , Kathryn Schonenberg
发明人： Thomas Adam , Kevin Chan , Alvin Joseph , Marwan Khater , Qizhi Liu , Beth Rainey , Kathryn Schonenberg
IPC分类号： H01L21/331 , H01L27/082 , H01L27/102 , H01L31/11
CPC分类号： H01L29/7378 , H01L29/1004 , H01L29/66242 , H01L29/66287
摘要： The invention includes methods of fabricating a bipolar transistor that adds a silicon germanium (SiGe) layer or a third insulator layer of, e.g., high pressure oxide (HIPOX), atop an emitter cap adjacent the intrinsic base prior to forming a link-up layer. This addition allows for removal of the link-up layer using wet etch chemistries to remove the excess SiGe or third insulator layer formed atop the emitter cap without using oxidation. In this case, an oxide section (formed by deposition of an oxide or segregation of the above-mentioned HIPOX layer) and nitride spacer can be used to form the emitter-base isolation. The invention results in lower thermal cycle, lower stress levels, and more control over the emitter cap layer thickness, which are drawbacks of the first embodiment. The invention also includes the resulting bipolar transistor structure.
摘要翻译：本发明包括制造双极晶体管的方法，该双极晶体管在形成连接层之前，将硅锗（SiGe）层或例如高压氧化物（HIPOX）的第三绝缘体层与邻近本征基极的发射极帽顶上相加。该添加允许使用湿蚀刻化学去除连接层，以去除在不使用氧化的情况下形成在发射极帽顶上的多余SiGe或第三绝缘体层。在这种情况下，可以使用氧化物部分（通过沉积氧化物或上述HIPOX层的分离）和氮化物间隔物形成发射极 - 基极隔离。本发明导致较低的热循环，较低的应力水平和对发射极盖层厚度的更多控制，这是第一实施例的缺点。本发明还包括所得到的双极晶体管结构。

2. 发明申请

US20050151225A1 BIPOLAR TRANSISTOR STRUCTURE WITH SELF-ALIGNED RAISED EXTRINSIC BASE AND METHODS 有权
标题翻译：具有自对准的双极晶体管结构
公开(公告)号：US20050151225A1
公开(公告)日：2005-07-14
申请号：US10904482
申请日：2004-11-12
申请人： Thomas Adam , Kevin Chan , Alvin Joseph , Marwan Khater , Qizhi Liu , Beth Rainey , Kathryn Schonenberg
发明人： Thomas Adam , Kevin Chan , Alvin Joseph , Marwan Khater , Qizhi Liu , Beth Rainey , Kathryn Schonenberg
IPC分类号： H01L21/331 , H01L29/10
CPC分类号： H01L29/7378 , H01L29/1004 , H01L29/66242 , H01L29/66287
摘要： The invention includes methods of fabricating a bipolar transistor that adds a silicon germanium (SiGe) layer or a third insulator layer of, e.g., high pressure oxide (HIPOX), atop an emitter cap adjacent the intrinsic base prior to forming a link-up layer. This addition allows for removal of the link-up layer using wet etch chemistries to remove the excess SiGe or third insulator layer formed atop the emitter cap without using oxidation. In this case, an oxide section (formed by deposition of an oxide or segregation of the above-mentioned HIPOX layer) and nitride spacer can be used to form the emitter-base isolation. The invention results in lower thermal cycle, lower stress levels, and more control over the emitter cap layer thickness, which are drawbacks of the first embodiment. The invention also includes the resulting bipolar transistor structure.
摘要翻译：本发明包括制造双极晶体管的方法，该双极晶体管在形成连接层之前，将硅锗（SiGe）层或例如高压氧化物（HIPOX）的第三绝缘体层与邻近本征基极的发射极帽顶上相加。该添加允许使用湿蚀刻化学去除连接层，以去除在不使用氧化的情况下形成在发射极帽顶上的多余SiGe或第三绝缘体层。在这种情况下，可以使用氧化物部分（通过沉积氧化物或上述HIPOX层的分离）和氮化物间隔物形成发射极 - 基极隔离。本发明导致较低的热循环，较低的应力水平和对发射极盖层厚度的更多控制，这是第一实施例的缺点。本发明还包括所得到的双极晶体管结构。

3. 发明申请

US20060081934A1 Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same 失效
标题翻译：双极晶体管具有可选择的自对准的外部基极和其形成方法
公开(公告)号：US20060081934A1
公开(公告)日：2006-04-20
申请号：US11289915
申请日：2005-11-30
申请人： Marwan Khater , James Dunn , David Harame , Alvin Joseph , Qizhi Liu , Francois Pagette , Stephen Onge , Andreas Stricker
发明人： Marwan Khater , James Dunn , David Harame , Alvin Joseph , Qizhi Liu , Francois Pagette , Stephen Onge , Andreas Stricker
IPC分类号： H01L23/62
CPC分类号： H01L29/66287 , H01L29/1004 , H01L29/66242 , H01L29/732 , H01L29/7378
摘要： A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.
摘要翻译：公开了一种具有凸起的外在基极和在本征基极和发射极之间可选自对准的双极晶体管。制造方法可以包括在内在基底上形成多晶硅或硅的第一非本征基极层的预定厚度。然后通过在第一非本征基层上的光刻形成电介质着色焊盘。接下来，在电介质贴片垫的顶部上形成第二非多晶硅或硅的非本征基极层，以最终确定凸出的非本征基本总厚度。使用光刻和RIE形成发射器开口，其中第二外部基极层被蚀刻停止在电介质着色焊盘上。通过选择第一非本征基极层厚度，电介质着陆焊盘宽度和间隔物宽度来实现发射极和凸出的外部基极之间的自对准程度。

4. 发明申请

US20050048735A1 BIPOLAR TRANSISTOR HAVING RAISED EXTRINSIC BASE WITH SELECTABLE SELF-ALIGNMENT AND METHODS OF FORMING SAME 有权
标题翻译：具有可选择的自对准的提升的超级基座的双极晶体管及其形成方法
公开(公告)号：US20050048735A1
公开(公告)日：2005-03-03
申请号：US10604988
申请日：2003-08-29
申请人： Marwan Khater , James Dunn , David Harame , Alvin Joseph , Qizhi Liu , Francois Pagette , Stephen St. Onge , Andreas Stricker
发明人： Marwan Khater , James Dunn , David Harame , Alvin Joseph , Qizhi Liu , Francois Pagette , Stephen St. Onge , Andreas Stricker
IPC分类号： H01L21/331 , H01L29/10 , H01L29/732 , H01L29/737 , H01L21/76
CPC分类号： H01L29/66287 , H01L29/1004 , H01L29/66242 , H01L29/732 , H01L29/7378
摘要： A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.
摘要翻译：公开了一种具有凸起的外在基极和在本征基极和发射极之间可选自对准的双极晶体管。制造方法可以包括在内在基底上形成多晶硅或硅的第一非本征基极层的预定厚度。然后通过在第一非本征基层上的光刻形成电介质着色焊盘。接下来，在电介质贴片垫的顶部上形成第二非多晶硅或硅的非本征基极层，以最终确定凸出的非本征基本总厚度。使用光刻和RIE形成发射器开口，其中第二外部基极层被蚀刻停止在电介质着色焊盘上。通过选择第一非本征基极层厚度，电介质着陆焊盘宽度和间隔物宽度来实现发射极和凸出的外部基极之间的自对准程度。

5. 发明申请

US20060177986A1 High fT and fmax bipolar transistor and method of making same 失效
标题翻译：高fT和fmax双极晶体管及其制造方法
公开(公告)号：US20060177986A1
公开(公告)日：2006-08-10
申请号：US11378927
申请日：2006-03-17
申请人： Alvin Joseph , Qizhi Liu
发明人： Alvin Joseph , Qizhi Liu
IPC分类号： H01L21/8222
CPC分类号： H01L29/66287 , H01L21/8249 , H01L27/0623 , H01L29/1004 , H01L29/732
摘要： A high fT and fmax bipolar transistor includes an emitter, a base, and a collector. The emitter has a lower portion and an upper portion that extends beyond the lower portion. The base includes an intrinsic base and an extrinsic base. The intrinsic base is located between the lower portion of the emitter and the collector. The extrinsic base extends from the lower portion of the emitter beyond the upper portion of the emitter and includes a continuous conductor that extends from underneath the upper portion of the emitter and out from underneath the upper portion of the emitter. The continuous conductor provides a low electrical resistance path from a base contact (not shown) to the intrinsic base. The transistor may include a second conductor that does not extend underneath the upper portion of the emitter, but which further reduces the electrical resistance through the extrinsic base.
摘要翻译：高电平和高压双极晶体管包括发射极，基极和集电极。发射器具有延伸超出下部的下部和上部。基础包括内在基础和外在碱基。本征基极位于发射极的下部和集电极之间。外部基极从发射器的下部延伸超过发射器的上部，并且包括从发射器的上部下方延伸并从发射器的上部下方延伸的连续导体。连续导体提供从底部触点（未示出）到本征基极的低电阻路径。晶体管可以包括不延伸在发射极的上部下方的第二导体，但是通过外部基极进一步降低电阻。

6. 发明申请

US20070264787A1 METHOD TO BUILD SELF-ALIGNED NPN IN ADVANCED BiCMOS TECHNOLOGY 失效
标题翻译：在高级BiCMOS技术中构建自对准NPN的方法
公开(公告)号：US20070264787A1
公开(公告)日：2007-11-15
申请号：US11830376
申请日：2007-07-30
申请人： James Dunn , Alvin Joseph , Qizhi Liu
发明人： James Dunn , Alvin Joseph , Qizhi Liu
IPC分类号： H01L21/331
CPC分类号： H01L29/66242 , H01L29/7378
摘要： The present invention provides a method of forming a self-aligned heterobipolar transistor (HBT) device in a BiCMOS technology. The method includes forming a raised extrinsic base structure by using an epitaxial growth process in which the growth rate between single crystal silicon and polycrystalline silicon is different and by using a low temperature oxidation process such as a high-pressure oxidation (HIPOX) process to form a self-aligned emitter/extrinsic base HBT structure.
摘要翻译：本发明提供了一种在BiCMOS技术中形成自对准异双极晶体管（HBT）器件的方法。该方法包括通过使用其中单晶硅和多晶硅的生长速率不同的外延生长工艺和通过使用诸如高压氧化（HIPOX）工艺的低温氧化工艺形成凸起的外在基体结构来形成自对准发射极/非本征基极HBT结构。

7. 发明申请

US20070207567A1 Method of Base Formation in a Bicmos Process 有权
标题翻译： Bicmos工艺中基体形成的方法
公开(公告)号：US20070207567A1
公开(公告)日：2007-09-06
申请号：US10599938
申请日：2005-04-06
申请人： Peter Geiss , Alvin Joseph , Qizhi Liu , Bradley Orner
发明人： Peter Geiss , Alvin Joseph , Qizhi Liu , Bradley Orner
IPC分类号： H01L21/04 , H01L29/73
CPC分类号： H01L29/0804 , H01L21/8249 , H01L27/0623 , H01L29/1004 , H01L29/66287
摘要： Disclosed is a bipolar complementary metal oxide semiconductor (BiCMOS) or NPN/PNP device that has a collector, an intrinsic base above the collector, shallow trench isolation regions adjacent the collector, a raised extrinsic base above the intrinsic base, a T-shaped emitter above the extrinsic base, spacers adjacent the emitter, and a silicide layer that is separated from the emitter by the spacers.
摘要翻译：公开了一种双极互补金属氧化物半导体（BiCMOS）或NPN / PNP器件，其具有集电极，集电极之上的本征基极，与集电极相邻的浅沟槽隔离区，在本征基极之上的凸起的外部基极，T形发射极在外部基极之上，邻近发射极的间隔物和通过间隔物与发射极分离的硅化物层。

8. 发明申请

US20070051980A1 SILICON GERMANIUM (SiGe) HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) 有权
标题翻译：硅锗（SiGe）异相双极晶体管（HBT）
公开(公告)号：US20070051980A1
公开(公告)日：2007-03-08
申请号：US11161936
申请日：2005-08-23
申请人： Wade Hodge , Alvin Joseph , Rajendran Krishnasamy , Qizhi Liu , Bradley Orner
发明人： Wade Hodge , Alvin Joseph , Rajendran Krishnasamy , Qizhi Liu , Bradley Orner
IPC分类号： H01L29/737 , H01L21/8222
CPC分类号： H01L29/7378 , H01L21/8249 , H01L29/1004
摘要： A heterojunction bipolar transistor (HBT), an integrated circuit (IC) chip including at least one HBT and a method of forming the IC. The HBT includes an extrinsic base with one or more buried interstitial barrier layer. The extrinsic base may be heavily doped with boron and each buried interstitial barrier layer is doped with a dopant containing carbon, e.g., carbon or SiGe:C. The surface of the extrinsic base may be silicided.
摘要翻译：异质结双极晶体管（HBT），包括至少一个HBT的集成电路（IC）芯片和形成IC的方法。 HBT包括具有一个或多个掩埋间隙屏障层的外在基底。外部基极可以用硼重掺杂，并且每个掩埋的间隙势垒层掺杂含有碳的掺杂剂，例如碳或SiGe：C。外基的表面可以被硅化。

9. 发明申请

US20060060886A1 METHOD TO BUILD SELF-ALIGNED NPN IN ADVANCED BiCMOS TECHNOLOGY 有权
标题翻译：在高级BiCMOS技术中构建自对准NPN的方法
公开(公告)号：US20060060886A1
公开(公告)日：2006-03-23
申请号：US10711486
申请日：2004-09-21
申请人： James Dunn , Alvin Joseph , Qizhi Liu
发明人： James Dunn , Alvin Joseph , Qizhi Liu
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/66242 , H01L29/7378
摘要： The present invention provides a method of forming a self-aligned heterobipolar transistor (HBT) device in a BiCMOS technology. The method includes forming a raised extrinsic base structure by using an epitaxial growth process in which the growth rate between single crystal silicon and polycrystalline silicon is different and by using a low temperature oxidation process such as a high-pressure oxidation (HIPOX) process to form a self-aligned emitter/extrinsic base HBT structure.
摘要翻译：本发明提供了一种在BiCMOS技术中形成自对准异双极晶体管（HBT）器件的方法。该方法包括通过使用其中单晶硅和多晶硅的生长速率不同的外延生长工艺和通过使用诸如高压氧化（HIPOX）工艺的低温氧化工艺形成凸起的外在基体结构来形成自对准发射极/非本征基极HBT结构。

10. 发明申请

US20060124964A1 Method of collector formation in BiCMOS technology 有权
公开(公告)号：US20060124964A1
公开(公告)日：2006-06-15
申请号：US11288843
申请日：2005-11-29
申请人： Peter Geiss , Peter Gray , Alvin Joseph , Qizhi Liu
发明人： Peter Geiss , Peter Gray , Alvin Joseph , Qizhi Liu
IPC分类号： H01L31/109
CPC分类号： H01L29/0821 , H01L21/8249 , H01L27/0623 , H01L29/66242 , H01L29/66318
摘要： A heterobipolar transistor (HBT) for high-speed BiCMOS applications is provided in which the collector resistance, Rc, is lowered by providing a buried refractory metal silicide layer underneath the shallow trench isolation region on the subcollector of the device. Specifically, the HBT of the present invention includes a substrate including at least a subcollector; a buried refractory metal silicide layer located on the subcollector; and a shallow trench isolation region located on a surface of the buried refractory metal silicide layer. The present invention also provides a method of fabricating such a HBT. The method includes forming a buried refractory metal silicide underneath the shallow trench isolation region on the subcollector of the device.

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