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    • 1. 发明申请
    • METHODS FOR STORING DATA IN NON-VOLATILE MEMORIES
    • 在非易失性存储器中存储数据的方法
    • WO2003088041A1
    • 2003-10-23
    • PCT/NO2003/000115
    • 2003-04-10
    • THIN FILM ELECTRONICS ASATORJUSSEN, Lars, SundellKARLSSON, Christer
    • TORJUSSEN, Lars, SundellKARLSSON, Christer
    • G06F11/16
    • G06F11/08G11C11/22G11C29/74
    • In methods for storing data in a non-volatile ferroelectric random access memory wherein destructive readout operations are followed by rewrite operations, identical copies of the data are stored in different memory locations that do not have any common word lines or alternative neither common word lines nor common bit lines. A first word line or a segment of a first word line is read in its entirety, said word line or said segment comprising at least a first copy of the identical copies of data. The data thus read are rewritten to the memory location and in addition transferred from the memory location in question to an appropriate cache location, whereafter subsequent memory locations either in the form of word lines or segments thereof are read, and data rewritten to the cache location. The operation is repeated until all identical copies of the data have been transferred to the cache storage. Subsequently bit errors are detected by comparing the identical copies in a memory control logic circuit, which also may be used for caching readout data copies or alternatively be connected with a separate cache memory. Corrected data are written back to the appropriate memory locations holding bit errors when the latter have been detected.
    • 在用于将数据存储在非易失性铁电随机存取存储器中的方法中,其中破坏性读出操作之后是重写操作,数据的相同副本被存储在不具有任何公共字线的不同存储器位置中,或者不是常用字线 通用位线。 读取第一字线的第一字线或第一字段的整体,所述字线或所述片段至少包括相同的数据副本的第一副本。 这样读取的数据被重写到存储器位置,并且另外从所讨论的存储器位置传送到适当的高速缓存位置,之后读取以字线或其段的形式的后续存储器位置,并将数据重写到高速缓存位置 。 重复操作,直到数据的所有相同副本已经传送到高速缓存存储器。 随后,通过比较存储器控制逻辑电路中的相同副本来检测位错误,存储器控制逻辑电路也可用于缓存读出的数据副本,或者替代地与单独的高速缓冲存储器连接。 当检测到这些数据被检测到时,校正的数据被写回到保持位错误的适当的存储器位置。
    • 2. 发明授权
    • METHODS FOR STORING DATA IN NON-VOLATILE MEMORIES
    • 方法在非易失性存储器中存储数据
    • EP1497730B1
    • 2006-06-28
    • EP03723535.5
    • 2003-04-10
    • Thin Film Electronics ASA
    • TORJUSSEN, Lars, SundellKARLSSON, Christer
    • G06F11/16G06F12/16
    • G06F11/08G11C11/22G11C29/74
    • In methods for storing data in a non-volatile ferroelectric random access memory wherein destructive readout operations are followed by rewrite operations, identical copies of the data are stored in different memory locations that do not have any common word lines or alternative neither common word lines nor common bit lines. A first word line or a segment of a first word line is read in its entirety, said word line or said segment comprising at least a first copy of the identical copies of data. The data thus read are rewritten to the memory location and in addition transferred from the memory location in question to an appropriate cache location, whereafter subsequent memory locations either in the form of word lines or segments thereof are read, and data rewritten to the cache location. The operation is repeated until all identical copies of the data have been transferred to the cache storage. Subsequently bit errors are detected by comparing the identical copies in a memory control logic circuit, which also may be used for caching readout data copies or alternatively be connected with a separate cache memory. Corrected data are written back to the appropriate memory locations holding bit errors when the latter have been detected.
    • 3. 发明公开
    • METHODS FOR STORING DATA IN NON-VOLATILE MEMORIES
    • 方法在非易失性存储器中存储数据
    • EP1497730A1
    • 2005-01-19
    • EP03723535.5
    • 2003-04-10
    • Thin Film Electronics ASA
    • TORJUSSEN, Lars, SundellKARLSSON, Christer
    • G06F11/16G06F12/16
    • G06F11/08G11C11/22G11C29/74
    • In methods for storing data in a non-volatile ferroelectric random access memory wherein destructive readout operations are followed by rewrite operations, identical copies of the data are stored in different memory locations that do not have any common word lines or alternative neither common word lines nor common bit lines. A first word line or a segment of a first word line is read in its entirety, said word line or said segment comprising at least a first copy of the identical copies of data. The data thus read are rewritten to the memory location and in addition transferred from the memory location in question to an appropriate cache location, whereafter subsequent memory locations either in the form of word lines or segments thereof are read, and data rewritten to the cache location. The operation is repeated until all identical copies of the data have been transferred to the cache storage. Subsequently bit errors are detected by comparing the identical copies in a memory control logic circuit, which also may be used for caching readout data copies or alternatively be connected with a separate cache memory. Corrected data are written back to the appropriate memory locations holding bit errors when the latter have been detected.