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    • 1. 发明授权
    • Information processing system
    • 信息处理系统
    • US06622184B1
    • 2003-09-16
    • US09585351
    • 2000-06-02
    • Tetsuya TabeEiichi Asai
    • Tetsuya TabeEiichi Asai
    • G06F302
    • G06F11/3664G06F12/1433G06F21/606G06F21/74G06F21/79
    • An information processing system which makes it possible to protect information stored in the ROM of the system from unauthorized access by means of a debug tool. The information processing system includes a ROM for storing an unlocking program and a user program; a CPU for executing said unlocking program and said user program stored in said ROM; an on-chip debug circuit serving to output debug information of said user program as executed by said information processing system; and a debug function disabling circuit serving to disable debug functions of said on-chip debug circuit at power up and to enable the debug functions of said on-chip debug circuit when said unlocking program has been executed.
    • 一种信息处理系统,其可以通过调试工具保护存储在系统的ROM中的信息免于未经授权的访问。 信息处理系统包括用于存储解锁程序和用户程序的ROM; 用于执行存储在所述RO​​M中的所述解锁程序和所述用户程序的CPU; 用于输出由所述信息处理系统执行的所述用户程序的调试信息的片上调试电路; 以及调试功能禁止电路,其用于在上电时禁止所述片上调试电路的调试功能,并且当所述解锁程序已被执行时,使能所述片上调试电路的调试功能。
    • 2. 发明授权
    • Trace data compression system and trace data compression method and microcomputer implemented with a built-in trace data compression circuit
    • 跟踪数据压缩系统和跟踪数据压缩方法和微型计算机实现了内置的跟踪数据压缩电路
    • US07330809B2
    • 2008-02-12
    • US10395339
    • 2003-03-25
    • Tetsuya Tabe
    • Tetsuya Tabe
    • G06F9/455G06F9/44G06F9/00G06F7/00G06F7/02G06F7/04G06F13/00G06F13/12G06F13/38
    • G06F11/3636
    • A trace data compression system includes a data acquisition circuit which is configured to acquire address information for identifying an address for reading or writing operation of a microcomputer which performs predetermined processing, and data information as operand data stored in the address; an address information compression circuit which is configured to compress the address information having been acquired by the data acquisition circuit and output the address information as compressed; a data information compression circuit which is configured to compress the data information having been acquired by the data acquisition circuit and output the data information as compressed; a data output circuit which is configured to output variable length data containing the address information having been compressed and outputted by the address information compression circuit and the data information having been compressed and outputted by the data information compression circuit.
    • 跟踪数据压缩系统包括数据获取电路,其被配置为获取用于识别执行预定处理的微计算机的读取或写入操作的地址的地址信息,以及作为存储在地址中的操作数数据的数据信息; 地址信息压缩电路,被配置为压缩由数据获取电路获取的地址信息并输出压缩的地址信息; 数据信息压缩电路,被配置为压缩由数据获取电路获取的数据信息并输出压缩的数据信息; 数据输出电路,其被配置为输出包含由地址信息压缩电路压缩和输出的地址信息的可变长度数据,以及由数据信息压缩电路压缩和输出的数据信息。