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1. 发明授权

US4709408A Phased lock loop synchronous detecting system with an automatic frequency tuning circuit 失效
标题翻译：具有自动频率调谐电路的相控锁环同步检测系统
公开(公告)号：US4709408A
公开(公告)日：1987-11-24
申请号：US760984
申请日：1985-07-31
申请人： Tetsuro Itakura , Yoshitaka Kasagi , Mikio Koyama , Chikashi Nakagawara
发明人： Tetsuro Itakura , Yoshitaka Kasagi , Mikio Koyama , Chikashi Nakagawara
IPC分类号： H04N5/455 , H03J7/04 , H04N5/04 , H04N5/50 , H04B1/16
CPC分类号： H04N5/4446 , H03J7/04 , H04N5/50
摘要： A circuit for processing an intermediate frequency signal comprises a limiter connected to receive the intermediate frequency signal to generate a carrier component of the intermediate frequency signal as an output, a phase locked loop circuit connected to receive one of the intermediate frequency signal and the carrier component from the limiter to generate an output signal which is phase-locked onto the carrier component of the intermediate frequency signal, a synchronous detector for synchronously detecting the intermediate frequency signal depended on the output signal from the phase locked loop circuit, and an automatic frequency circuit connected to receive the carrier component from the limiter and the output signal from the phase locked loop circuit to generate an output signal, as an automatic frequency tuning signal, in response to a frequency difference therebetween.
摘要翻译：一种用于处理中频信号的电路包括限幅器，其连接以接收中频信号以产生作为输出的中频信号的载波分量;锁相环电路，被连接以接收中频信号和载波分量之一从限幅器产生相位锁定在中频信号的载波分量上的输出信号，同步检波器，用于根据来自锁相环电路的输出信号同步检测中频信号;以及自动频率电路连接以从限幅器接收载波分量和来自锁相环电路的输出信号，以响应于它们之间的频率差而产生作为自动频率调谐信号的输出信号。

2. 发明授权

US06486695B1 Protecting unit 有权
标题翻译：保护单元
公开(公告)号：US06486695B1
公开(公告)日：2002-11-26
申请号：US09546558
申请日：2000-04-10
申请人： Chikashi Nakagawara
发明人： Chikashi Nakagawara
IPC分类号： H03K9007
CPC分类号： H03K5/08 , H04L25/08
摘要： A protecting unit is provided. The protecting unit can prevent accidents from occurring that become problems when data are transmitted due to for instance LVDS and for instance laser light is emitted based on the data. The protecting unit is applied in an instrument comprising an input end to which differential signal is transmitted, the input end being attachable to and detachable from an input line. Here, the voltage at the input end when the input line is not connected is set to a voltage different from that generated at the input end when the input line is connected, variation of the voltage at the input end is transmitted to an input terminal of a differential input/output circuit, and the voltage at the input end or a portion corresponding thereto is compared with a prescribed voltage to fix a state of output of the differential input/output circuit to a prescribed state based on the compared results.
摘要翻译：提供保护单元。保护单元可以防止发生数据由于例如LVDS而发生的问题，并且例如基于数据发射激光。保护单元被应用在包括输入端的仪器中，差分信号被传输到该输入端，该输入端可附接到输入线并可从输入线上拆卸。这里，输入线未连接时的输入端的电压被设定为与输入线连接时在输入端产生的电压不同的电压，输入端的电压的变化被发送到将差分输入/输出电路以及输入端或对应的部分的电压与规定电压进行比较，以根据比较结果将差分输入/输出电路的输出状态固定在规定状态。

3. 发明授权

US5126831A Clamping circuit 失效
标题翻译：钳位电路
公开(公告)号：US5126831A
公开(公告)日：1992-06-30
申请号：US677329
申请日：1991-03-29
申请人： Chikashi Nakagawara
发明人： Chikashi Nakagawara
IPC分类号： H04N5/18 , H04N9/72
CPC分类号： H04N9/72
摘要： In the clamping circuit, errors in direct current components contained in R, G and B signals from a matrix circuit are detected by comparing circuits and these errors are fed back to respective input capacitors through a reverse matrix circuit. The respective input capacitors are charged and discharged in response to the errors from the matrix circuit and the direct current parts of the outputs of the matrix circuit coincide so that the clamping levels of the outputs of the matrix circuit may coincide.

4. 发明授权

US5293514A Integrating filter circuit 失效
标题翻译：集成滤波电路
公开(公告)号：US5293514A
公开(公告)日：1994-03-08
申请号：US903486
申请日：1992-06-24
申请人： Chikashi Nakagawara
发明人： Chikashi Nakagawara
IPC分类号： H03F3/45 , H03H11/04 , H04N1/00 , H03K5/22 , H03K5/00
CPC分类号： H03H11/0422 , H03F3/45511 , H03F2203/45006 , H03F2203/45008 , H03F2203/45074 , H03F2203/45082 , H03F2203/45188 , H03F2203/45201 , H03F2203/45212 , H03F2203/45402 , H03F2203/45418 , H03F2203/45424 , H03F2203/45631 , H03F2203/45641
摘要： An integrating filter circuit having a reference potential source for supplying the integrating filter circuit with a prescribed reference potential, a transconductance circuit provided with a differential circuit, a variable current source couple to the differential circuit and output means coupled to the differential circuit for outputting an intermediate voltage of the outputs of the differential circuit, a common feedback loop with a comparison circuit coupled between the output means and the variable current source so as to stabilize the intermediate voltage in reference to a reference voltage supplied to the comparison circuit and capacitors coupled between the variable current source and the reference potential source.
摘要翻译：一种具有用于向积分滤波器电路提供规定参考电位的参考电位源的积分滤波器电路，设置有差分电路的跨导电路，耦合到差分电路的可变电流源和耦合到差分电路的输出装置，用于输出差分电路的输出的中间电压，与输出装置和可变电流源耦合的比较电路的公共反馈回路，以便相对于提供给比较电路的参考电压和耦合在比较电路之间的电容器来稳定中间电压可变电流源和参考电位源。

5. 发明授权

US5111154A Analog filter 失效
标题翻译：模拟滤波器
公开(公告)号：US5111154A
公开(公告)日：1992-05-05
申请号：US632948
申请日：1990-12-24
申请人： Chikashi Nakagawara
发明人： Chikashi Nakagawara
IPC分类号： H03H11/12 , H03H11/04
CPC分类号： H03H11/0422
摘要： An analog active filter for realizing the secondary transfer function by using an amplifier having a feedback loop having a first integrating function block which integrates an input signal, second and third integrating function blocks which integrate an output signal, a first signal combining function block which combines signals from the first and second integrating function blocks with the input signal, a fourth integrating function block which integrates signals from the first signal combining function block, and a second signal combining function block which combines signals from the third and fourth integrating function blocks with the input signal and derives the output signal.

6. 发明授权

US08253468B2 Clock generating circuit 有权
标题翻译：时钟发生电路
公开(公告)号：US08253468B2
公开(公告)日：2012-08-28
申请号：US13020948
申请日：2011-02-04
申请人： Chikashi Nakagawara
发明人： Chikashi Nakagawara
IPC分类号： H03K3/00
CPC分类号： H03K4/502
摘要： According to one embodiment, a clock generating circuit includes first and second current generating circuits, first and second voltage generating circuits, first and second comparing circuits, a clock output circuit, a control circuit. The first current generating circuit is configured to generate a first current. The first voltage generating circuit is configured to generate a first voltage which increases or decreases according to a phase of a clock signal as time advances by the first current. The first comparing circuit is configured to compare the first voltage with a first threshold voltage to generate a first comparison result. The second current generating circuit is configured to generate a second current. The second comparing circuit is configured to compare the second voltage with a second threshold voltage to generate a second comparison result. The clock output circuit is configured to generate the clock signal whose phase inverts in synchronization with timing when the first and the second comparison results change. The control circuit is configured to generate a random number and configured to variably control at least one of the first current, the second current, the first threshold voltage and the second threshold voltage according to the random number.
摘要翻译：根据一个实施例，时钟产生电路包括第一和第二电流产生电路，第一和第二电压产生电路，第一和第二比较电路，时钟输出电路，控制电路。第一电流产生电路被配置为产生第一电流。第一电压产生电路被配置为随着时间随着第一电流的前进而产生根据时钟信号的相位而增加或减小的第一电压。第一比较电路被配置为将第一电压与第一阈值电压进行比较以产生第一比较结果。第二电流产生电路被配置为产生第二电流。第二比较电路被配置为将第二电压与第二阈值电压进行比较以产生第二比较结果。时钟输出电路被配置为产生与第一和第二比较结果改变的定时同步地相位反转的时钟信号。控制电路被配置为产生随机数并且被配置为根据随机数来可变地控制第一电流，第二电流，第一阈值电压和第二阈值电压中的至少一个。

7. 发明申请

US20110273214A1 CLOCK GENERATING CIRCUIT 有权
标题翻译：时钟发生电路
公开(公告)号：US20110273214A1
公开(公告)日：2011-11-10
申请号：US13020948
申请日：2011-02-04
申请人： Chikashi Nakagawara
发明人： Chikashi Nakagawara
IPC分类号： H03K3/00
CPC分类号： H03K4/502
摘要： According to one embodiment, a clock generating circuit includes first and second current generating circuits, first and second voltage generating circuits, first and second comparing circuits, a clock output circuit, a control circuit. The first current generating circuit is configured to generate a first current. The first voltage generating circuit is configured to generate a first voltage which increases or decreases according to a phase of a clock signal as time advances by the first current. The first comparing circuit is configured to compare the first voltage with a first threshold voltage to generate a first comparison result. The second current generating circuit is configured to generate a second current. The second comparing circuit is configured to compare the second voltage with a second threshold voltage to generate a second comparison result. The clock output circuit is configured to generate the clock signal whose phase inverts in synchronization with timing when the first and the second comparison results change. The control circuit is configured to generate a random number and configured to variably control at least one of the first current, the second current, the first threshold voltage and the second threshold voltage according to the random number.
摘要翻译：根据一个实施例，时钟产生电路包括第一和第二电流产生电路，第一和第二电压产生电路，第一和第二比较电路，时钟输出电路，控制电路。第一电流产生电路被配置为产生第一电流。第一电压产生电路被配置为随着时间随着第一电流的前进而产生根据时钟信号的相位而增加或减小的第一电压。第一比较电路被配置为将第一电压与第一阈值电压进行比较以产生第一比较结果。第二电流产生电路被配置为产生第二电流。第二比较电路被配置为将第二电压与第二阈值电压进行比较以产生第二比较结果。时钟输出电路被配置为产生与第一和第二比较结果改变的定时同步地相位反转的时钟信号。控制电路被配置为产生随机数并且被配置为根据随机数来可变地控制第一电流，第二电流，第一阈值电压和第二阈值电压中的至少一个。

8. 发明申请

US20110063029A1 SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：半导体集成电路
公开(公告)号：US20110063029A1
公开(公告)日：2011-03-17
申请号：US12727509
申请日：2010-03-19
申请人： Akira Kumamoto , Tsuyoshi Nishimura , Chikashi Nakagawara , Masahiro Tamae
发明人： Akira Kumamoto , Tsuyoshi Nishimura , Chikashi Nakagawara , Masahiro Tamae
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45977 , H03F2203/45212 , H03F2203/45588 , H03F2203/45616
摘要： A semiconductor integrated circuit includes a first input terminal configured to input a first input voltage, a second input terminal configured to input a second input voltage, a differential amplifier configured to generate a differential output voltage by amplifying a differential input voltage obtained from a difference between the first input voltage input by the first input terminal and the second input voltage input by the second input terminal, a switch configured to electrically connect or cut off the first input terminal and the second input terminal, and a sample hold unit connected to a power supply which generates a reference voltage and configured to generate an offset correction voltage of the differential amplifier based on the differential output voltage and the reference voltage when the first input terminal and the second input terminal are electrically connected by the switch.
摘要翻译：半导体集成电路包括被配置为输入第一输入电压的第一输入端子和被配置为输入第二输入电压的第二输入端子，差分放大器，被配置为通过放大由差分输入电压由第一输入端子输入的第一输入电压和由第二输入端子输入的第二输入电压，被配置为电连接或切断第一输入端子和第二输入端子的开关，以及连接到电力的采样保持单元电源，其产生参考电压，并且被配置为当第一输入端子和第二输入端子通过开关电连接时，基于差分输出电压和参考电压产生差分放大器的偏移校正电压。

9. 发明授权

US08680867B2 Battery monitoring circuit and battery monitoring system 有权
标题翻译：电池监控电路和电池监控系统
公开(公告)号：US08680867B2
公开(公告)日：2014-03-25
申请号：US13232783
申请日：2011-09-14
申请人： Chikashi Nakagawara
发明人： Chikashi Nakagawara
IPC分类号： G01N27/416 , H02J7/00
CPC分类号： G01R31/3658 , G01R31/362
摘要： A battery monitoring circuit monitors voltages of a plurality of secondary cells connected in series. The battery monitoring circuit comprises a first switch element, a second switch element, a third switch element, and a first capacitor. The battery monitoring circuit comprises an operational amplifier of which an inverting input terminal is connected to a second end of the first capacitor, a non-inverting input terminal is connected to a fixed potential, and an output is connected to the second end of the first capacitor. The battery monitoring circuit comprises an A/D converter which performs analog-to-digital conversion on a signal output by the operational amplifier and outputs an obtained digital signal. The battery monitoring circuit comprises a control circuit which performs on/off control on the first to third switch elements and controls operations of the operational amplifier and the A/D converter.
摘要翻译：电池监视电路监视串联连接的多个二次电池的电压。电池监视电路包括第一开关元件，第二开关元件，第三开关元件和第一电容器。电池监视电路包括：运算放大器，其反相输入端子连接到第一电容器的第二端，非反相输入端子连接到固定电位，并且输出端连接到第一电容器的第二端电容器。电池监视电路包括对由运算放大器输出的信号执行模数转换并输出所获得的数字信号的A / D转换器。电池监视电路包括对第一至第三开关元件执行开/关控制并控制运算放大器和A / D转换器的操作的控制电路。

10. 发明授权

US08643352B2 Switching power supply control with reduced harmonic frequency fluctuations 有权
标题翻译：开关电源控制具有降低的谐波频率波动
公开(公告)号：US08643352B2
公开(公告)日：2014-02-04
申请号：US12884128
申请日：2010-09-16
申请人： Chikashi Nakagawara
发明人： Chikashi Nakagawara
IPC分类号： G05F1/575
CPC分类号： H02M3/156
摘要： According to embodiments, a switching power supply control apparatus causes a switching element to perform an ON/OFF once in each period of a clock signal, when an output voltage of a switching power supply formed by charging a capacitor with a current of a choke coil that stores/releases current energy in conjunction with the ON/OFF operation of the switching element is adjusted by exercising ON/OFF control of the switching element based on comparator output that compares the output voltage with a reference voltage.
摘要翻译：根据实施例，开关电源控制装置使得开关元件在时钟信号的每个周期中执行ON / OFF一次，当通过用扼流线圈的电流对电容器充电而形成的开关电源的输出电压通过基于将输出电压与参考电压进行比较的比较器输出进行开关元件的ON / OFF控制来调节与开关元件的ON / OFF操作一起存储/释放电流的能量。

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