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1. 发明授权

US4961052A Probing plate for wafer testing 失效
标题翻译：探测板用于晶圆测试
公开(公告)号：US4961052A
公开(公告)日：1990-10-02
申请号：US380427
申请日：1989-07-17
申请人： Tetsuo Tada , Ryoichi Takagi , Masanobu Kohara
发明人： Tetsuo Tada , Ryoichi Takagi , Masanobu Kohara
IPC分类号： G01R31/26 , G01R1/073 , H01L21/66
CPC分类号： G01R1/07342
摘要： A probing plate for wafer testing is provided with a plurality of probes arranged so as to correspond to a plurality of bonding pads of semiconductor devices fabricated on a semiconductor wafer. The probing plate has a base plate formed of an insulating material, such as a photosensitive glass, and has contact fingers each having a raised portion in the free end thereof, contact conductors respectively formed on the surfaces of the raised portions of the contact fingers so as to be brought into contact with the corresponding bonding pads, and wiring conductors formed in a predetermined pattern on the surface of the base plate so as to extend respectively from the contact conductors. The contact conductors and the wiring conductors are formed simultaneously by a photolithographic process. The contact fingers and the raised portions thereof are also formed by subjecting the base plate to a photolithographic process. Forming the contact conductors over the surfaces of the raised portions of the contact fingers prevents accidental contact of the contact conductors with the bonding pads of semiconductor devices other than the objective semiconductor devices.
摘要翻译：用于晶片测试的探测板设置有多个探针，其布置成对应于制造在半导体晶片上的多个半导体器件的焊盘。探测板具有由诸如感光玻璃的绝缘材料形成的基板，并且具有在其自由端中具有凸起部分的接触指状物，分别形成在接触指尖的凸起部分的表面上的接触导体与相应的接合焊盘和在基板的表面上以预定图案形成的布线导体接触，以便分别从接触导体延伸。接触导体和布线导体通过光刻工艺同时形成。接触指及其凸起部分也通过使基板进行光刻工艺而形成。在接触指状物的凸起部分的表面上形成接触导体可防止接触导体与物镜半导体器件以外的半导体器件的接合焊盘意外接触。

2. 发明授权

US5055780A Probe plate used for testing a semiconductor device, and a test apparatus therefor 失效
标题翻译：用于测试半导体器件的探针板及其测试装置
公开(公告)号：US5055780A
公开(公告)日：1991-10-08
申请号：US474609
申请日：1990-02-05
申请人： Ryouichi Takagi , Tetsuo Tada , Masanobu Kohara
发明人： Ryouichi Takagi , Tetsuo Tada , Masanobu Kohara
IPC分类号： G01R31/28 , G01R1/04 , G01R1/073 , H01L21/66
CPC分类号： G01R1/04
摘要： A test apparatus for a semiconductor device is provided to be used for testing, wafer by wafer, a semiconductor device formed on a semiconductor wafer. The test apparatus for a semiconductor device comprises a test head, a probe card and a selection circuit. The probe card has an insulating transparent base plate, and protruding parts are formed on the main surface of the base plate corresponding to electrode pads on a test object semiconductor wafer, and conductive layer forming a prober for the electrode pad is formed on the surface of each of these protruding parts. A wiring layer is formed on the surface opposite to the main surface. The wiring layer and the probers are connected electrically through the through holes provided on the base plate. A prober to be connected to the test head is switched electrically, which makes it possible to test a semiconductor device without moving the corresponding semiconductor wafer.
摘要翻译：提供一种用于半导体器件的测试装置，用于测试晶片晶片，半导体晶片上形成的半导体器件。半导体器件的测试装置包括测试头，探针卡和选择电路。探针卡具有绝缘的透明基板，并且在基板的主表面上形成与测试对象半导体晶片上的电极焊盘相对应的突出部分，并且形成用于电极焊盘的探测器的导电层形成在每个这些突出部分。在与主表面相对的表面上形成布线层。布线层和探针通过设置在基板上的通孔电连接。要连接到测试头的探测器被电切换，这使得可以在不移动对应的半导体晶片的情况下测试半导体器件。

3. 发明授权

US5091772A Semiconductor device and package 失效
标题翻译：半导体器件和封装
公开(公告)号：US5091772A
公开(公告)日：1992-02-25
申请号：US405313
申请日：1989-09-11
申请人： Masanobu Kohara , Takashi Kondo , Yomiyuki Yama
发明人： Masanobu Kohara , Takashi Kondo , Yomiyuki Yama
IPC分类号： H01L21/60 , H01L23/13 , H01L23/495
CPC分类号： H01L24/85 , H01L23/13 , H01L23/49558 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/451 , H01L2224/4809 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/484 , H01L2224/4899 , H01L2224/49109 , H01L2224/4917 , H01L2224/49171 , H01L2224/49433 , H01L24/45 , H01L2924/00014 , H01L2924/01013 , H01L2924/01015 , H01L2924/01025 , H01L2924/01033 , H01L2924/01042 , H01L2924/01074 , H01L2924/01082 , H01L2924/07802 , H01L2924/15153 , H01L2924/15157 , H01L2924/15165 , H01L2924/15312 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/30105
摘要： A package body for accommodating a semiconductor chip includes a plurality of inner-electrodes disposed on the package body and arranged in a multiplicity of rows around the semiconductor chip and outer-electrodes in the package body electrically connected to the corresponding inner-electrodes. The package body includes support sections disposed on the package body between the rows of inner-electrodes for supporting metal wires which connect the inner-electrodes to the electrodes of the semiconductor chip. A conductive layer for diminishing the floating capacitance between the metal wires may be included in the support sections.
摘要翻译：用于容纳半导体芯片的封装体包括多个设置在封装主体上的内部电极，并且在电连接到相应的内部电极的封装体中围绕半导体芯片和外部电极布置成多行。封装体包括支撑部分，该支撑部分布置在内部电极列之间的封装主体上，用于支撑将内部电极连接到半导体芯片的电极的金属线。用于减小金属线之间的浮动电容的导电层可以包括在支撑部分中。

4. 发明授权

US4937656A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US4937656A
公开(公告)日：1990-06-26
申请号：US273557
申请日：1988-11-21
申请人： Masanobu Kohara
发明人： Masanobu Kohara
IPC分类号： H01L23/495
CPC分类号： H01L23/49541 , H01L23/4951 , H01L2224/05553 , H01L2224/05554 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01013 , H01L2924/01028 , H01L2924/01068 , H01L2924/01079 , H01L2924/07802 , H01L2924/181
摘要： A semiconductor device provided with a semiconductor chip having first and second surface facing in the opposite directions, electrodes on the first surface; a plurality of leads disposed parallel with each other along the second surface of the semiconductor chip and each having opposite ends respectively extending outward from opposite sides of the second surface; a wire electrically connecting one end of each lead and one of the electrodes of the semiconductor chip; a resin enclosing the semiconductor chip, the ends of the leads connected to the electrodes, and the wires. The leads extend across the second surface of the semiconductor chip so that a relatively long length each lead embedded in the resin and the wire bonding portions of the leads are located in the vicinity of the sides of the semiconductor chip, thereby improving the releability of the device and the ease of to wire bonding.
摘要翻译：一种具有半导体芯片的半导体器件，具有朝向相反方向的第一和第二表面，第一表面上的电极; 沿着所述半导体芯片的所述第二表面彼此平行设置并且各自具有分别从所述第二表面的相对侧向外延伸的相对端的多个引线; 电连接每个引线的一端和半导体芯片的一个电极的导线; 封装半导体芯片的树脂，连接到电极的引线的端部和导线。引线延伸穿过半导体芯片的第二表面，使得嵌入在树脂中的引线相对较长的长度和引线的引线接合部分位于半导体芯片的侧面附近，从而提高了器件和易于引线接合。

5. 发明授权

US5175399A Wiring panel including wiring having a surface-reforming layer and method for producing the same 失效
标题翻译：包括具有表面改性层的布线的布线面板及其制造方法
公开(公告)号：US5175399A
公开(公告)日：1992-12-29
申请号：US572245
申请日：1990-08-27
申请人： Mitsumasa Mori , Eishi Gofuku , Mitsuyuki Takada , Kurumi Miyake , Yoshiyuki Morihiro , Masanobu Kohara
发明人： Mitsumasa Mori , Eishi Gofuku , Mitsuyuki Takada , Kurumi Miyake , Yoshiyuki Morihiro , Masanobu Kohara
IPC分类号： H01L21/48 , H01L23/14 , H05K1/03 , H05K3/38 , H05K3/46
CPC分类号： H05K3/382 , H01L21/4846 , H01L23/145 , H05K3/38 , H05K3/385 , H01L2924/0002 , H05K1/0346 , H05K2201/0154 , H05K2201/2063 , H05K2203/025 , H05K2203/0315 , H05K3/4644
摘要： Disclosed herein is a wiring panel constructed with a substrate; an electrically conductive member laminated on the substrate and principally composed of copper; and an insulating member composed of an organic substance, wherein a very small amount of a non-metallic element is incorporated into the electrically conductive member, and a very small amount of a metal element is incorporated into the insulating member.Also disclosed herein is a method for producing a wiring panel constructed with a substrate, an electrically conductive member provided on the substrate and composed of copper as the principal constituent, and an insulating layer of an organic substance covering the conductive member, which comprises steps of: applying onto the surface of the electrically conductive member a surface-reforming layer which functions to suppress electron transfer through the surface of the electrically conductive member, and thereafter forming the organic insulating layer on the electrically conductive member.
摘要翻译：本文公开了一种由基板构成的布线板; 层压在基板上并主要由铜构成的导电构件; 以及由有机物构成的绝缘构件，其中非常少量的非金属元素被结合到导电构件中，并且极少量的金属元素被引入到绝缘构件中。本文还公开了一种制造布线板的方法，该布线板由基板，设置在基板上的由铜作为主要成分构成的导电部件和覆盖导电部件的有机物质的绝缘层构成，该方法包括以下步骤：：在导电构件的表面上施加用于抑制通过导电构件的表面的电子转移，然后在导电构件上形成有机绝缘层的表面重整层。

6. 发明授权

US5018003A Lead frame and semiconductor device 失效
标题翻译：引线框架和半导体器件
公开(公告)号：US5018003A
公开(公告)日：1991-05-21
申请号：US571842
申请日：1990-08-21
申请人： Masatoshi Yasunaga , Masanobu Kohara
发明人： Masatoshi Yasunaga , Masanobu Kohara
IPC分类号： H01L21/56 , H01L23/495
CPC分类号： H01L21/565 , H01L23/49503 , H01L24/50 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/181 , Y10T29/49121
摘要： A lead frame includes a die pad for mounting thereon a semiconductor chip having a plurality of electrodes, a plurality of leads for electrical connection with the plurality of electrodes of the semiconductor chip, an outer frame disposed on the periphery of the die pad for supporting the die pad and the plurality of leads, and a resin guide portion extending to the vicinity of the die pad from the outer frame for guiding molten resin over and under the semiconductor chip during resin packaging. A semiconductor device manufacturing method includes mounting a semiconductor chip having electrodes on a substrate having a resin guiding portion for guiding a resin over and under the semiconductor chip during resin packaging; electrically connecting leads on the substrate to the electrodes; positioning the semiconductor chip and the substrate between a pair of mold halves injecting a molten resin into the mold to fill the cavity; and solidifying the resin.
摘要翻译：引线框架包括用于安装其上具有多个电极的半导体芯片的芯片焊盘，用于与半导体芯片的多个电极电连接的多个引线，设置在芯片焊盘周边上的外框，用于支撑芯片焊盘和多个引线，以及树脂引导部，其从外框延伸到芯片焊盘附近，用于在树脂封装期间将熔融树脂引导到半导体芯片的上方和下方。一种半导体器件制造方法，包括在具有树脂引导部分的基板上安装具有电极的半导体芯片，用于在树脂封装期间将树脂引导到半导体芯片之上和之下; 将基板上的导线电连接到电极; 将半导体芯片和基板定位在将熔融树脂注入模具中以填充空腔的一对半模之间; 并固化树脂。

7. 发明授权

US4907061A Electronic device 失效
标题翻译：电子设备
公开(公告)号：US4907061A
公开(公告)日：1990-03-06
申请号：US107396
申请日：1987-10-06
申请人： Masanobu Kohara
发明人： Masanobu Kohara
IPC分类号： H01L23/50 , H01L21/60 , H01L23/495 , H01L23/498
CPC分类号： H01L23/49855 , H01L23/49572 , H01L2924/0002
摘要： The electronic device relating to the invention is that in which an electrode is formed on the rear side surface of a semiconductor element, a circuit wiring and an external electrode connected electrically to one end of the circuit wiring are formed on the rear side surface of a flexible insulating film with a first opening provided therefor, a lead terminal overhanging to the first opening is connected electrically to the other end of the circuit wiring, a second opening is formed on the flexible insulating film so as to expose a part of the external electrode, a package substrate is constituted of the flexible insulating film in tape assembly system, the circuit wiring, the external electrode and the lead terminal, the semiconductor element is disposed on the rear side surface side of the flexible insulating film under the first opening and the lead terminal is connected electrically and mechanically thereto, a part or the whole of the semiconductor element, the electrode, the lead terminal, a part of the circuit wiring and the first opening are sealed with a sealing resin, a semiconductor device is constituted of the semiconductor element, the electrode, the package substrate and the sealing resin, the semiconductor device is mounted in a recession formed on the front side of a thin flexible substrate like IC card so as to make the front side surface of the flexible insulating film coincide with the front side surface of the thin flexible substrate.
摘要翻译：本发明的电子设备是在半导体元件的背面形成有电极的电路布线和与电路布线的一端电连接的电路布线和外部电极形成在电路布线的背面侧具有第一开口的柔性绝缘膜，突出到第一开口的引线端子电连接到电路布线的另一端，在柔性绝缘膜上形成第二开口以暴露外部电极的一部分封装基板由带组装系统中的柔性绝缘膜，电路布线，外部电极和引线端子构成，半导体元件设置在柔性绝缘膜的第一开口的后侧表面侧，引线端子电连接和机械连接，半导体元件，电极，引线的一部分或全部端子，电路布线的一部分和第一开口用密封树脂密封，半导体器件由半导体元件，电极，封装基板和密封树脂构成，半导体器件安装在形成在薄型柔性基板如IC卡的前侧，以使柔性绝缘膜的前侧表面与薄柔性基板的前侧表面一致。

8. 发明授权

US5773879A Cu/Mo/Cu clad mounting for high frequency devices 失效
标题翻译：用于高频器件的Cu / Mo / Cu复合安装
公开(公告)号：US5773879A
公开(公告)日：1998-06-30
申请号：US015007
申请日：1993-02-09
申请人： Tosihiro Fusayasu , Kenji Kagata , Hirotugu Yamada , Isao Kitamura , Masanobu Kohara , Mitsuyuki Takada
发明人： Tosihiro Fusayasu , Kenji Kagata , Hirotugu Yamada , Isao Kitamura , Masanobu Kohara , Mitsuyuki Takada
IPC分类号： H01L23/06 , H01L23/66 , H01L23/02 , H01L23/10 , H01L23/12
CPC分类号： H01L23/06 , H01L23/66 , H01L2224/32188 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L24/45 , H01L24/48 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/15165 , H01L2924/1517 , H01L2924/16152 , H01L2924/16195 , H01L2924/3011
摘要： The semiconductor package and manufacturing method thereof whereby the inexpensive package of high thermal conductivity is obtained by applying a Cu/Mo/Cu clad material for a base plate which matches the thermal expansion of a semiconductor chip, and the inexpensive package with high heat transfer suitable for a high frequency device is obtained by controlling a thickness of glass, and a size of a lead (width, thickness), thereby to match impedance of a wiring portion with that of the semiconductor chip, by plating only necessary areas with Au, and by plating the exterior with Sn.
摘要翻译：通过对与半导体芯片的热膨胀相匹配的用于基板的Cu / Mo / Cu复合材料和与传热适应性良好的廉价的封装相比，可获得具有高导热性的廉价封装的半导体封装及其制造方法通过控制玻璃的厚度和引线的尺寸（宽度，厚度）来获得高频器件，从而通过用Au镀覆必需的区域来匹配布线部分与半导体芯片的阻抗;以及通过用Sn电镀外部。

9. 发明授权

US4799093A Semiconductor memory device having a mos transistor and superposed capacitor 失效
标题翻译：具有mos晶体管和叠加电容器的半导体存储器件
公开(公告)号：US4799093A
公开(公告)日：1989-01-17
申请号：US611929
申请日：1984-05-22
申请人： Masanobu Kohara , Hiroshi Shibata
发明人： Masanobu Kohara , Hiroshi Shibata
IPC分类号： H01L27/10 , G11C11/24 , H01L21/8242 , H01L27/108 , H01L29/78 , H01L23/48 , H01L27/02 , H01L29/34
CPC分类号： G11C11/24 , H01L27/10808
摘要： A semiconductor memory device including a MOS transistor having source and drain electrodes formed on a surface of a semiconductor substrate; an insulating layer formed on a surface of the semiconductor substrate; a first conductive layer which is connected to the source or drain electrodes and is extended on the surface of the insulating layer through the insulating layer; a dielectric layer formed on the surface of said first conductive layer; and a second conductive layer formed on the dielectric layer opposite the first conductive layer, wherein the first conductive layer, the dielectric layer and the second conductive form a capacitor for a memory element.
摘要翻译：一种半导体存储器件，包括形成在半导体衬底的表面上的源极和漏极的MOS晶体管; 形成在所述半导体衬底的表面上的绝缘层; 第一导电层，其连接到源极或漏极，并且通过绝缘层在绝缘层的表面上延伸; 形成在所述第一导电层的表面上的电介质层; 以及形成在与所述第一导电层相对的所述电介质层上的第二导电层，其中所述第一导电层，所述介电层和所述第二导电形成用于存储元件的电容器。

10. 发明授权

US4654966A Method of making a dimensionally stable semiconductor device 失效
标题翻译：制造尺寸稳定的半导体器件的方法
公开(公告)号：US4654966A
公开(公告)日：1987-04-07
申请号：US783537
申请日：1985-10-03
申请人： Masanobu Kohara , Shin Nakao , Hiroshi Shibata
发明人： Masanobu Kohara , Shin Nakao , Hiroshi Shibata
IPC分类号： H01L23/367 , H01L23/40 , H01L23/433 , H05K3/34
CPC分类号： H01L23/433 , H01L23/367 , H01L23/4006 , H01L2023/4043 , H01L2023/4062 , H01L2023/4068 , H01L2224/16 , H01L2224/73253 , H01L2924/15312 , H01L2924/16152 , H01L2924/16195 , Y10T29/49144
摘要： A heat dissipating member including a heat sink is placed on a module base board with flip-chips mounted thereon, with metallic plates and first adhesive materials of a good thermal conductivity interposed between the heat dissipating member and the flip-chips in a close contact relation and with a second adhesive material interposed between the heat dissipating member and the base board, wherein the first adhesive material is selected to have a melting point lower than that of the second adhesive material, and then such an assembly is heated so that both the first and second adhesive materials are melted and the metallic plates are mounted onto the flip-chips and the heat dissipating member is mounted onto the base board. A gap is formed between the metallic plates and the heat dissipating member as a result of earlier solidification of the second adhesive material than that of the first adhesive material so as to be precisely controlled such that a heat transferring effect therebetween may not be degraded.
摘要翻译：包括散热器的散热构件被放置在具有安装在其上的倒装芯片的模块基板上，金属板和具有良好导热性的第一粘合材料以紧密接触的方式插入在散热构件和倒装芯片之间并且插入在散热构件和基板之间的第二粘合材料，其中第一粘合材料被选择为具有低于第二粘合材料的熔点，然后将这种组件加热，使得第一粘合材料并且第二粘合剂材料被熔化并且金属板安装到倒装芯片上，并且散热构件安装在基板上。由于第二粘合剂材料的凝固比第一粘合剂材料更早凝固，所以金属板和散热构件之间形成有间隙，从而可以精确地控制其间的传热效果。

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