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1. 发明授权

US4412189A Switchable signal compressor/signal expander 失效
标题翻译：可切换信号压缩器/信号扩展器
公开(公告)号：US4412189A
公开(公告)日：1983-10-25
申请号：US262814
申请日：1981-05-12
申请人： Yasuo Kominami , Tetsuo Sato , Yuichi Ohkubo
发明人： Yasuo Kominami , Tetsuo Sato , Yuichi Ohkubo
IPC分类号： H03G9/02 , H04B1/64
CPC分类号： H03G9/025
摘要： Either an input signal of a combining network or an output signal of an inverter arranged on a main path is fed to a side path through a mode switch in a switchable signal compressor/signal expander. Since an input terminal of a control amplifier is connected to a variable filter without passing through a signal amplifier, the deviation of the detection characteristic of a rectifier and integrator attributed to D.C. offset voltages of the signal amplifier and the control amplifier can be reduced. On the other hand, a switchable signal compressor/signal expander in another aspect of performance has a reference voltage generator for producing a D.C. reference voltage, and the output D.C. level of the control amplifier is maintained at a level approximate to the D.C. reference voltage. The other ends of first and second capacitors of the rectifier and integrator are also supplied with the D.C. reference voltage, so that the fluctuation of the detection characteristic of the rectifier and integrator ascribable to the fluctuation of the D.C. reference voltage is reduced.
摘要翻译：组合网络的输入信号或布置在主路径上的反相器的输出信号被馈送到可切换信号压缩器/信号扩展器中的模式开关的侧路径。由于控制放大器的输入端子连接到可变滤波器而不通过信号放大器，所以可以减小归因于信号放大器和控制放大器的直流偏移电压的整流器和积分器的检测特性的偏差。另一方面，另一方面的可切换信号压缩器/信号扩展器具有用于产生直流参考电压的参考电压发生器，并且控制放大器的输出直流电平保持在接近直流参考电压的电平。整流器和积分器的第一和第二电容器的另一端还具有直流参考电压，从而降低归因于直流参考电压的波动的整流器和积分器的检测特性的波动。

2. 发明授权

US4500932A Signal processing circuit 失效
标题翻译：信号处理电路
公开(公告)号：US4500932A
公开(公告)日：1985-02-19
申请号：US384602
申请日：1982-06-03
申请人： Tetsuo Sato , Yasuo Kominami
发明人： Tetsuo Sato , Yasuo Kominami
IPC分类号： G11B5/035 , G11B5/45 , G11B5/02
CPC分类号： G11B5/035
摘要： A signal processing circuit which can be used, for example, as a playback equalizer is formed in a semiconductor integrated circuit with a main path and a side path arrayed between the input terminal and the output terminal of the integrated circuit. The signals at the ends of the main and side paths are added together to obtain the output signal for the signal processor. A filter in the main path determines its frequency characteristics. On the other hand, a variable gain control means having substantially flat frequency characteristics is inserted in the side path and its gain can be changed in response to control data to control the output signal of the signal processor.
摘要翻译：可以用作例如重放均衡器的信号处理电路形成在具有排列在集成电路的输入端子和输出端子之间的主路径和侧向通道的半导体集成电路中。将主路和侧路径两端的信号相加在一起以获得信号处理器的输出信号。主路径中的滤波器决定其频率特性。另一方面，具有基本上平坦的频率特性的可变增益控制装置插入在侧路径中，并且可以响应于控制数据改变其增益，以控制信号处理器的输出信号。

3. 发明授权

US4354209A Recording/playing circuit 失效
标题翻译：录音/播放电路
公开(公告)号：US4354209A
公开(公告)日：1982-10-12
申请号：US231369
申请日：1981-02-03
申请人： Tetsuo Sato , Yasuo Kominami
发明人： Tetsuo Sato , Yasuo Kominami
IPC分类号： G11B20/02 , G11B23/00 , H03G9/02 , G11B15/12 , G11B5/02
CPC分类号： H03G9/025 , G11B23/0007
摘要： A recording/playing circuit includes a noise reduction circuit, a switching circuit and a control circuit. The noise reduction circuit includes a pre-amplifier, a combining network, an inverter circuit and a side chain. The switching circuit has first, second and third input positions and an output terminal. The first input position is coupled to the output of the pre-amplifier, the second input position is coupled to the output of the inverter circuit, and the output terminal is coupled to the side chain. The third input position is connected to a muting circuit. The control circuit controls the switching circuit so that one of the electric signals applied to the first, second and third input positions of the switching circuit may be selectively transmitted to the output terminal of the switching circuit.
摘要翻译：记录/播放电路包括噪声降低电路，开关电路和控制电路。降噪电路包括前置放大器，组合网络，逆变器电路和侧链。开关电路具有第一，第二和第三输入位置和输出端子。第一输入位置耦合到前置放大器的输出，第二输入位置耦合到反相器电路的输出，输出端耦合到侧链。第三输入位置连接到静音电路。控制电路控制开关电路，使得施加到开关电路的第一，第二和第三输入位置的电信号中的一个可以选择性地发送到开关电路的输出端子。

4. 发明授权

US4510458A Amplifier circuit 失效
标题翻译：放大器电路
公开(公告)号：US4510458A
公开(公告)日：1985-04-09
申请号：US409051
申请日：1982-08-18
申请人： Tetsuo Sato , Yasuo Kominami , Yoshiyuki Takizawa , Akira Haeno
发明人： Tetsuo Sato , Yasuo Kominami , Yoshiyuki Takizawa , Akira Haeno
IPC分类号： H03F1/34 , H03F1/32 , H03F3/45
CPC分类号： H03F1/3223
摘要： An amplifier circuit has an operational amplifier and a negative feedback circuit. An input signal is applied to the non-inverting input terminal of the operational amplifier, whereby a first output signal is provided from the output terminal of the operational amplifier. The first output signal is fed back to the inverting input terminal of the operational amplifier through the negative feedback circuit. The negative feedback signal of the negative feedback circuit is fed back to the inverting input terminal through an impedance converter. Thus, a second output signal of low distortion factor is derived from the output terminal of the impedance converter.
摘要翻译：放大器电路具有运算放大器和负反馈电路。输入信号被施加到运算放大器的非反相输入端，由此从运算放大器的输出端提供第一输出信号。第一输出信号通过负反馈电路反馈到运算放大器的反相输入端。负反馈电路的负反馈信号通过阻抗转换器反馈到反相输入端。因此，从阻抗转换器的输出端导出低失真因子的第二输出信号。

5. 发明授权

US4473852A Noise reduction system 失效
标题翻译：降噪系统
公开(公告)号：US4473852A
公开(公告)日：1984-09-25
申请号：US412001
申请日：1982-08-27
申请人： Yasuo Kominami , Kazuo Watanabe , Fumihiko Yokogawa , Nobuhiro Suzuki
发明人： Yasuo Kominami , Kazuo Watanabe , Fumihiko Yokogawa , Nobuhiro Suzuki
IPC分类号： H04B1/62 , G11B20/04 , G11B20/24 , H03G9/02 , H04B1/64 , G11B5/47 , G11B5/02
CPC分类号： H03G9/025
摘要： Conventional Dolby B-type or C-type noise reduction systems respond sensitively to an A.C. bias signal during recording onto a magnetic tape. As a result, the system might exhibit a large encode error. In order to reduce such encode error, the gain - frequency characteristic control sensitivity of a side chain in the system to the A.C. bias signal to be supplied to a recording head is set at a value smaller than that of the gain - frequency characteristic control sensitivity of the side chain to an encode input signal at an audio frequency. Such a reduction of the encode error is achieved by connecting a bias trap circuit to a gain control amplifier included in the side chain.
摘要翻译：传统的杜比B型或C型降噪系统在记录到磁带上时敏感地响应于A.C.偏差信号。因此，系统可能会出现较大的编码错误。为了减少这种编码误差，系统中侧链的增益 - 频率特性控制灵敏度被提供给记录头的AC偏置信号被设置为小于增益 - 频率特性控制灵敏度的侧链到音频的编码输入信号。通过将偏置捕获电路连接到侧链中包括的增益控制放大器来实现编码误差的这种减少。

6. 发明授权

US4282448A Monostable multivibrator and FM detector circuit employing common emitter transistor amplifier with plural emitter resistors to avoid circuit operation from signal noise 失效
标题翻译：采用具有多个发射极电阻的公共发射极晶体管放大器的Monostable多谐振荡器和FM检波器电路，以避免信号噪声的电路运行
公开(公告)号：US4282448A
公开(公告)日：1981-08-04
申请号：US969085
申请日：1978-12-13
申请人： Takeshi Wada , Masanori Ienaka , Yasuo Kominami , Yukihiko Miyamoto , Tsuneo Yamada
发明人： Takeshi Wada , Masanori Ienaka , Yasuo Kominami , Yukihiko Miyamoto , Tsuneo Yamada
IPC分类号： H03D3/04 , H03K3/013 , H03K3/02 , H03K3/023 , H03K3/0232 , H03K3/033 , H03K17/16
CPC分类号： H03D3/04 , H03K3/013 , H03K3/023
摘要： This invention discloses a monostable multivibrator which is useful for an FM detector circuit of a pulse count system. The monostable multivibrator has a time constant circuit which includes a capacitor, an amplifier circuit which receives an output of the time constant circuit, a positive feedback circuit which is connected between an output end of the amplifier circuit and an input end of the time constant circuit, and a trigger terminal which is disposed in a circuit loop constructed of the time constant circuit, the amplifier circuit and the positive feedback circuit; and is characterized in that the amplifier circuit is a differential amplifier which is made up of a pair of transistors connected in the differential form, the transistors being connected in common through emitter resistances connected in series with respective emitters thereof. Thus, the monostable multivibrator can provide pulse signals of a fixed pulse width without being influenced by noise.
摘要翻译：本发明公开了一种可用于脉冲计数系统的FM检测器电路的单稳态多谐振荡器。单稳态多谐振荡器具有时间常数电路，其包括电容器，接收时间常数电路的输出的放大器电路，连接在放大器电路的输出端和时间常数电路的输入端之间的正反馈电路以及设置在由时间常数电路，放大电路和正反馈电路构成的电路回路中的触发端子; 并且其特征在于放大电路是由以差分形式连接的一对晶体管构成的差分放大器，晶体管通过与其各自的发射极串联连接的发射极电阻共同连接。因此，单稳态多谐振荡器可以提供固定脉冲宽度的脉冲信号，而不受噪声的影响。

7. 发明授权

US4030035A Circuit for preventing output clipping of R.F. stage in radio receiver 失效
标题翻译：用于防止R.F.的输出限幅的电路无线电接收机的舞台
公开(公告)号：US4030035A
公开(公告)日：1977-06-14
申请号：US617638
申请日：1975-09-29
申请人： Masanori Ienaka , Yasuo Kominami , Yukio Suzuki , Masami Kawamura
发明人： Masanori Ienaka , Yasuo Kominami , Yukio Suzuki , Masami Kawamura
IPC分类号： H03G3/20 , H03G3/30 , H04B1/16
CPC分类号： H03G3/3068
摘要： In a receiver comprising a radio frequency amplifier stage, a frequency converter stage, an intermediate frequency amplifier stage and a detector, so that the gains of the radio frequency amplifier stage and the intermediate frequency amplifier stage are automatically controlled by an AGC voltage derived from the detector, the improvement further comprising a voltage comparator which compares a signal amplitude value of the radio frequency amplifier stage and a predetermined reference value and which provides a detection output signal when the former value becomes greater than the latter value, the gain of the radio frequency amplifier stage being reduced by the detection output signal so as to prevent the output clipping of the radio frequency amplifier stage.
摘要翻译：在包括射频放大器级，频率转换器级，中频放大器级和检测器的接收器中，使得射频放大器级和中频放大级的增益由源自所述改进还包括电压比较器，其比较所述射频放大器级的信号幅度值和预定参考值，并且当所述前一值变得大于后一值时提供检测输出信号，所述射频增益放大器级被检测输出信号减小，以防止射频放大器级的输出限幅。

8. 发明授权

US4297601A Monostable multivibrator circuit and FM detector circuit employing predetermined load resistance and constant current to increase response rate of differential transistor pair 失效
标题翻译：单稳态多谐振荡器电路和FM检测电路采用预定的负载电阻和恒定电流来提高差分晶体管对的响应速率
公开(公告)号：US4297601A
公开(公告)日：1981-10-27
申请号：US3962
申请日：1979-01-16
申请人： Takeshi Wada , Yasuo Kominami , Yukihiko Miyamoto , Tsuneo Yamada
发明人： Takeshi Wada , Yasuo Kominami , Yukihiko Miyamoto , Tsuneo Yamada
IPC分类号： H03K3/013 , H03D3/04 , H03K3/02 , H03K3/023 , H03K3/0232 , H03K5/04 , H03K9/06 , H03K5/12 , H03K3/284
CPC分类号： H03K5/04 , H03D3/04 , H03K3/023 , H03K9/06
摘要： A monostable multivibrator circuit is disclosed. It is characterized by comprising a time constant circuit which includes a capacitor, an amplifier circuit which receives an output signal of the time constant circuit and in which a signal amplifying transistor operates in the non-saturated state, a positive feedback circuit which is connected between the output end of the amplifier circuit and the input end of the time constant circuit and in which a signal amplifying transistor operates in the non-saturated state, and a trigger terminal which is disposed in a circuit loop constructed of the time constant circuit, the amplifier circuit and the positive feedback circuit. Further, it is characterized in that a signal which is produced by the shift from the non-conductive state to the conductive state of the signal amplifying transistor connected to an output terminal of the positive feedback circuit is supplied to the time constant circuit as a positive feedback signal.
摘要翻译：公开了一种单稳态多谐振荡器电路。其特征在于包括时间常数电路，其包括电容器，接收时间常数电路的输出信号并且其中信号放大晶体管工作在非饱和状态的放大器电路，正反馈电路连接在放大器电路的输出端和时间常数电路的输入端，信号放大晶体管工作在非饱和状态，触发端子设置在由时间常数电路构成的电路环路中，放大电路和正反馈电路。此外，其特征在于，通过从连接到正反馈电路的输出端子的信号放大晶体管的非导通状态转变为导通状态而产生的信号作为正值提供给时间常数电路反馈信号。

9. 发明授权

US4247949A Signal strength detecting circuit 失效
标题翻译：信号强度检测电路
公开(公告)号：US4247949A
公开(公告)日：1981-01-27
申请号：US10018
申请日：1979-02-06
申请人： Kazuo Watanabe , Masanori Ienaka , Yasuo Kominami , Makoto Homma
发明人： Kazuo Watanabe , Masanori Ienaka , Yasuo Kominami , Makoto Homma
IPC分类号： G01R29/08 , H03J3/14 , H04B1/16 , H03J3/12
CPC分类号： H03J3/14
摘要： An input signal is applied to a first limiting amplifier circuit, and an output of the first limiting amplifier circuit is applied to a second limiting amplifier circuit. An output of the second limiting amplifier circuit is applied to a third limiting amplifier circuit. The output signal of the first limiting amplifier circuit is applied to a first detector circuit, the output signal of the second limiting amplifier circuit is applied to a second detector circuit, and the output signal of the third limiting amplifier circuit is applied to a third detector circuit. Bias means for stipulating the bias states of the first, second and third detector circuits are coupled to the third detector circuit. An output signal of the third detector circuit is applied to the second detector circuit as a bias signal, and an output signal of the second detector circuit is applied to the first detector circuit as a bias signal. An output signal of the first detector circuit exhibits a level corresponding to the sum among the output signals of the first, second and third limiting amplifier circuits.
摘要翻译：输入信号被施加到第一限幅放大器电路，并且第一限幅放大器电路的输出被施加到第二限幅放大器电路。第二限幅放大器电路的输出被施加到第三限幅放大器电路。第一限幅放大器电路的输出信号被施加到第一检测器电路，第二限幅放大器电路的输出信号被施加到第二检测器电路，并且第三限幅放大器电路的输出信号被施加到第三检测器电路。用于规定第一，第二和第三检测器电路的偏置状态的偏置装置耦合到第三检测器电路。将第三检测器电路的输出信号作为偏置信号施加到第二检测器电路，并将第二检测器电路的输出信号作为偏置信号施加到第一检测器电路。第一检测器电路的输出信号表现出与第一，第二和第三限幅放大器电路的输出信号之和相对应的电平。

10. 发明授权

US4236252A Double-converting FM tuner 失效
标题翻译：双转换FM调谐器
公开(公告)号：US4236252A
公开(公告)日：1980-11-25
申请号：US10019
申请日：1979-02-06
申请人： Yasuo Kominami , Masanori Ienaka , Takeshi Wada , Yukihiko Miyamoto , Tsuneo Yamada
发明人： Yasuo Kominami , Masanori Ienaka , Takeshi Wada , Yukihiko Miyamoto , Tsuneo Yamada
IPC分类号： H03D7/16 , H04B1/10 , H04B1/26 , H04B1/28
CPC分类号： H04B1/26 , H03D7/161 , H04B1/28
摘要： A first intermediate frequency amplifier stage which executes the amplitude limiting operation of a double-converting FM tuner employing the integrated circuit technology is constructed in the form of an integrated circuit. An output signal of the first intermediate frequency amplifier stage is put into a square pulse waveform on the basis of the amplitude limiting operation, and therefore has higher harmonic components of high frequencies. When the higher harmonic components are injected into a second mixer circuit in a second frequency converter circuit, various higher harmonic components which have frequencies higher than a second intermediate frequency appear at the output of the second mixer conduit. When the higher harmonic components at the output of the second mixer circuit are injected into an FM demodulator circuit, beat trouble is induced. The second frequency converter circuit is also constructed in the form of an integrated circuit, and filter means to pass the fundamental waves of a first intermediate frequency signal and to reject the higher harmonic frequency components thereof is connected between the output of the first intermediate frequency amlifier stage executing the amplitude limiting operation and the input of the second mixer circuit, whereby the beat trouble can be prevented.
摘要翻译：采用集成电路技术执行双转换FM调谐器的幅度限制操作的第一中频放大器级以集成电路的形式构成。第一中频放大器级的输出信号在幅度限制运算的基础上被置入方波脉冲波形，因此具有高频谐波分量。当在第二变频器电路中将高次谐波分量注入第二混频器电路时，在第二混频器导管的输出处出现具有高于第二中频频率的各种高次谐波分量。当第二混频器电路的输出端的高次谐波分量被注入到FM解调器电路中时，会引起节拍故障。第二变频器电路也以集成电路的形式构成，滤波器装置将第一中频信号的基波通过，并将其高次谐波频率成分排除在第一中频放大器的输出端执行振幅限制操作和第二混频器电路的输入，从而可以防止节拍故障。

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