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1. 发明授权

US06646912B2 Non-volatile memory 失效
标题翻译：非易失性存储器
公开(公告)号：US06646912B2
公开(公告)日：2003-11-11
申请号：US09875356
申请日：2001-06-05
申请人： Terril N. Hurst , Craig Perlov , Carol Wilson , Carl Taussig
发明人： Terril N. Hurst , Craig Perlov , Carol Wilson , Carl Taussig
IPC分类号： G11C1136
CPC分类号： G11C17/16 , G11C8/10
摘要： A data storage device is disclosed that comprises a cross-point memory array formed on a dielectric substrate material. The cross-point memory array comprises first and second sets of transverse electrodes separated by a storage layer including at least one semiconductor layer. The storage layer forms a non-volatile memory element at each crossing point of electrodes from the first and second sets. Each memory element can be switched between low and high impedance states, representing respective binary data states, by application of a write signal in the form of a predetermined current density through the memory element. Each memory element includes a diode junction formed in the storage layer, at least whilst in the low impedance state. A plurality of the data storage devices can be stacked and laminated into a memory module providing inexpensive high capacity data storage. Such a memory module can be employed in an archival data storage system in which the memory module provides a write-once data storage unit receivable in an appliance or interface card.
摘要翻译：公开了一种数据存储装置，其包括形成在电介质基板材料上的交叉点存储器阵列。交叉点存储器阵列包括由包括至少一个半导体层的存储层分开的第一组和第二组横向电极。存储层在与第一和第二组的电极的每个交叉点处形成非易失性存储元件。通过以预定电流密度的形式通过存储元件施加写入信号，每个存储元件可以在表示相应的二进制数据状态的低阻抗状态和高阻抗状态之间切换。每个存储元件至少在处于低阻抗状态时包括在存储层中形成的二极管结。可以将多个数据存储装置堆叠并层叠到提供便宜的高容量数据存储的存储器模块中。这样的存储器模块可以用于档案数据存储系统，其中存储器模块提供可接收在设备或接口卡中的一次写入数据存储单元。

2. 发明授权

US06864576B2 Large line conductive pads for interconnection of stackable circuitry 有权
标题翻译：用于可堆叠电路互连的大导线焊盘
公开(公告)号：US06864576B2
公开(公告)日：2005-03-08
申请号：US10696992
申请日：2003-10-30
申请人： Craig Perlov , Carl Taussig
发明人： Craig Perlov , Carl Taussig
IPC分类号： G06K19/077 , H01L21/027 , H01L23/12 , H05K1/11 , H05K3/00 , H05K3/06 , H05K3/20 , H01L23/48
CPC分类号： H05K1/11 , H05K3/0041 , H05K3/061 , H05K3/20 , H05K2201/09681 , H05K2203/0108
摘要： Digital circuitry, such as interconnective pads which are patterned as waffles according to the embossing methods for flexible substrates which are disclosed, so as to be especially suited for the interconnection of stacks of circuitry blocks forming digital memory known as Permanent Inexpensive, Rugged Memory (PIRM) cross point arrays.
摘要翻译：数字电路，例如根据所公开的用于柔性基板的压花方法图案化为华夫饼的互连焊盘，以便特别适用于形成数字存储器的堆叠的电路块的互连，所述数字存储器被称为永久性廉价，坚固的存储器（PIRM））交叉点数组。

3. 发明授权

US07304364B2 Embossed mask lithography 有权
标题翻译：压花掩模光刻
公开(公告)号：US07304364B2
公开(公告)日：2007-12-04
申请号：US10885842
申请日：2004-07-06
申请人： Craig Perlov , Carl Taussig , Ping Mei
发明人： Craig Perlov , Carl Taussig , Ping Mei
IPC分类号： H01L29/00 , G11C11/34
CPC分类号： H05K3/20 , H05K1/0289 , H05K3/0041 , H05K3/061 , H05K2203/0108 , H05K2203/1476 , Y10S438/942
摘要： Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.
摘要翻译：公开了用于构建数字电路的分层分组和方法，例如称为永久性廉价坚固存储器（PIRM）交叉点阵列的存储器，其可以通过使用透明压花工具图案化和固化而在柔性基板上制造。

4. 发明授权

US06867132B2 Large line conductive pads for interconnection of stackable circuitry 有权
公开(公告)号：US06867132B2
公开(公告)日：2005-03-15
申请号：US10245897
申请日：2002-09-17
申请人： Craig Perlov , Carl Taussig
发明人： Craig Perlov , Carl Taussig
IPC分类号： G06K19/077 , H01L21/027 , H01L23/12 , H05K1/11 , H05K3/00 , H05K3/06 , H05K3/20 , H01L21/44
CPC分类号： H05K1/11 , H05K3/0041 , H05K3/061 , H05K3/20 , H05K2201/09681 , H05K2203/0108
摘要： Digital circuitry, such as interconnective pads which are patterned as waffles according to the embossing methods for flexible substrates which are disclosed, so as to be especially suited for the interconnection of stacks of circuitry blocks forming digital memory known as Permanent Inexpensive, Rugged Memory (PIRM) cross point arrays.

5. 发明申请

US20070040491A1 Thin film devices and methods for forming the same 有权
标题翻译：薄膜器件及其形成方法
公开(公告)号：US20070040491A1
公开(公告)日：2007-02-22
申请号：US11589580
申请日：2006-10-30
申请人： Ping Mei , Craig Perlov , Albert Jeans , Carl Taussig
发明人： Ping Mei , Craig Perlov , Albert Jeans , Carl Taussig
IPC分类号： H01J1/62
CPC分类号： H01L29/42384 , H01L29/6675 , H01L29/78645 , H01L29/7869
摘要： Thin film devices and methods for forming the same are disclosed herein. A method for forming a thin film device includes forming a first at least semi-conductive strip located at a first height relative to a surface of a substrate, and forming a second at least semi-conductive strip adjacent to the first at least semi-conductive strip. The second strip is located at a second height relative to the substrate surface, and the second height is different than the first height. A nano-gap is formed between the first and second at least semi-conductive strips.
摘要翻译：本文公开了薄膜器件及其形成方法。一种用于形成薄膜器件的方法包括形成位于相对于衬底表面的第一高度处的第一至少半导电条，以及形成与第一至少半导体相邻的第二至少半导电条跳闸。第二条带相对于基板表面位于第二高度，第二高度不同于第一高度。在第一和第二至少半导电条之间形成纳米间隙。

6. 发明申请

US20060028895A1 Silver island anti-fuse 审中-公开
标题翻译：银岛反熔丝
公开(公告)号：US20060028895A1
公开(公告)日：2006-02-09
申请号：US10914255
申请日：2004-08-09
申请人： Carl Taussig , Warren Jackson , Craig Perlov , Frank Jeffrey
发明人： Carl Taussig , Warren Jackson , Craig Perlov , Frank Jeffrey
IPC分类号： G11C17/18 , G11C11/36
CPC分类号： H01L23/5252 , G11C13/02 , G11C17/16 , G11C17/18 , G11C2213/72 , H01L27/101 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An silver island anti-fuse including a first electrical conductor, an electrically resistive material in contact with the first conductor and at least one silver island disposed opposite the first electrical conductor and upon the electrically resistive material. A second electrical conductor disposed over the silver island intimately couples the silver island to the electrically resistive material. When a critical potential is applied across the anti-fuse, a metallic filament precipitates from the silver island through the electrically resistive material layer, establishing a short and thus switching the silver island anti-fuse from a high resistance to a low resistance. A method of making the silver island anti-fuse and a memory device incorporating the silver island anti-fuse are further provided.
摘要翻译：一种银岛反熔丝，包括第一电导体，与第一导体接触的电阻材料和与第一电导体相对设置的至少一个银岛和电阻材料。布置在银岛上的第二电导体将银岛紧密地耦合到电阻材料上。当跨抗反熔丝施加临界电位时，金属细丝通过电阻材料层从银岛沉淀出来，建立短路，从而将银岛抗熔丝从高电阻切换到低电阻。还提供了制造银岛反熔丝的方法和结合有银岛反熔丝的存储装置。

7. 发明授权

US06887792B2 Embossed mask lithography 有权
标题翻译：压花掩模光刻
公开(公告)号：US06887792B2
公开(公告)日：2005-05-03
申请号：US10244862
申请日：2002-09-17
申请人： Craig Perlov , Carl Taussig , Ping Mei
发明人： Craig Perlov , Carl Taussig , Ping Mei
IPC分类号： H01L21/3065 , H01L23/50 , H05K1/00 , H05K3/00 , H05K3/06 , H05K3/20 , H01L21/311
CPC分类号： H05K3/20 , H05K1/0289 , H05K3/0041 , H05K3/061 , H05K2203/0108 , H05K2203/1476 , Y10S438/942
摘要： Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.
摘要翻译：公开了用于构建数字电路的分层分组和方法，例如称为永久性廉价坚固存储器（PIRM）交叉点阵列的存储器，其可以通过使用透明压花工具图案化和固化而在柔性基板上制造。

8. 发明申请

US20060275963A1 Structure and method for thin film device 有权
标题翻译：薄膜器件的结构和方法
公开(公告)号：US20060275963A1
公开(公告)日：2006-12-07
申请号：US11144204
申请日：2005-06-02
申请人： Ping Mei , Albert Jeans , Carl Taussig
发明人： Ping Mei , Albert Jeans , Carl Taussig
IPC分类号： H01L21/84 , H01L27/148
CPC分类号： H01L29/42384 , H01L29/6675 , H01L29/78645 , H01L29/7869 , Y10S438/942
摘要： Provided is a thin film device and an associated method of making a thin film device. For example, a thin film transistor with nano-gaps in the gate electrode. The method involves providing a substrate. Upon the substrate are then provided a plurality of parallel spaced electrically conductive strips. A plurality of thin film device layers are then deposited upon the conductive strips. A 3D structure is provided upon the plurality of thin film device layers, the structure having a plurality of different heights. The 3D structure and the plurality of thin film device layers are then etched to define a thin film device, such as for example a thin film transistor that is disposed above at least a portion of the conductive strips.
摘要翻译：本发明提供一种制造薄膜器件的薄膜器件和相关方法。例如，在栅电极中具有纳米间隙的薄膜晶体管。该方法包括提供基底。然后在衬底上设置多个平行隔开的导电条。然后将多个薄膜器件层沉积在导电条上。 3D结构设置在多个薄膜器件层上，该结构具有多个不同的高度。然后蚀刻3D结构和多个薄膜器件层以限定薄膜器件，例如设置在至少一部分导电条上的薄膜晶体管。

9. 发明申请

US20050176182A1 Forming a plurality of thin-film devices 有权
标题翻译：形成多个薄膜器件
公开(公告)号：US20050176182A1
公开(公告)日：2005-08-11
申请号：US10777005
申请日：2004-02-10
申请人： Ping Me , Warren Jackson , Carl Taussig , Albert Jeans
发明人： Ping Me , Warren Jackson , Carl Taussig , Albert Jeans
IPC分类号： G03F7/20 , C23C16/00 , H01L21/00 , H01L21/027 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04 , H01L29/786 , H01L51/00
CPC分类号： H01L29/78603 , H01L27/12 , H01L27/1292 , H01L29/66757 , H01L51/0097
摘要： An aspect of the present invention is a method for forming a plurality of thin-film devices. The method includes providing a flexible substrate and utilizing a self-aligned imprint lithography (SAIL) process to form the plurality of thin-film devices on the flexible substrate.
摘要翻译：本发明的一个方面是形成多个薄膜器件的方法。该方法包括提供柔性基板并利用自对准压印光刻（SAIL）工艺在柔性基板上形成多个薄膜器件。

10. 发明授权

US06567295B2 Addressing and sensing a cross-point diode memory array 有权
公开(公告)号：US06567295B2
公开(公告)日：2003-05-20
申请号：US09875496
申请日：2001-06-05
申请人： Carl Taussig , Richard Elder
发明人： Carl Taussig , Richard Elder
IPC分类号： G11C1706
CPC分类号： G11C8/10 , G11C17/06 , G11C17/18
摘要： A memory circuit includes a cross-point memory array having first and second sets of transverse electrodes with respective memory elements formed at the crossing-points of the first and second set electrodes. Each of the memory elements is formed to include, in at least one of its binary states, a diode element. The memory circuit also includes an addressing circuit coupled to the memory array. The addressing circuit has a first set of address lines with first diode connections between the first set address lines and the first set memory array electrodes, with the first diode connections coupling each memory array electrode in the first set to a respective unique subset of the first set address lines. The addressing circuit also has a second set of address lines with second diode connections between the second set address lines and the second set memory array electrodes, with the second diode connections coupling each memory array electrode in the second set to a respective unique subset of the second set address lines. The first and second diode connections form a permuted diode logic circuit whereby application of predetermined voltages to selected subsets of the first and second address lines enables unique addressing of a single memory element in the array. By sensing the current in the address lines the binary state of the addressed memory element may be determined. Also, by application of a writing voltage to the selected subsets of address lines, the binary state of a memory element can be changed by substantially and permanently changing the resistance thereof.

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