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1. 发明专利

JP2009048306A Parallel process architecture and parallel processor using the same 审中-公开
标题翻译：并行处理结构和平行处理器
公开(公告)号：JP2009048306A
公开(公告)日：2009-03-05
申请号：JP2007211904
申请日：2007-08-15
申请人： Tama Tlo Kk , Tokyo Metropolitan Univ , タマティーエルオー株式会社 , 公立大学法人首都大学東京
发明人： FUKUNAGA RIKI
IPC分类号： G06F9/48 , G06T1/20
摘要： PROBLEM TO BE SOLVED: To construct a parallel processor of FPGAs, and to perform parallel processing of programs within a single processor.
SOLUTION: A processor is provided with a process management register, a general-purpose internal stack register, a memory and a link. The process identification number for a program to be implemented is managed by means of the process management register and the memory. The identification numbers of processes are formed into a linked scheduling list on the memory to connect the processes together. Switching of the processes and channel communications between the processes are effected.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：构建FPGA的并行处理器，并对单个处理器内的程序执行并行处理。解决方案：处理器提供有过程管理寄存器，通用内部堆栈寄存器，存储器和链接。要实现的程序的过程识别号码通过进程管理寄存器和存储器进行管理。处理的标识号在存储器上形成为链接的调度列表，以将过程连接在一起。实现过程之间的切换和通道之间的通信。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2013058191A Parallel processing system and vehicle traveling system 有权
标题翻译：并行处理系统和车辆行驶系统
公开(公告)号：JP2013058191A
公开(公告)日：2013-03-28
申请号：JP2012168150
申请日：2012-07-30
申请人： Tokyo Metropolitan Univ , 公立大学法人首都大学東京
发明人： FUKUNAGA RIKI
IPC分类号： G06T1/20 , A61G5/04 , G06T1/00 , G08G1/16
摘要： PROBLEM TO BE SOLVED: To provide a parallel processing system that processes a moving image at a high speed and extracts required information, and further to provide a vehicle traveling system that performs safe travel of a vehicle on the basis of real-time moving image information by using the parallel processing system.SOLUTION: A parallel processing system 1 comprises: a signal converting section 30 for sorting a large amount of data into n data aggregates; a data processing section 50 for processing the n data aggregates from the signal converting section 30; and a router 40 to which the signal converting section 30 and the data processing section 50 are coupled. The data processing section 50 allocated with the n data aggregates sorted includes: n processors 51 that simultaneously and in parallel process the n data aggregates allocated and output predetermined processing data; and one master processor 52 that receives n pieces of processing data output from each of the n processors 51 through the router 40, aggregates the n pieces of processing data, performs entire processing thereof and outputs desired processed data.
摘要翻译：要解决的问题：提供一种并行处理系统，其以高速度处理运动图像并提取所需信息，并且进一步提供一种车辆行驶系统，该车辆行驶系统基于实时地执行车辆的安全行驶使用并行处理系统运动图像信息。解决方案：并行处理系统1包括：信号转换部分30，用于将大量数据分类成n个数据聚合; 数据处理部分50，用于处理来自信号转换部分30的n个数据聚合; 以及信号转换部30和数据处理部50耦合到的路由器40。分配有n个数据聚合的数据处理部分50包括：n个处理器51，其同时且并行地处理分配并输出预定处理数据的n个数据聚合; 并且通过路由器40接收从n个处理器51中的每一个输出的n个处理数据的一个主处理器52聚合n个处理数据，执行其整个处理并输出所需的处理数据。版权所有（C）2013，JPO＆INPIT

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