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1. 发明申请

US20080276256A1 Method and System for Speeding Up Mutual Exclusion 失效
标题翻译：加快相互排斥的方法和系统
公开(公告)号：US20080276256A1
公开(公告)日：2008-11-06
申请号：US12173551
申请日：2008-07-15
申请人： Takeshi Ogasawara , Akira Koseki , Hideaki Komatsu , Kiyokuni Kawachiya , Tamiya Onodera
发明人： Takeshi Ogasawara , Akira Koseki , Hideaki Komatsu , Kiyokuni Kawachiya , Tamiya Onodera
IPC分类号： G06F9/44
CPC分类号： G06F9/52 , G06F9/3004 , G06F9/30087 , G06F9/526
摘要： In a multiprocessor computer system, a lock operation is maintained with a thread using non-atomic instructions. Identifiers are assigned to each thread. Flags in conjunction with the thread identifiers are used to determine the continuity of the lock with a thread. However, in the event continuity of the lock with the thread ceases, a compare-and-swap operation is executed to reset the lock with the same thread or another thread. Similarly, in the event there has been a collision between two or more threads requesting the lock, a compare-and-swap operation is executed to assign the lock to one of the requesting threads. Accordingly, prolonged ownership of a lock operation by a thread is encouraged to mitigate use of atomic operations in granting of the lock to a non-owning thread.
摘要翻译：在多处理器计算机系统中，使用非原子指令的线程来维护锁定操作。标识符分配给每个线程。与线程标识符一起使用的标志用于确定带有线程的锁的连续性。但是，在线程的锁定的连续性停止的情况下，执行比较和交换操作以使用相同的线程或其他线程重置锁定。类似地，如果两个或多个请求锁的线程之间发生冲突，则执行比较和交换操作以将锁分配给请求线程之一。因此，鼓励延长线程锁定操作的所有权，以减轻使用原子操作来授予对非拥有线程的锁定。

2. 发明申请

US20060090168A1 Method and system for speeding up mutual exclusion 审中-公开
公开(公告)号：US20060090168A1
公开(公告)日：2006-04-27
申请号：US10952142
申请日：2004-09-28
申请人： Takeshi Ogasawara , Akira Koseki , Hideaki Komatsu , Kiyokuni Kawachiya , Tamiya Onodera
发明人： Takeshi Ogasawara , Akira Koseki , Hideaki Komatsu , Kiyokuni Kawachiya , Tamiya Onodera
IPC分类号： G06F9/44
CPC分类号： G06F9/52 , G06F9/3004 , G06F9/30087 , G06F9/526
摘要： In a multiprocessor computer system, a lock operation is maintained with a thread using non-atomic instructions. Identifiers are assigned to each thread. Flags in conjunction with the thread identifiers are used to determine the continuity of the lock with a thread. However, in the event continuity of the lock with the thread ceases, a compare-and-swap operation is executed to reset the lock with the same thread or another thread. Similarly, in the event there has been a collision between two or more threads requesting the lock, a compare-and-swap operation is executed to assign the lock to one of the requesting threads. Accordingly, prolonged ownership of a lock operation by a thread is encouraged to mitigate use of atomic operations in granting of the lock to a non-owning thread.

3. 发明授权

US08473969B2 Method and system for speeding up mutual exclusion 失效
标题翻译：加快相互排斥的方法和制度
公开(公告)号：US08473969B2
公开(公告)日：2013-06-25
申请号：US12173551
申请日：2008-07-15
申请人： Takeshi Ogasawara , Akira Koseki , Hideaki Komatsu , Kiyokuni Kawachiya , Tamiya Onodera
发明人： Takeshi Ogasawara , Akira Koseki , Hideaki Komatsu , Kiyokuni Kawachiya , Tamiya Onodera
IPC分类号： G06F9/44 , G06F9/46
CPC分类号： G06F9/52 , G06F9/3004 , G06F9/30087 , G06F9/526
摘要： In a multiprocessor computer system, a lock operation is maintained with a thread using non-atomic instructions. Identifiers are assigned to each thread. Flags in conjunction with the thread identifiers are used to determine the continuity of the lock with a thread. However, in the event continuity of the lock with the thread ceases, a compare-and-swap operation is executed to reset the lock with the same thread or another thread. Similarly, in the event there has been a collision between two or more threads requesting the lock, a compare-and-swap operation is executed to assign the lock to one of the requesting threads. Accordingly, prolonged ownership of a lock operation by a thread is encouraged to mitigate use of atomic operations in granting of the lock to a non-owning thread.
摘要翻译：在多处理器计算机系统中，使用非原子指令的线程来维护锁定操作。标识符分配给每个线程。与线程标识符一起使用的标志用于确定带有线程的锁的连续性。但是，在线程的锁定的连续性停止的情况下，执行比较和交换操作以使用相同的线程或其他线程重置锁定。类似地，如果两个或多个请求锁的线程之间发生冲突，则执行比较和交换操作以将锁分配给请求线程之一。因此，鼓励延长线程锁定操作的所有权，以减轻使用原子操作来授予对非拥有线程的锁定。

4. 发明申请

US20080104595A1 METHOD FOR ENHANCING EFFICIENCY IN MUTUAL EXCLUSION 失效
标题翻译：在互补排除中提高效率的方法
公开(公告)号：US20080104595A1
公开(公告)日：2008-05-01
申请号：US11873777
申请日：2007-10-17
申请人： Kiyokuni Kawachiya , Akira Koseki , Tamiya Onodera , Graeme Johnson
发明人： Kiyokuni Kawachiya , Akira Koseki , Tamiya Onodera , Graeme Johnson
IPC分类号： G06F9/46
CPC分类号： G06F9/526 , G06F9/3004 , G06F9/30087 , G06F9/522
摘要： A system of the present invention includes: a memory device which includes a first memory area for storing first information indicating that a first task acquires or attempts to acquire a lock, and a second memory area for storing second information indicating that a second task acquires or attempts to acquire the lock, and in which a time lag may occur between a time when the first task issues a writing instruction and a time when the written content is enabled to be referred to by the second task; a first acquisition section which reads the second memory area after issuing a writing instruction to write the first information to the first memory area in response to a request from the first task, and which makes a reply indicating a success of the lock acquisition on condition that the second information is not read; and a second acquisition section which writes the second information to the second memory area in response to a request from the second task, which enables the written content to be referred to by the first task, which thereafter executes a write-reflection process for enabling the content written in the first memory area by the first task to be referred to by the second task, which reads the first memory area after completion of the write-reflection process, and which makes a reply indicating a success of the lock acquisition on condition that the first information is not read from the first memory area.
摘要翻译：本发明的系统包括：存储装置，包括：第一存储区，用于存储指示第一任务获取或尝试获取锁的第一信息;以及第二存储区，用于存储指示第二任务获取的第二信息; 尝试获取锁定，并且其中在第一任务发出写入指令的时间与能够被第二个任务引用的写入内容的时间之间可能发生时滞; 第一获取部分，响应于来自第一任务的请求，在发出写入指令以写入第一信息到第一存储器区域之后读取第二存储器区域，并且响应于指示锁定获取成功的回复，条件是第二个信息不读; 以及第二获取部分，其响应于来自所述第二任务的请求将所述第二信息写入所述第二存储区域，所述第二任务使得能够由所述第一任务引用所述写入内容，所述第一任务执行写入反射处理以使得能够通过由第二任务引用的第一任务写入第一存储器区域的内容，其在完成写入反射处理之后读取第一存储区域，并且作出响应，指示锁定获取的成功，条件是第一信息不从第一存储区读取。

5. 发明授权

US07793023B2 Exclusion control 失效
标题翻译：排除控制
公开(公告)号：US07793023B2
公开(公告)日：2010-09-07
申请号：US12062844
申请日：2008-04-04
申请人： Kiyokuni Kawachiya , Akira Koseki , Tamiya Onodera
发明人： Kiyokuni Kawachiya , Akira Koseki , Tamiya Onodera
IPC分类号： G06F13/14 , G06F13/00 , G06F12/00 , G06F7/00 , G06F13/28 , G06F9/46
CPC分类号： G06F9/526
摘要： An exclusion controller which allows an information processing unit to acquire a contended resource to the exclusion of the other information processing units includes a plurality of non-prioritized information processing units mutually exclusively acquiring a non-prioritized exclusion right, which indicates a candidate for acquiring the contended resource, by a first process. The exclusion controller further includes a prioritized information processing unit acquiring the contended resource by a second process, which requires a shorter processing time than the first process, to the exclusion of the non-prioritized information processing unit having acquired the non-prioritized exclusion right.
摘要翻译：允许信息处理单元获取竞争资源以排除其他信息处理单元的排除控制器包括多个非优先化信息处理单元，其互相排斥地获取非优先排除权，其指示用于获取竞争资源，第一个过程。排除控制器还包括优先级信息处理单元，通过第二进程获取竞争资源，第二进程需要比第一进程更短的处理时间，排除获得非优先排序权的非优先化信息处理单元。

6. 发明授权

US07415556B2 Exclusion control 失效
标题翻译：排除控制
公开(公告)号：US07415556B2
公开(公告)日：2008-08-19
申请号：US10691717
申请日：2003-10-23
申请人： Kiyokuni Kawachiya , Akira Koseki , Tamiya Onodera
发明人： Kiyokuni Kawachiya , Akira Koseki , Tamiya Onodera
IPC分类号： G06F12/00 , G06F12/14 , G06F7/00 , G06F13/28 , G06F9/46
CPC分类号： G06F9/526
摘要： An exclusion controller which allows an information processing unit to acquire a contended resource to the exclusion of the other information processing units includes a plurality of non-prioritized information processing units mutually exclusively acquiring a non-prioritized exclusion right, which indicates a candidate for acquiring the contended resource, by a first process. The exclusion controller further includes a prioritized information processing unit acquiring the contended resource by a second process, which requires a shorter processing time than the first process, to the exclusion of the non-prioritized information processing unit having acquired the non-prioritized exclusion right.
摘要翻译：允许信息处理单元获取竞争资源以排除其他信息处理单元的排除控制器包括多个非优先化信息处理单元，其互相排斥地获取非优先排除权，其指示用于获取竞争资源，第一个过程。排除控制器还包括优先级信息处理单元，通过第二进程获取竞争资源，第二进程需要比第一进程更短的处理时间，排除获得非优先排序权的非优先化信息处理单元。

7. 发明授权

US07543295B2 Method for enhancing efficiency in mutual exclusion 失效
标题翻译：提高互惠效率的方法
公开(公告)号：US07543295B2
公开(公告)日：2009-06-02
申请号：US11873777
申请日：2007-10-17
申请人： Kiyokuni Kawachiya , Akira Koseki , Tamiya Onodera , Graeme Johnson
发明人： Kiyokuni Kawachiya , Akira Koseki , Tamiya Onodera , Graeme Johnson
IPC分类号： G06F9/46
CPC分类号： G06F9/526 , G06F9/3004 , G06F9/30087 , G06F9/522
摘要： A system of the present invention includes: a memory device which includes a first memory area for storing first information indicating that a first task acquires or attempts to acquire a lock, and a second memory area for storing second information indicating that a second task acquires or attempts to acquire the lock, and in which a time lag may occur between a time when the first task issues a writing instruction and a time when the written content is enabled to be referred to by the second task; a first acquisition section which reads the second memory area after issuing a writing instruction to write the first information to the first memory area in response to a request from the first task, and which makes a reply indicating a success of the lock acquisition on condition that the second information is not read; and a second acquisition section which writes the second information to the second memory area in response to a request from the second task, which enables the written content to be referred to by the first task, which thereafter executes a write-reflection process for enabling the content written in the first memory area by the first task to be referred to by the second task, which reads the first memory area after completion of the write-reflection process, and which makes a reply indicating a success of the lock acquisition on condition that the first information is not read from the first memory area.
摘要翻译：本发明的系统包括：存储装置，包括：第一存储区，用于存储指示第一任务获取或尝试获取锁的第一信息;以及第二存储区，用于存储指示第二任务获取的第二信息; 尝试获取锁定，并且其中在第一任务发出写入指令的时间与能够被第二个任务引用的写入内容的时间之间可能发生时滞; 第一获取部分，响应于来自第一任务的请求，在发出写入指令以写入第一信息到第一存储器区域之后读取第二存储器区域，并且响应于指示锁定获取成功的回复，条件是第二个信息不读; 以及第二获取部分，其响应于来自所述第二任务的请求将所述第二信息写入所述第二存储区域，所述第二任务使得能够由所述第一任务引用所述写入内容，所述第一任务执行写入反射处理以使得能够通过由第二任务引用的第一任务写入第一存储器区域的内容，其在完成写入反射处理之后读取第一存储区域，并且作出响应，指示锁定获取的成功，条件是第一信息不从第一存储区读取。

8. 发明申请

US20060179428A1 Method and system for efficiently starting a JAVA application 审中-公开
标题翻译：有效启动JAVA应用程序的方法和系统
公开(公告)号：US20060179428A1
公开(公告)日：2006-08-10
申请号：US11054899
申请日：2005-02-10
申请人： Kiyokuni Kawachiya , Tamiya Onodera , Kazunori Ogata , Hideaki Komatsu
发明人： Kiyokuni Kawachiya , Tamiya Onodera , Kazunori Ogata , Hideaki Komatsu
IPC分类号： G06F9/45
CPC分类号： G06F9/485
摘要： A method and system are provided for starting a new JAVA application while eliminating overhead associated therewith. The new JAVA application is created from a memory image of an initialized JAVA application. The memory image of the process which is executing the initialized JAVA application is copied to enable the memory image to be observed by the new JAVA application. In addition, to copying the memory image, the states of system resources and operating system monitors not present in the copied memory image are recreated on the JAVA application.
摘要翻译：提供了一种方法和系统，用于启动新的JAVA应用程序，同时消除与之相关的开销。新的JAVA应用程序是从已初始化的JAVA应用程序的内存映像创建的。正在执行初始化JAVA应用程序的进程的内存映像被复制，以使新的JAVA应用程序能够观察到内存映像。此外，为了复制内存映像，在JAVA应用程序中重新创建不存在于复制的内存映像中的系统资源和操作系统监视器的状态。

9. 发明申请

US20090019444A1 Information processing and control 失效
公开(公告)号：US20090019444A1
公开(公告)日：2009-01-15
申请号：US12171063
申请日：2008-07-10
申请人： Kiyokuni Kawachiya , Takeshi Ogasawara , Hideaki Komatsu
发明人： Kiyokuni Kawachiya , Takeshi Ogasawara , Hideaki Komatsu
IPC分类号： G06F9/46
CPC分类号： G06F9/46
摘要： Information processing apparatus, including occurrence number counter counting events that occurred in each of a plurality of CPUs. Apparatus performs functions of; storing accumulated occurrence number of events, which occurred while the thread is being executed by each of the CPUs, in a thread storage area of the thread associating accumulated occurrence number with CPU; storing, in the thread storage area, a value of occurrence number counter of the CPU, the value having been counted before the thread is resumed by the CPU; and adding, to accumulated occurrence number which has been stored in accumulated number storing unit while corresponding to the CPU, a difference value obtained by subtracting a counter value, which has been stored in the start-time number storing unit of the thread, from a counter value of the occurrence number counter of the CPU, in a case where the CPU terminates an execution of the thread.

10. 发明授权

US07703095B2 Information processing and control 失效
标题翻译：信息处理和控制
公开(公告)号：US07703095B2
公开(公告)日：2010-04-20
申请号：US12171063
申请日：2008-07-10
申请人： Kiyokuni Kawachiya , Takeshi Ogasawara , Hideaki Komatsu
发明人： Kiyokuni Kawachiya , Takeshi Ogasawara , Hideaki Komatsu
IPC分类号： G06F9/46 , G06F9/45 , G06F11/34
CPC分类号： G06F9/46
摘要： Information processing apparatus, including occurrence number counter counting events that occurred in each of a plurality of CPUs. Apparatus performs functions of; storing accumulated occurrence number of events, which occurred while the thread is being executed by each of the CPUs, in a thread storage area of the thread associating accumulated occurrence number with CPU; storing, in the thread storage area, a value of occurrence number counter of the CPU, the value having been counted before the thread is resumed by the CPU; and adding, to accumulated occurrence number which has been stored in accumulated number storing unit while corresponding to the CPU, a difference value obtained by subtracting a counter value, which has been stored in the start-time number storing unit of the thread, from a counter value of the occurrence number counter of the CPU, in a case where the CPU terminates an execution of the thread.
摘要翻译：信息处理装置，包括在多个CPU中的每一个中发生的发生次数计数事件。仪器执行功能; 在所述线程关联累积发生次数与所述线程的线程存储区域中存储在所述CPU中执行所述线程时发生的事件的累计发生次数; 在线程存储区域中存储CPU的发生次数计数器的值，该值在CPU恢复线程之前已被计数; 并且对与CPU相对应地存储在累积数量存储单元中的累计发生次数相加，将从线程的开始时间数存储单元中存储的计数器值减去得到的差值从在CPU终止执行线程的情况下，CPU的发生次数计数器的计数值。

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