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    • 5. 发明申请
    • Register unit
    • 注册单位
    • US20050262320A1
    • 2005-11-24
    • US10977103
    • 2004-10-29
    • Makio KondoNaoki SakaguchiToru Senbongi
    • Makio KondoNaoki SakaguchiToru Senbongi
    • G06F21/24G06F9/30G06F12/00G06F12/14G06F21/00H04L9/10
    • G06F9/30141G06F21/71
    • A register unit that is capable of improving data security and minimizing the possibility of data alteration and other manipulations includes multiple registers and a bit layout circuit that is connected to the registers. The bit layout circuit stores a relationship table that defines the relationship between the register bit addresses of all the registers and designated bit addresses of addresses that are designated by an arithmetic unit for a read/write operation. Upon receipt of a write command and its data from the arithmetic unit, the bit layout circuit separates the data into bits, generates storage data by rearranging the data in compliance with the relationship table, and stores the generated data at the register bit addresses of registers indicated in the relationship table.
    • 能够提高数据安全性和最小化数据更改和其他操作的可能性的寄存器单元包括连接到寄存器的多个寄存器和位布局电路。 位布局电路存储关系表,其定义了所有寄存器的寄存器位地址和由用于读/写操作的算术单元指定的地址的指定位地址之间的关系。 在从运算单元接收到写命令及其数据后,位布局电路将数据分成比特,通过根据关系表重排数据来生成存储数据,并将生成的数据存储在寄存器的寄存器位地址 在关系表中指出。