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1. 发明授权

US06713353B1 Method of manufacturing a semiconductor integrated circuit device 有权
公开(公告)号：US06713353B1
公开(公告)日：2004-03-30
申请号：US09536756
申请日：2000-03-28
申请人： Takayuki Kanda , Atsushi Hiraiwa , Norio Suzuki , Satoshi Sakai , Shuji Ikeda , Yasuko Yoshida , Shinichi Horibe
发明人： Takayuki Kanda , Atsushi Hiraiwa , Norio Suzuki , Satoshi Sakai , Shuji Ikeda , Yasuko Yoshida , Shinichi Horibe
IPC分类号： H01L218234
CPC分类号： H01L21/823878 , H01L21/823857
摘要： A protection film is formed on a silicon oxide film 6 formed on the surface of a semiconductor substrate, a silicon oxide film is removed from a region where a thin gate-insulating film is to be formed by using, as a mask, a photoresist pattern that covers a region where a thick gate-insulating film is to be formed, and, then, the photoresist pattern is removed followed by washing. Then, the semiconductor substrate is heat-oxidized or a film is deposited thereon to form gate-insulating films having different thicknesses.

2. 发明授权

US06821854B2 Method of manufacturing a semiconductor integrated circuit device 有权
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：US06821854B2
公开(公告)日：2004-11-23
申请号：US10211262
申请日：2002-08-05
申请人： Takayuki Kanda , Atsushi Hiraiwa , Norio Suzuki , Satoshi Sakai , Shuji Ikeda , Yasuko Yoshida , Shinichi Horibe
发明人： Takayuki Kanda , Atsushi Hiraiwa , Norio Suzuki , Satoshi Sakai , Shuji Ikeda , Yasuko Yoshida , Shinichi Horibe
IPC分类号： H01L218234
CPC分类号： H01L21/823878 , H01L21/823857
摘要： A protection film is formed on a silicon oxide film 6 formed on the surface of a semiconductor substrate, a silicon oxide film is removed from a region where a thin gate-insulating film is to be formed by using, as a mask, a photoresist pattern that covers a region where a thick gate-insulating film is to be formed, and, then, the photoresist pattern is removed followed by washing. Then, the semiconductor substrate is heat-oxidized or a film is deposited thereon to form gate-insulating films having different thicknesses.
摘要翻译：在形成于半导体基板的表面的氧化硅膜6上形成保护膜，利用光刻胶图案作为掩模，从要形成薄栅极绝缘膜的区域去除氧化硅膜覆盖要形成厚栅极绝缘膜的区域，然后去除光致抗蚀剂图案，然后洗涤。然后，半导体衬底被热氧化或在其上沉积膜以形成具有不同厚度的栅极绝缘膜。

3. 发明授权

US07897467B2 Semiconductor integrated circuit device and manufacturing method thereof 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US07897467B2
公开(公告)日：2011-03-01
申请号：US12784876
申请日：2010-05-21
申请人： Satoshi Sakai , Atsushi Hiraiwa , Satoshi Yamamoto
发明人： Satoshi Sakai , Atsushi Hiraiwa , Satoshi Yamamoto
IPC分类号： H01L21/8234 , H01L21/336
CPC分类号： H01L21/823462 , H01L21/82345 , H01L21/823842 , H01L21/823857 , H01L21/823878
摘要： After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).
摘要翻译：在半导体基板（1）的表面上形成氧化硅膜（9）之后，使用稀释的HF除去形成有效厚度小的栅极绝缘膜的区域中的氧化硅膜（9）在半导体衬底（1）上形成高介电常数绝缘膜（10）。因此，由高介电常数绝缘膜（10）和氧化硅膜（9）构成的栅极绝缘膜（12）和栅极绝缘膜（12）构成的两种栅极绝缘膜由高介电常数在半导体衬底（1）上形成恒定绝缘膜（10）。

4. 发明授权

US07662696B2 Method for fabricating semiconductor devices 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07662696B2
公开(公告)日：2010-02-16
申请号：US11690521
申请日：2007-03-23
申请人： Atsushi Hiraiwa , Satoshi Sakai , Dai Ishikawa , Yoshihiro Ikeda
发明人： Atsushi Hiraiwa , Satoshi Sakai , Dai Ishikawa , Yoshihiro Ikeda
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28273 , H01L21/3105 , H01L21/823857 , H01L27/105 , H01L27/11521 , H01L27/11526 , H01L29/513 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： According to the present invention, an oxide film with the film quality almost equivalent to that of the thermal oxide can be formed by the low-temperature treatment. After removing an insulator on the active region of the substrate which constitutes a semiconductor wafer, an insulator made of, for example, silicon oxide is deposited on the main surface of the semiconductor wafer by the low pressure CVD method. This insulator is a film to form a gate insulator of MISFET in a later step. Subsequently, a plasma treatment is performed in an atmosphere containing oxygen (oxygen plasma treatment) to the insulator in the manner as schematically shown by the arrows. By so doing, the film quality of the insulator formed by the CVD method can be improved to the extent almost equivalent to that of the insulator formed of the thermal oxide.
摘要翻译：根据本发明，可以通过低温处理形成膜质量几乎等于热氧化物的氧化膜。在构成半导体晶片的基板的有源区域上去除绝缘体之后，通过低压CVD法在半导体晶片的主表面上沉积由例如氧化硅制成的绝缘体。该绝缘体是在后续步骤中形成MISFET的栅极绝缘体的膜。随后，按照箭头示意性地示出的方式，在含有氧的气氛（氧等离子体处理）中对绝缘体进行等离子体处理。通过这样做，通过CVD方法形成的绝缘体的膜质量可以提高到与由热氧化物形成的绝缘体几乎相同的程度。

5. 发明申请

US20070190744A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICES 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20070190744A1
公开(公告)日：2007-08-16
申请号：US11690521
申请日：2007-03-23
申请人： Atsushi Hiraiwa , Satoshi Sakai , Dai Ishikawa , Yoshihiro Ikeda
发明人： Atsushi Hiraiwa , Satoshi Sakai , Dai Ishikawa , Yoshihiro Ikeda
IPC分类号： H01L21/76
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28273 , H01L21/3105 , H01L21/823857 , H01L27/105 , H01L27/11521 , H01L27/11526 , H01L29/513 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： According to the present invention, an oxide film with the film quality almost equivalent to that of the thermal oxide can be formed by the low-temperature treatment. After removing an insulator on the active region of the substrate which constitutes a semiconductor wafer, an insulator made of, for example, silicon oxide is deposited on the main surface of the semiconductor wafer by the low pressure CVD method. This insulator is a film to form a gate insulator of MISFET in a later step. Subsequently, a plasma treatment is performed in an atmosphere containing oxygen (oxygen plasma treatment) to the insulator in the manner as schematically shown by the arrows. By so doing, the film quality of the insulator formed by the CVD method can be improved to the extent almost equivalent to that of the insulator formed of the thermal oxide.
摘要翻译：根据本发明，可以通过低温处理形成膜质量几乎等于热氧化物的氧化膜。在构成半导体晶片的基板的有源区域上去除绝缘体之后，通过低压CVD法在半导体晶片的主表面上沉积由例如氧化硅制成的绝缘体。该绝缘体是在后续步骤中形成MISFET的栅极绝缘体的膜。随后，按照箭头示意性地示出的方式，在含有氧的气氛（氧等离子体处理）中对绝缘体进行等离子体处理。通过这样做，通过CVD方法形成的绝缘体的膜质量可以提高到与由热氧化物形成的绝缘体几乎相同的程度。

6. 发明授权

US07186604B2 Semiconductor integrated circuit device and method for fabricating the same 失效
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US07186604B2
公开(公告)日：2007-03-06
申请号：US10519799
申请日：2002-08-15
申请人： Satoshi Sakai , Satoshi Yamamoto , Atsushi Hiraiwa , Ryoichi Furukawa
发明人： Satoshi Sakai , Satoshi Yamamoto , Atsushi Hiraiwa , Ryoichi Furukawa
IPC分类号： H01L21/8238
CPC分类号： H01L29/513 , H01L21/823857
摘要： After forming a silicon oxide film 9 on the surface of a region A of a semiconductor substrate 1, a high dielectric constant insulating film 10, a silicon film, a silicon oxide film 14 are successively deposited over the semiconductor substrate 1, and they are patterned to leave the silicon oxide film 14 in regions for forming gate electrodes. Then, after fabricating silicon films 13n and 13p by using the patterned silicon oxide film 14 as a mask, when removing the silicon oxide film 14, etching is performed under the condition where the etching selectivity of the silicon oxide film 14 to the high dielectric constant insulating film 10 becomes large, thereby leaving the high dielectric constant insulating film 10 also to portions below the end of the gate electrodes (13n, 13p). Thus, it is possible to ensure the voltage withstanding thereof and improve the characteristics of MISFET.
摘要翻译：在半导体衬底1的区域A的表面上形成氧化硅膜9之后，在半导体衬底1上依次沉积高介电常数绝缘膜10，硅膜，氧化硅膜14，并将其图案化以将氧化硅膜14留在用于形成栅电极的区域中。然后，通过使用图案化氧化硅膜14作为掩模来制造硅膜13 n和13 p之后，当去除氧化硅膜14时，在氧化硅膜14的蚀刻选择性高的条件下进行蚀刻介电常数绝缘膜10变大，从而将高介电常数绝缘膜10也留在栅电极（13n，13p）的端部下方的部分。因此，可以确保其耐受电压并改善MISFET的特性。

7. 发明授权

US07741677B2 Semiconductor integrated circuit device and manufacturing method thereof 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US07741677B2
公开(公告)日：2010-06-22
申请号：US12486944
申请日：2009-06-18
申请人： Satoshi Sakai , Atsushi Hiraiwa , Satoshi Yamamoto
发明人： Satoshi Sakai , Atsushi Hiraiwa , Satoshi Yamamoto
IPC分类号： H01L29/76 , H01L29/94 , H01L31/113
CPC分类号： H01L21/823462 , H01L21/82345 , H01L21/823842 , H01L21/823857 , H01L21/823878
摘要： After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).
摘要翻译：在半导体基板（1）的表面上形成氧化硅膜（9）之后，使用稀释的HF除去形成有效厚度小的栅极绝缘膜的区域中的氧化硅膜（9）在半导体衬底（1）上形成高介电常数绝缘膜（10）。因此，由高介电常数绝缘膜（10）和氧化硅膜（9）构成的栅极绝缘膜（12）和栅极绝缘膜（12）构成的两种栅极绝缘膜由高介电常数在半导体衬底（1）上形成恒定绝缘膜（10）。

8. 发明授权

US07560772B2 Semiconductor integrated circuit device and manufacturing method thereof 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US07560772B2
公开(公告)日：2009-07-14
申请号：US11963846
申请日：2007-12-23
申请人： Satoshi Sakai , Atsushi Hiraiwa , Satoshi Yamamoto
发明人： Satoshi Sakai , Atsushi Hiraiwa , Satoshi Yamamoto
IPC分类号： H01L29/76 , H01L21/8234 , H01L21/336
CPC分类号： H01L21/823462 , H01L21/82345 , H01L21/823842 , H01L21/823857 , H01L21/823878
摘要： After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).
摘要翻译：在半导体基板（1）的表面上形成氧化硅膜（9）之后，使用稀释的HF除去形成有效厚度小的栅极绝缘膜的区域中的氧化硅膜（9）在半导体衬底（1）上形成高介电常数绝缘膜（10）。因此，由高介电常数绝缘膜（10）和氧化硅膜（9）构成的栅极绝缘膜（12）和栅极绝缘膜（12）构成的两种栅极绝缘膜由高介电常数在半导体衬底（1）上形成恒定绝缘膜（10）。

9. 发明授权

US07262101B2 Method of manufacturing a semiconductor integrated circuit device 有权
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：US07262101B2
公开(公告)日：2007-08-28
申请号：US10917294
申请日：2004-08-13
申请人： Dai Ishikawa , Satoshi Sakai , Atsushi Hiraiwa
发明人： Dai Ishikawa , Satoshi Sakai , Atsushi Hiraiwa
IPC分类号： H01L21/8234 , H01L21/336
CPC分类号： H01L21/28185 , H01L21/0214 , H01L21/02332 , H01L21/28202 , H01L21/3143 , H01L21/82345 , H01L21/823462 , H01L21/823842 , H01L21/823857 , H01L27/1052 , H01L27/10814 , H01L27/10888 , H01L27/10894 , H01L29/513 , H01L29/518 , H01L29/6659 , H01L29/7833
摘要： A method of manufacturing a semiconductor integrated circuit device comprising forming a silicon oxide film as thin as 5 nm or less on the surfaces of p type wells and n type wells by wet oxidizing a substrate, heating the substrate in an atmosphere containing about 5% of an NO gas to introduce nitrogen into the silicon oxide film so as to form a silicon oxynitride film, exposing the substrate to a nitrogen plasma atmosphere to further introduce nitrogen into the silicon oxynitride film in order to form a silicon oxynitride gate insulating film having a first peak concentration near the interface with the substrate and a second peak concentration near the surface thereof. Thereby, the concentration of nitrogen in the gate insulating film is increased without raising the concentration of nitrogen near the interface between the substrate and the gate insulating film to a higher level than required.
摘要翻译：一种制造半导体集成电路器件的方法，包括在p型阱和n型阱的表面上通过湿式氧化衬底形成薄至5nm或更小的氧化硅膜，在含有约5％用于将氮气引入到氧化硅膜中以形成氧氮化硅膜的NO气体，将衬底暴露于氮等离子体气氛中，以进一步将氮气引入氮氧化硅膜中，以形成具有第一个氮氧化物的氮氧化硅栅极绝缘膜与基板的界面附近的峰值浓度和其表面附近的第二峰值浓度。由此，不会使衬底与栅极绝缘膜的界面附近的氮浓度提高到高于所需的水平，所以栅极绝缘膜的氮浓度增加。

10. 发明授权

US07211497B2 Method for fabricating semiconductor devices 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07211497B2
公开(公告)日：2007-05-01
申请号：US10695798
申请日：2003-10-30
申请人： Atsushi Hiraiwa , Satoshi Sakai , Dai Ishikawa , Yoshihiro Ikeda
发明人： Atsushi Hiraiwa , Satoshi Sakai , Dai Ishikawa , Yoshihiro Ikeda
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28273 , H01L21/3105 , H01L21/823857 , H01L27/105 , H01L27/11521 , H01L27/11526 , H01L29/513 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： According to the present invention, an oxide film with the film quality almost equivalent to that of the thermal oxide can be formed by the low-temperature treatment. After removing an insulator on the active region of the substrate which constitutes a semiconductor wafer, an insulator made of, for example, silicon oxide is deposited on the main surface of the semiconductor wafer by the low pressure CVD method. This insulator is a film to form a gate insulator of MISFET in a later step. Subsequently, a plasma treatment is performed in an atmosphere containing oxygen (oxygen plasma treatment) to the insulator in the manner as schematically shown by the arrows. By so doing, the film quality of the insulator formed by the CVD method can be improved to the extent almost equivalent to that of the insulator formed of the thermal oxide.
摘要翻译：根据本发明，可以通过低温处理形成膜质量几乎等于热氧化物的氧化膜。在构成半导体晶片的基板的有源区域上去除绝缘体之后，通过低压CVD法在半导体晶片的主表面上沉积由例如氧化硅制成的绝缘体。该绝缘体是在后续步骤中形成MISFET的栅极绝缘体的膜。随后，按照箭头示意性地示出的方式，在含有氧的气氛（氧等离子体处理）中对绝缘体进行等离子体处理。通过这样做，通过CVD方法形成的绝缘体的膜质量可以提高到与由热氧化物形成的绝缘体几乎相同的程度。

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