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1. 发明授权

US07884482B2 Flip-chip mounting substrate 有权
标题翻译：倒装芯片安装基板
公开(公告)号：US07884482B2
公开(公告)日：2011-02-08
申请号：US11957866
申请日：2007-12-17
申请人： Takashi Ozawa , Yasushi Araki , Masatoshi Nakamura , Seiji Sato
发明人： Takashi Ozawa , Yasushi Araki , Masatoshi Nakamura , Seiji Sato
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H05K1/111 , H01L23/49816 , H01L23/49838 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05647 , H01L2224/10175 , H01L2224/814 , H01L2924/00014 , H05K3/3452 , H05K2201/09381 , H05K2201/0989 , H05K2201/09909 , H05K2201/10674 , Y02P70/611 , H01L2924/014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： It is a flip-chip mounting substrate according to the invention has a wiring pattern in which bonding pads and predetermined parts of lead wires continuously extending from the bonding pads are exposed from an insulating layer or a solder resist. In the flip-chip mounting substrate, exposed parts of the wiring pattern are formed in to a plurality of different shapes. The exposed parts are formed so that the areas of the bonding pads are substantially equal to one another, and that the total areas of predetermined parts of the lead wires continuously extending from the bonding pads are substantially equal to one another.
摘要翻译：根据本发明的倒装芯片安装基板具有布线图案，其中从焊盘连续延伸的焊盘和引线的预定部分从绝缘层或阻焊剂露出。在倒装芯片安装基板中，布线图案的露出部分形成为多种不同的形状。露出的部分形成为使得接合焊盘的面积基本上彼此相等，并且从接合焊盘连续延伸的引线的预定部分的总面积基本相等。

2. 发明授权

US07847417B2 Flip-chip mounting substrate and flip-chip mounting method 有权
标题翻译：倒装芯片安装基板和倒装芯片安装方法
公开(公告)号：US07847417B2
公开(公告)日：2010-12-07
申请号：US11613753
申请日：2006-12-20
申请人： Yasushi Araki , Seiji Sato , Masatoshi Nakamura , Takashi Ozawa
发明人： Yasushi Araki , Seiji Sato , Masatoshi Nakamura , Takashi Ozawa
IPC分类号： H01L23/02
CPC分类号： H05K3/3452 , H01L21/563 , H01L23/3171 , H01L23/49816 , H01L23/49838 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/0401 , H01L2224/10175 , H01L2224/11 , H01L2224/1132 , H01L2224/13 , H01L2224/13099 , H01L2224/131 , H01L2224/16237 , H01L2224/81192 , H01L2224/81193 , H01L2224/81385 , H01L2224/81801 , H01L2224/81815 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H05K2201/09381 , H05K2201/099 , H05K2201/10674 , H01L2924/00 , H01L2924/00014
摘要： A solder resist and a central pad to which a central Au bump provided on a semiconductor chip is flip-chip bonded are formed on a substrate main body. In a flip-chip mounting substrate where an underfill resin is provided after the semiconductor chip is mounted, a central opening portion for exposing the central pad is formed in the solder resist, and also, an edge portion forming the central opening portion of the solder resist is partially overlapped with the outer peripheral portion of the central pad.
摘要翻译：在衬底主体上形成阻焊剂和设置在半导体芯片上的中心Au凸块倒装芯片接合的中心焊盘。在安装半导体芯片之后设置底部填充树脂的倒装芯片安装基板中，在阻焊层中形成用于暴露中心焊盘的中心开口部分，并且还形成形成焊料的中心开口部分的边缘部分抗蚀剂部分地与中心焊盘的外周部分重叠。

3. 发明申请

US20080142993A1 FLIP-CHIP MOUNTING SUBSTRATE 有权
标题翻译：片芯安装基板
公开(公告)号：US20080142993A1
公开(公告)日：2008-06-19
申请号：US11957866
申请日：2007-12-17
申请人： Takashi Ozawa , Yasushi Araki , Masatoshi Nakamura , Seiji Sato
发明人： Takashi Ozawa , Yasushi Araki , Masatoshi Nakamura , Seiji Sato
IPC分类号： H01L23/538
CPC分类号： H05K1/111 , H01L23/49816 , H01L23/49838 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05647 , H01L2224/10175 , H01L2224/814 , H01L2924/00014 , H05K3/3452 , H05K2201/09381 , H05K2201/0989 , H05K2201/09909 , H05K2201/10674 , Y02P70/611 , H01L2924/014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： It is a flip-chip mounting substrate according to the invention has a wiring pattern in which bonding pads and predetermined parts of lead wires continuously extending from the bonding pads are exposed from an insulating layer or a solder resist. In the flip-chip mounting substrate, exposed parts of the wiring pattern are formed in to a plurality of different shapes. The exposed parts are formed so that the areas of the bonding pads are substantially equal to one another, and that the total areas of predetermined parts of the lead wires continuously extending from the bonding pads are substantially equal to one another.
摘要翻译：根据本发明的倒装芯片安装基板具有布线图案，其中从焊盘连续延伸的焊盘和引线的预定部分从绝缘层或阻焊剂露出。在倒装芯片安装基板中，布线图案的露出部分形成为多种不同的形状。露出的部分形成为使得接合焊盘的面积基本上彼此相等，并且从接合焊盘连续延伸的引线的预定部分的总面积基本相等。

4. 发明申请

US20070145553A1 FLIP-CHIP MOUNTING SUBSTRATE AND FLIP-CHIP MOUNTING METHOD 有权
标题翻译：片芯安装基板和片芯安装方法
公开(公告)号：US20070145553A1
公开(公告)日：2007-06-28
申请号：US11613753
申请日：2006-12-20
申请人： Yasushi Araki , Seiji Sato , Masatoshi Nakamura , Takashi Ozawa
发明人： Yasushi Araki , Seiji Sato , Masatoshi Nakamura , Takashi Ozawa
IPC分类号： H01L23/02
CPC分类号： H05K3/3452 , H01L21/563 , H01L23/3171 , H01L23/49816 , H01L23/49838 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/0401 , H01L2224/10175 , H01L2224/11 , H01L2224/1132 , H01L2224/13 , H01L2224/13099 , H01L2224/131 , H01L2224/16237 , H01L2224/81192 , H01L2224/81193 , H01L2224/81385 , H01L2224/81801 , H01L2224/81815 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H05K2201/09381 , H05K2201/099 , H05K2201/10674 , H01L2924/00 , H01L2924/00014
摘要： A solder resist and a central pad to which a central Au bump provided on a semiconductor chip is flip-chip bonded are formed on a substrate main body. In a flip-chip mounting substrate where an underfill resin is provided after the semiconductor chip is mounted, a central opening portion for exposing the central pad is formed in the solder resist, and also, an edge portion forming the outer peripheral portion of the solder resist is partially overlapped with the outer peripheral portion of the central pad.
摘要翻译：在衬底主体上形成阻焊剂和设置在半导体芯片上的中心Au凸块倒装芯片接合的中心焊盘。在安装半导体芯片之后设置底部填充树脂的倒装芯片安装基板中，在阻焊层中形成用于露出中心焊盘的中心开口部分，并且还形成形成焊料外周部分的边缘部分抗蚀剂部分地与中心焊盘的外周部分重叠。

5. 发明申请

US20070108628A1 MOUNTING SUBSTRATE AND SEMICONDUCTOR DEVICE 有权
标题翻译：安装基板和半导体器件
公开(公告)号：US20070108628A1
公开(公告)日：2007-05-17
申请号：US11560076
申请日：2006-11-15
申请人： Takashi Ozawa , Yasushi Araki , Masatoshi Nakamura , Seiji Sato
发明人： Takashi Ozawa , Yasushi Araki , Masatoshi Nakamura , Seiji Sato
IPC分类号： H01L23/48
CPC分类号： H01L21/563 , H01L23/49811 , H01L23/49838 , H01L2224/73203 , H05K3/305 , H05K2201/09772 , H05K2201/09781 , H05K2201/10674 , H05K2201/10977 , Y02P70/613
摘要： A mounting substrate for mounting a semiconductor chip in a flip chip manner, having a plurality of connection pads to which the semiconductor chip is connected, an insulating pattern formed so as to cover a part of the connection pads, and a plurality of dummy patterns for controlling a flow of an underfill infiltrated below the semiconductor chip, characterized in that the plurality of dummy patterns are arranged in staggered lattice shape.
摘要翻译：一种用于以倒装芯片方式安装半导体芯片的安装基板，具有连接半导体芯片的多个连接焊盘，形成为覆盖连接焊盘的一部分的绝缘图案，以及多个用于控制渗透在半导体芯片下方的底部填充物的流动，其特征在于，所述多个虚拟图案以交错的格子形状布置。

6. 发明授权

US07838998B2 Mounting substrate and semiconductor device 有权
标题翻译：安装基板和半导体器件
公开(公告)号：US07838998B2
公开(公告)日：2010-11-23
申请号：US11560076
申请日：2006-11-15
申请人： Takashi Ozawa , Yasushi Araki , Masatoshi Nakamura , Seiji Sato
发明人： Takashi Ozawa , Yasushi Araki , Masatoshi Nakamura , Seiji Sato
IPC分类号： H01L23/48
CPC分类号： H01L21/563 , H01L23/49811 , H01L23/49838 , H01L2224/73203 , H05K3/305 , H05K2201/09772 , H05K2201/09781 , H05K2201/10674 , H05K2201/10977 , Y02P70/613
摘要： A mounting substrate for mounting a semiconductor chip in a flip chip manner, having a plurality of connection pads to which the semiconductor chip is connected, an insulating pattern formed so as to cover a part of the connection pads, and a plurality of dummy patterns for controlling a flow of an underfill infiltrated below the semiconductor chip, characterized in that the plurality of dummy patterns are arranged in staggered lattice shape.
摘要翻译：一种用于以倒装芯片方式安装半导体芯片的安装基板，具有连接半导体芯片的多个连接焊盘，形成为覆盖连接焊盘的一部分的绝缘图案，以及多个用于控制渗透在半导体芯片下方的底部填充物的流动，其特征在于，所述多个虚拟图案以交错的格子形状布置。

7. 发明授权

US08669665B2 Flip-chip mounting substrate and flip-chip mounting method 有权
标题翻译：倒装芯片安装基板和倒装芯片安装方法
公开(公告)号：US08669665B2
公开(公告)日：2014-03-11
申请号：US12478128
申请日：2009-06-04
申请人： Yasushi Araki , Seiji Sato , Masatoshi Nakamura , Takashi Ozawa
发明人： Yasushi Araki , Seiji Sato , Masatoshi Nakamura , Takashi Ozawa
IPC分类号： H01L23/498
CPC分类号： H05K3/3452 , H01L21/563 , H01L23/3171 , H01L23/49816 , H01L23/49838 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/0401 , H01L2224/10175 , H01L2224/11 , H01L2224/1132 , H01L2224/13 , H01L2224/13099 , H01L2224/131 , H01L2224/16237 , H01L2224/81192 , H01L2224/81193 , H01L2224/81385 , H01L2224/81801 , H01L2224/81815 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H05K2201/09381 , H05K2201/099 , H05K2201/10674 , H01L2924/00 , H01L2924/00014
摘要： A solder resist and a central pad to which a central Au bump provided on a semiconductor chip is flip-chip bonded are formed on a substrate main body. In a flip-chip mounting substrate where an underfill resin is provided after the semiconductor chip is mounted, a central opening portion for exposing the central pad is formed in the solder resist, and also, an edge portion forming the central opening portion of the solder resist is partially overlapped with the outer peripheral portion of the central pad.
摘要翻译：在衬底主体上形成阻焊剂和设置在半导体芯片上的中心Au凸块倒装芯片接合的中心焊盘。在安装半导体芯片之后设置底部填充树脂的倒装芯片安装基板中，在阻焊层中形成用于暴露中心焊盘的中心开口部分，并且还形成形成焊料的中心开口部分的边缘部分抗蚀剂部分地与中心焊盘的外周部分重叠。

8. 发明申请

US20090250812A1 FLIP-CHIP MOUNTING SUBSTRATE AND FLIP-CHIP MOUNTING METHOD 有权
标题翻译：片芯安装基板和片芯安装方法
公开(公告)号：US20090250812A1
公开(公告)日：2009-10-08
申请号：US12478128
申请日：2009-06-04
申请人： Yasushi Araki , Seiji Sato , Masatoshi Nakamura , Takashi Ozawa
发明人： Yasushi Araki , Seiji Sato , Masatoshi Nakamura , Takashi Ozawa
IPC分类号： H01L23/498
CPC分类号： H05K3/3452 , H01L21/563 , H01L23/3171 , H01L23/49816 , H01L23/49838 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/0401 , H01L2224/10175 , H01L2224/11 , H01L2224/1132 , H01L2224/13 , H01L2224/13099 , H01L2224/131 , H01L2224/16237 , H01L2224/81192 , H01L2224/81193 , H01L2224/81385 , H01L2224/81801 , H01L2224/81815 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H05K2201/09381 , H05K2201/099 , H05K2201/10674 , H01L2924/00 , H01L2924/00014
摘要： A solder resist and a central pad to which a central Au bump provided on a semiconductor chip is flip-chip bonded are formed on a substrate main body. In a flip-chip mounting substrate where an underfill resin is provided after the semiconductor chip is mounted, a central opening portion for exposing the central pad is formed in the solder resist, and also, an edge portion forming the central opening portion of the solder resist is partially overlapped with the outer peripheral portion of the central pad.
摘要翻译：在衬底主体上形成阻焊剂和设置在半导体芯片上的中心Au凸块倒装芯片接合的中心焊盘。在安装半导体芯片之后设置底部填充树脂的倒装芯片安装基板中，在阻焊层中形成用于暴露中心焊盘的中心开口部分，并且还形成形成焊料的中心开口部分的边缘部分抗蚀剂部分地与中心焊盘的外周部分重叠。

9. 发明授权

US08803304B2 Semiconductor package and manufacturing method thereof 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US08803304B2
公开(公告)日：2014-08-12
申请号：US13169335
申请日：2011-06-27
申请人： Yohei Igarashi , Yasushi Araki
发明人： Yohei Igarashi , Yasushi Araki
IPC分类号： H01L23/34
CPC分类号： H01L23/3121 , H01L21/563 , H01L23/498 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L25/0657 , H01L25/50 , H01L2224/13144 , H01L2224/16225 , H01L2224/16227 , H01L2224/27013 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/48228 , H01L2224/48465 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81203 , H01L2224/83007 , H01L2224/83192 , H01L2224/83385 , H01L2224/92227 , H01L2224/92247 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00011 , H01L2924/00014
摘要： There is provided a semiconductor package that includes: a wiring board; a first semiconductor chip mounted on the wiring board; a second semiconductor chip mounted on the first semiconductor chip, wherein a size of second semiconductor chip is larger than that of the first semiconductor chip when viewed from a thickness direction of the semiconductor package; an insulating resin provided between the wiring board and the second semiconductor chip and between the wiring board and the first semiconductor chip so as to cover the first semiconductor chip; a base disposed on the wiring board to face a surface of the second semiconductor chip, wherein the insulating resin is provided between the base and the second semiconductor chip so as to cover the base.
摘要翻译：提供一种半导体封装，其包括：布线板; 安装在所述布线板上的第一半导体芯片; 安装在所述第一半导体芯片上的第二半导体芯片，其中当从所述半导体封装的厚度方向观察时，所述第二半导体芯片的尺寸大于所述第一半导体芯片的尺寸; 设置在所述布线板和所述第二半导体芯片之间以及所述布线板和所述第一半导体芯片之间以覆盖所述第一半导体芯片的绝缘树脂; 设置在所述布线板上以与所述第二半导体芯片的表面相对的基底，其中所述绝缘树脂设置在所述基底和所述第二半导体芯片之间以覆盖所述基底。

10. 发明申请

US20130295477A1 FUEL CELL SYSTEM 有权
标题翻译：燃油电池系统
公开(公告)号：US20130295477A1
公开(公告)日：2013-11-07
申请号：US13574709
申请日：2011-01-28
申请人： Ryoichi Nanba , Yasushi Araki
发明人： Ryoichi Nanba , Yasushi Araki
IPC分类号： H01M8/04
CPC分类号： H01M8/04291 , H01M8/04089 , H01M8/04388 , H01M8/04514 , H01M8/04552 , H01M8/04746 , H01M8/04828 , H01M8/04873
摘要： A fuel cell system having a fuel cell operated under non-humidified conditions that includes a polymer electrolyte membrane sandwiched between an anode and a cathode, a fuel gas channel facing the anode to supply it with fuel gas, an oxidant gas channel facing the cathode to supply it with oxidant gas, and a flow direction of the fuel gas and the oxidant gas are opposite. The fuel cell system may control a water vapor amount at an outlet of the fuel gas channel based on a value that is set based on a relationship between a voltage of the fuel cell and the water vapor amount. The fuel cell system may control an average flow rate of the fuel gas in the fuel gas channel based on a value that is set based on a relationship between a voltage of the fuel cell and the average flow rate.
摘要翻译：一种燃料电池系统，其具有在非加湿条件下工作的燃料电池，所述燃料电池包括夹在阳极和阴极之间的聚合物电解质膜，面对阳极的燃料气体通道，供给燃料气体，与阴极相对的氧化剂气体通道供给氧化剂气体，燃料气体和氧化剂气体的流动方向相反。燃料电池系统可以基于基于燃料电池的电压和水蒸汽量之间的关系设定的值来控制燃料气体通道的出口处的水蒸气量。燃料电池系统可以基于基于燃料电池的电压与平均流量之间的关系设定的值来控制燃料气体通道中的燃料气体的平均流量。

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