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    • 1. 发明申请
    • Cache memory device and cache memory control method
    • 缓存内存设备和缓存内存控制方式
    • US20080320227A1
    • 2008-12-25
    • US12230113
    • 2008-08-22
    • Takashi MiuraNaohiro Kiyota
    • Takashi MiuraNaohiro Kiyota
    • G06F12/08G06F11/14G06F11/00
    • G06F12/12G06F11/1064G06F11/141G06F12/0804G06F12/0897G06F2212/1032
    • A cache memory device that includes a cache which stores data and tag information specifying an address of stored data, includes a detection unit that detects an error by reading out the tag information when a writing/readout request of desired data occurs to the cache, a search unit that searches the tag information for an address of the desired data when no error is detected in the tag information as a result of error detection by the detection unit, a memory unit that stores an address of data that is to be replaced by the desired data, the address being contained in the tag information, when the address of the desired data is not contained in the tag information as a result of search by the search unit, and a control unit that requests an external unit to replace data with a use of the address stored by the memory unit.
    • 一种缓存存储装置,包括存储数据的高速缓存和指定所存储数据的地址的标签信息,所述高速缓冲存储器装置包括检测单元,所述检测单元通过在对所述高速缓存发生期望数据的写入/读出请求时读出所述标签信息来检测错误, 搜索单元,作为所述检测单元的错误检测的结果,在所述标签信息中没有检测到错误时搜索所述标签信息的地址;存储单元,其存储要由所述检索单元替换的数据的地址 所希望的数据,包含在标签信息中的地址,当所需数据的地址作为搜索单元的搜索结果而不包含在标签信息中时,以及控制单元,其请求外部单元用 使用存储单元存储的地址。
    • 5. 发明授权
    • Simulation apparatus and control method of simulation
    • 仿真设备及其仿真控制方法
    • US07673265B2
    • 2010-03-02
    • US11851058
    • 2007-09-06
    • Takashi AkibaTakashi Miura
    • Takashi AkibaTakashi Miura
    • G06F17/50G06F9/455
    • G06F17/5022
    • A simulation apparatus, including a first simulator assigning an operating cycle number, a second simulator assigning an operating cycle number, and a control portion for synchronously controlling the first simulator and the second simulator, the control portion causing communication between the first simulator and the second simulator so as to control control-information and synchronous-information of the first simulator and the second simulator, the control-information controlling operations of the first simulator and the second simulator, wherein the control portion sets up the operating cycle numbers of the first simulator and the second simulator at a first cycle value when a synchronous condition of the synchronous-information is established, the control portion sets up at least one of the operating cycle numbers of the first simulator and the second simulator at a second cycle value being larger than the first cycle value when the synchronous condition of the synchronous-information is not established.
    • 一种模拟装置,包括分配操作周期数的第一模拟器,分配操作周期数的第二模拟器和用于同步控制第一模拟器和第二模拟器的控制部分,所述控制部分引起第一模拟器与第二模拟器之间的通信 模拟器,以便控制第一模拟器和第二模拟器的控制信息和同步信息,第一模拟器和第二模拟器的控制信息控制操作,其中控制部分设置第一模拟器的操作周期数 并且当所述同步信息的同步状态被建立时,所述第二模拟器处于第一周期值,所述控制部分以第二周期值设定所述第一模拟器和所述第二模拟器的操作周期数中的至少一个, 同步信息的同步状态时的第一个周期值 没有建立。
    • 6. 发明申请
    • DEBUGGING DEVICE, DEBUGGING METHOD AND HARDWARE EMULATOR
    • 调试装置,调试方法和硬件仿真器
    • US20090204384A1
    • 2009-08-13
    • US12367761
    • 2009-02-09
    • Takashi AKIBATakashi Miura
    • Takashi AKIBATakashi Miura
    • G06F9/455
    • G06F11/3652
    • A hardware emulator having: a verification target circuit that includes a CPU in which progress of instruction execution is controlled by a program counter, and a circuit that operates according to the instruction execution by the CPU; at least one replica circuit that is formed by replication of the verification target circuit; a debug controller that starts operation of the verification target circuit upon receipt of an operation start signal from an outside of the hardware emulator, and that stops operation of the verification target circuit and the replica circuit when a value of the program counter of the verification target circuit reaches a predetermined breakpoint; an execution start delaying portion that causes the replica circuit to start execution of an instruction with a delay equivalent to a predetermined number of instructions after the verification target circuit starts execution of the same instruction; a program counter controller that performs control so that the value of the program counter of the verification target circuit and a value of a program counter of the replica circuit are simultaneously updated when both of the verification target circuit and the replica circuit complete the execution of their respective running instructions; and an output portion that sends an output from any one of the verification target circuit and the replica circuit to the outside of the hardware emulator in response to a request from the outside of the hardware emulator.
    • 一种硬件仿真器,具有:验证对象电路,包括CPU,其中由程序计数器控制指令执行的进行,以及根据CPU的指令执行操作的电路; 由验证对象电路的复制形成的至少一个复制电路; 调试控制器,当从所述硬件仿真器的外部接收到操作开始信号时,开始所述验证对象电路的动作,并且当所述验证对象的程序计数器的值为止时,停止所述验证对象电路和所述副本电路的动作 电路达到预定的断点; 一个执行开始延迟部分,在验证目标电路开始执行相同的指令之后,使得复制电路开始执行具有等于预定数目的指令的延迟的指令; 程序计数器控制器,当验证对象电路和复制电路两者完成其执行时,进行控制,使得验证对象电路的程序计数器的值和复制电路的程序计数器的值同时被更新 各自运行指令; 以及输出部,其响应于来自硬件仿真器的外部的请求,将来自验证对象电路和复制电路中的任一个的输出发送到硬件仿真器的外部。
    • 7. 发明授权
    • Wireless communication device having gain error correcting feature
    • 具有增益误差校正特征的无线通信装置
    • US07280839B2
    • 2007-10-09
    • US10531051
    • 2003-12-26
    • Takashi MiuraHidenori MatsumotoToshio Obara
    • Takashi MiuraHidenori MatsumotoToshio Obara
    • H04Q7/20
    • H04W52/04
    • It is an object of the present invention to suppress an abrupt gain change and smoothly and highly accurately control transmitted electric power even if the transmitted electric power greatly changes when a closed loop control that crosses the threshold value as the detection limit of the transmitted electric power.The transmitted electric power of a self-station is detected to obtain an error between the detected transmitted electric power of the self-station and transmitted electric power set in accordance with a transmitted electric power control bit sent to the self-station from the other station. A buffer unit such as a transmitted electric power deciding part, an error integrating part or the like is provided for preventing the obtained error from greatly changing upon great change of the transmitted electric power when the transmitted electric power is controlled by crossing the threshold value as the detection limit of the transmitted electric power. Thus, an error when the gain of the variable gain amplifier is suppressed.
    • 本发明的目的是抑制突然的增益变化,并且即使当跨越阈值的闭环控制作为发送电力的检测极限时,即使发送的电力发生大的变化,也能够平滑高精度地控制发送的电力 。 检测自站的发射功率,以便根据从另一台站发送到自车站的发射功率控制比特来获得检测到的自站发射功率与发射功率之间的误差 。 提供诸如发送功率决定部分,误差积分部分等的缓冲单元,用于当通过将阈值作为跨越阈值进行控制来防止所发送的电力发生大的变化时所获得的误差的大幅度变化 传输电力的检测限。 因此,抑制可变增益放大器的增益时的误差。
    • 8. 发明授权
    • Process for producing 3-1-menthoxypropane-1,2-diol
    • 制备3-1-薄荷氧基丙-1,2-二醇的方法
    • US06407293B1
    • 2002-06-18
    • US09962122
    • 2001-09-26
    • Akira AmanoTeruyoshi AkiyamaTakashi MiuraToshimitsu Hagiwara
    • Akira AmanoTeruyoshi AkiyamaTakashi MiuraToshimitsu Hagiwara
    • C07C3512
    • C07C43/196C07C41/03
    • A process for producing highly pure 3-1-menthoxypropane-1,2-diol safely and efficiently, and an intermediate to be used in the process. 3-1-menthoxypropane-1,2-diol represented by the chemical formula (IV) is produced by adding 1-menthol to a 1,2-epoxy-3-halogenopropane represented by the following general formula (I) (wherein X represents a halogen atom) in an organic solvent in the presence of a Lewis acid to produce a novel 1-halogeno-3-1-menthoxypropan-2-ol represented by the following general formula (II), then, epoxidating it with a base in the presence of a phase transfer catalyst to produce a 1,2-epoxy-3-1-menthoxypropane represented by the chemical formula (III), and further hydrolyzing it.
    • 安全有效地生产高纯度3-1-薄荷氧基丙二醇-1,2-二醇的方法,以及该方法中使用的中间体。 由化学式(IV)表示的3-1-薄荷氧基丙烷-1,2-二醇通过将1-薄荷醇加入到由下列通式(I)表示的1,2-环氧-3-氯代丙烷中(其中X表示 卤素原子)在有机溶剂中在路易斯酸存在下反应,得到由以下通式(II)表示的新型1-卤代-3-三氟甲氧基丙-2-醇,然后用碱进行环氧化 存在相转移催化剂以制备由化学式(III)表示的1,2-环氧-3-丁氧基丙烷,并进一步水解。
    • 9. 发明授权
    • Process for the preparation of 4-substituted azetidinone derivatives
    • 制备4-取代的氮杂环丁酮衍生物的方法
    • US06340751B1
    • 2002-01-22
    • US09357153
    • 1999-07-19
    • Takao SaitoToshiyuki MurayamaTakaji MatsumotoTakashi Miura
    • Takao SaitoToshiyuki MurayamaTakaji MatsumotoTakashi Miura
    • C07F718
    • C07D413/06C07D205/08Y02P20/55
    • Disclosed is a process for the preparation of a 4-substituted azetidinone derivative, which comprises reacting an azetidinone derivative and an amide compound in the presence of a magnesium compound such as those represented by the following formulas (II): and (IV): represented by the following formula (III): MgR5R6  (III) wherein R5 represents a C1-12 alkyl group, a C2-5 alkenyl group, a 5- to 8-membered alicyclic group which may be substituted by a lower C1-4 alkyl group, a phenyl group which may be substituted by a lower C1-4 alkyl group, a lower C1-4 alkoxy group or a halogen atom or a benzyl group which may be substituted by a lower C1-4 alkyl group, a lower C1-4 alkoxy group or a halogen atom, and R6 represents a halogen atom, a methanesulfonyloxy group, a benzenesulfonyloxy group, a p-toluenesulfonyloxy group, a trifluoromethanesulfonyloxy group, an acetoxy group which may be substituted by a halogen atom or a cyano group or an OR7 group (R7 representing a lower C1-4 alkyl group, a substituted or unsubstituted phenyl group or a substituted or unsubstituted benzyl group). The process provides an industrially excellent process for the preparation of a 4-substituted azetidinone derivative which permits the selective preparation of an intermediate for the synthesis of a carbapenem antibacterial agent having a desired 1-&bgr;′ configuration.
    • 公开了制备4-取代的氮杂环丁酮衍生物的方法,该方法包括在镁化合物如下式(II)和(IV)所示的那些镁化合物存在下使氮杂环丁酮衍生物与酰胺化合物反应:代表 通过下式(III)表示:其中R5表示C1-12烷基,C2-5烯基,可被低级C1-4烷基取代的5至8元脂环基,苯基 可以被低级C 1-4烷基,低级C 1-4烷氧基或卤素原子取代的苯基,或可以被低级C 1-4烷基取代的苄基,低级C 1-4烷氧基或 卤原子,R6表示卤原子,甲磺酰氧基,苯磺酰氧基,对甲苯磺酰氧基,三氟甲磺酰氧基,可被卤素原子或氰基取代的乙酰氧基或OR7基(R7表示 低级C 1-4烷基,取代的o R未取代的苯基或取代或未取代的苄基)。 该方法提供了制备4-取代的氮杂环丁酮衍生物的工业上优异的方法,其允许选择性制备用于合成具有所需1-β'构型的碳青霉烯类抗菌剂的中间体。
    • 10. 发明授权
    • Method for manufacturing (3S,4R)-4-[(R)-1′-formylethyl]azetidin-2-one derivatives
    • 制备(3S,4R)-4 - [(R)-1'-甲酰乙基]氮杂环丁-2-酮衍生物的方法
    • US06169179A
    • 2001-01-02
    • US09329335
    • 1999-06-10
    • Howard AlperTakao SaitoTakashi Miura
    • Howard AlperTakao SaitoTakashi Miura
    • C07D20500
    • C07D205/08Y02P20/55
    • A method for manufacturing (3S,4R)-4-[(R)-1′-formylethyl]azetidin-2-one derivatives represented by formula (3) wherein R1 represents a hydrogen atom or a protective group, through asymmetric hydroformylation of 4-vinylazetidin-2-one represented by formula (1) wherein R1 has the same meaning as described above; in the presence of a rhodium complex and a (2S,4S)-diphosphine compound represented by formula (2) wherein R2 represents a phenyl group which may be substituted with 1-5 substituent(s) selected from a lower alkyl group, a lower alkoxy group, and a halogen atom. By use of both an inexpensive optically active diphosphine compound and a rhodium complex as catalysts, intermediate compounds important for carbapenem antibiotics can be manufactured with high selectivity and efficiency.
    • 制备由式(3)表示的(3S,4R)-4 - [(R)-1'-甲基乙基]氮杂环丁烷-2-酮衍生物的方法,其中R 1表示氢原子或保护基,通过不对称加氢甲酰化4 (1)表示的1-乙烯基氮杂环丁烷-2-酮,其中R1具有与上述相同的含义; 在铑络合物和由式(2)表示的(2S,4S) - 二膦化合物的存在下,其中R 2表示可被1-5个选自以下的取代基取代的苯基:低级烷基,低级 烷氧基和卤素原子。通过使用廉价的光学活性二膦化合物和铑配合物作为催化剂,可以以高选择性和高效率制造对碳青霉烯类抗生素重要的中间体化合物。