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    • 4. 发明授权
    • Image signal binary circuit with a variable-frequency clock signal
generator for driving an image sensor
    • 具有用于驱动图像传感器的可变频率时钟信号发生器的图像信号二进制电路
    • US4839739A
    • 1989-06-13
    • US23262
    • 1987-03-09
    • Tsuguji TachiuchiSatoshi KonumaNobuo Tsuchiya
    • Tsuguji TachiuchiSatoshi KonumaNobuo Tsuchiya
    • H04N1/40H04N1/403
    • H04N1/403H04N1/40056
    • A one-dimensional image sensor comprising a solid image pick-up element takes images in sequence, and generates an image signal. Clock pulses from a frequency variable type clock pulse generator having a frequency which varies in correspondence to a control signal are supplied to a one-dimensional image sensor, thereby image signals are outputted in sequence. The image signal is amplified by an amplifier and inputted to a comparator and compared with a reference signal. A frequency variable range of the frequency variable type clock pulse generator is set higher than the cut-off frequency of the amplifier, and the binary level output by the comparator is substantially the same as the image inputted to the one-dimensional image sensor and control is effected by the variable frequency of the clock pulses.
    • 包括实心图像拾取元件的一维图像传感器依次拍摄图像并产生图像信号。 来自具有对应于控制信号变化的频率的频率可变型时钟脉冲发生器的时钟脉冲被提供给一维图像传感器,由此依次输出图像信号。 图像信号被放大器放大并输入到比较器并与参考信号进行比较。 频率可变型时钟脉冲发生器的频率可变范围被设置为高于放大器的截止频率,并且由比较器输出的二进制电平基本上与输入到一维图像传感器的图像和控制 受时钟脉冲的可变频率的影响。
    • 7. 发明授权
    • Data processing apparatus, power supply controller and display unit
    • 数据处理装置,电源控制器和显示单元
    • US5511201A
    • 1996-04-23
    • US857629
    • 1992-03-25
    • Hideki KamimakiKiyokazu NishiokaTsuguji TachiuchiNobuo TsuchiyaMasahiro JinushiHitoshi SadamitsuHiroshi ItoTakashi YoshitomiKoichi IsajiTakao Ohba
    • Hideki KamimakiKiyokazu NishiokaTsuguji TachiuchiNobuo TsuchiyaMasahiro JinushiHitoshi SadamitsuHiroshi ItoTakashi YoshitomiKoichi IsajiTakao Ohba
    • G09G3/34G06F11/00G06F11/30
    • G09G3/3406G09G2320/0606G09G2320/0626G09G2330/021G09G2330/026
    • A data processing apparatus which includes a display unit and a power supply controller for supplying power to the display unit. The display unit has a display screen and a back light controller. The power supply controller comprises a switch, at least one output line for receiving the power from the switch and for supplying therethrough the power to electronic devices, a delay circuit for receiving the power from the switch and when the switch is turned ON to start supply of the power, for outputting the power after passage of a predetermined time from the start of the power supply, and a second output line for supplying the power from the delay circuit to the back light controller therethrough. The display unit has a memory means for storing therein a luminance data on the display screen through the back light controller when the power supply is turned OFF and for determining an output state of the display unit through the back light controller on the basis of the luminance data read out from the memory means when the power supply is turned ON. Further, the data processing apparatus has a means for invalidating output of a display data to be output onto the display screen and a means, after the display data is invalidated, for reducing a frequency of a timing signal or invalidating output of the timing signal for the display unit.
    • 一种数据处理装置,包括显示单元和用于向显示单元供电的电源控制器。 显示单元具有显示屏和背光控制器。 电源控制器包括开关,至少一个输出线,用于从开关接收电力并通过其向电子设备提供电力;延迟电路,用于从开关接收电力;以及当开关接通以开始供电时 的功率,用于在从电源开始经过预定时间之后输出电力;以及第二输出线,用于将来自延迟电路的电力提供给背光控制器。 显示单元具有存储装置,用于当电源关闭时通过背光控制器在其上存储亮度数据,并且通过背光控制器基于亮度来确定显示单元的输出状态 当电源接通时,从存储器读出的数据意味着。 此外,数据处理装置具有使输出到显示屏幕上的显示数据的输出无效的装置和在显示数据无效之后的装置,用于减少定时信号的频率或使定时信号的输出无效, 显示单元。