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1. 发明申请

US20120246422A1 SEMICONDUCTOR MEMORY DEVICE WHICH INCLUDES MEMORY CELL HAVING CHARGE ACCUMULATION LAYER AND CONTROL GATE 审中-公开
公开(公告)号：US20120246422A1
公开(公告)日：2012-09-27
申请号：US13492119
申请日：2012-06-08
申请人： Takahiro SUZUKI , Shinya FUJISAWA , Tokumasa HARA , Masuji NISHIYAMA
发明人： Takahiro SUZUKI , Shinya FUJISAWA , Tokumasa HARA , Masuji NISHIYAMA
IPC分类号： G06F12/00
CPC分类号： G11C16/06
摘要： A semiconductor memory device includes a memory cell array, a power source circuit, a sense amplifier, a control circuit, and a processor. The memory cell array includes a nonvolatile memory cell. The power source circuit includes a first register and generates a voltage. The sense amplifier includes a second register, reads from the memory cell and amplifies the read data. The control circuit includes a third register and controls operations of the power source circuit and the sense amplifier. The processor controls the operations of the power source circuit, the sense amplifier and the control circuit by giving an instruction to the first to third registers. The control circuit decodes the instruction received at the third register so as to control the power source circuit and the sense amplifier directly based on a result of decoding.

2. 发明申请

US20080177928A1 SEMICONDUCTOR MEMORY DEVICE WHICH INCLUDES MEMORY CELL HAVING CHARGE ACCUMULATION LAYER AND CONTROL GATE 有权
标题翻译：半导体存储器件，其中包括具有充电累积层和控制栅的存储单元
公开(公告)号：US20080177928A1
公开(公告)日：2008-07-24
申请号：US12018493
申请日：2008-01-23
申请人： Takahiro SUZUKI , Shinya FUJISAWA , Tokumasa HARA , Masuji NISHIYAMA
发明人： Takahiro SUZUKI , Shinya FUJISAWA , Tokumasa HARA , Masuji NISHIYAMA
IPC分类号： G06F12/00
CPC分类号： G11C16/06
摘要： A semiconductor memory device includes a memory cell array, a power source circuit, a sense amplifier, a control circuit, and a processor. The memory cell array includes a nonvolatile memory cell. The power source circuit includes a first register and generates a voltage. The sense amplifier includes a second register, reads from the memory cell and amplifies the read data. The control circuit includes a third register and controls operations of the power source circuit and the sense amplifier. The processor controls the operations of the power source circuit, the sense amplifier and the control circuit by giving an instruction to the first to third registers. The control circuit decodes the instruction received at the third register so as to control the power source circuit and the sense amplifier directly based on a result of decoding.
摘要翻译：半导体存储器件包括存储单元阵列，电源电路，读出放大器，控制电路和处理器。存储单元阵列包括非易失性存储单元。电源电路包括第一寄存器并产生电压。读出放大器包括第二寄存器，从存储器单元读取并放大读取的数据。控制电路包括第三寄存器并控制电源电路和读出放大器的操作。处理器通过给第一至第三寄存器指令来控制电源电路，读出放大器和控制电路的操作。控制电路解码在第三寄存器处接收的指令，以便基于解码结果来直接控制电源电路和读出放大器。

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