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1. 发明申请

US20090033782A1 SOLID-STATE IMAGING DEVICE AND DRIVING METHOD THEREOF 有权
标题翻译：固态成像装置及其驱动方法
公开(公告)号：US20090033782A1
公开(公告)日：2009-02-05
申请号：US12176551
申请日：2008-07-21
申请人： Takahiro Muroshima , Yasuyuki Endoh , Masashi Murakami
发明人： Takahiro Muroshima , Yasuyuki Endoh , Masashi Murakami
IPC分类号： H04N5/335
CPC分类号： H04N5/3742 , H04N5/3575 , H04N5/3658 , H04N5/378
摘要： It is an object of the present invention to provide a solid-state imaging device capable of prevent image defects from appearing in an outputted image while suppressing increase in a layout area with a simple circuit structure and is an MOS solid-state imaging device. The MOS solid-state imaging device includes pixels which outputs signals corresponding to intensity of incident light, vertical signal lines which are respectively provided to columns of the pixels and each of which transmits the signals from said pixels in a column direction, and column amplifier circuits that amplify the signals from the pixels and are respectively connected to the vertical signal lines, and each of the column amplifier circuits includes a voltage clipping circuit includes a voltage clipping circuit which limits a maximum output voltage of said column amplifier circuit.
摘要翻译：本发明的目的是提供一种固态成像装置，其能够通过简单的电路结构抑制布局区域的增加，并且是MOS固态成像装置，从而防止在输出图像中出现图像缺陷。 MOS固态成像装置包括输出对应于入射光强度的信号的像素，分别提供给像素列的垂直信号线，并且每个像素在列方向上从所述像素传输信号，列列放大器电路放大来自像素的信号并且分别连接到垂直信号线，并且每个列放大器电路包括电压限幅电路，其包括限制所述列放大器电路的最大输出电压的电压限幅电路。

2. 发明授权

US08045032B2 Solid-state imaging device having a voltage clipping circuit to prevent image defects and driving method thereof 有权
标题翻译：具有用于防止图像缺陷的电压削波电路的固态成像装置及其驱动方法
公开(公告)号：US08045032B2
公开(公告)日：2011-10-25
申请号：US12176551
申请日：2008-07-21
申请人： Takahiro Muroshima , Yasuyuki Endoh , Masashi Murakami
发明人： Takahiro Muroshima , Yasuyuki Endoh , Masashi Murakami
IPC分类号： H04N3/14 , H04N5/335 , H01L27/00
CPC分类号： H04N5/3742 , H04N5/3575 , H04N5/3658 , H04N5/378
摘要： It is an object of the present invention to provide a solid-state imaging device capable of prevent image defects from appearing in an outputted image while suppressing increase in a layout area with a simple circuit structure and is an MOS solid-state imaging device. The MOS solid-state imaging device includes pixels which outputs signals corresponding to intensity of incident light, vertical signal lines which are respectively provided to columns of the pixels and each of which transmits the signals from said pixels in a column direction, and column amplifier circuits that amplify the signals from the pixels and are respectively connected to the vertical signal lines, and each of the column amplifier circuits includes a voltage clipping circuit includes a voltage clipping circuit which limits a maximum output voltage of said column amplifier circuit.
摘要翻译：本发明的目的是提供一种固态成像装置，其能够通过简单的电路结构抑制布局区域的增加，并且是MOS固态成像装置，从而防止在输出图像中出现图像缺陷。 MOS固态成像装置包括输出对应于入射光强度的信号的像素，分别提供给像素列的垂直信号线，并且每个像素在列方向上从所述像素传输信号，列列放大器电路放大来自像素的信号并且分别连接到垂直信号线，并且每个列放大器电路包括电压限幅电路，其包括限制所述列放大器电路的最大输出电压的电压限幅电路。

3. 发明申请

US20100039543A1 SOLID-STATE IMAGE SENSOR AND DRIVING METHOD THEREOF, AND IMAGE SENSOR 有权
标题翻译：固态图像传感器及其驱动方法和图像传感器
公开(公告)号：US20100039543A1
公开(公告)日：2010-02-18
申请号：US12524981
申请日：2007-06-28
申请人： Takahiro Muroshima , Yasuyuki Endoh
发明人： Takahiro Muroshima , Yasuyuki Endoh
IPC分类号： H04N5/335
CPC分类号： H04N5/3651 , H04N5/3598 , H04N5/3741 , H04N5/37452
摘要： A solid-state image sensor includes: a plurality of pixels, each having a photodiode, a floating diffusion, a transfer transistor, a reset transistor, and an amplifying transistor; vertical signal lines 31 for receiving signals from the plurality of pixels; sampling capacitors 62; circuits 78 for comparing a voltage on a corresponding one of the vertical signal lines 31 with a reference voltage to determine whether the voltage on the corresponding vertical signal line 31 is higher or lower than the reference voltage; and clip circuits 79 for outputting a clip voltage Vclip to a corresponding one of the sampling capacitors 62 based on the output of a corresponding one of the circuits 78. A voltage on each vertical signal line in the state where the signal accumulated in a corresponding photodiode has been transferred to a corresponding floating diffusion, can be used as a comparison voltage of each column.
摘要翻译：固态图像传感器包括：多个像素，每个具有光电二极管，浮动扩散，传输晶体管，复位晶体管和放大晶体管; 用于从多个像素接收信号的垂直信号线31; 采样电容器62; 电路78，用于将垂直信号线31中相应的一个电压与基准电压进行比较，以确定对应的垂直信号线31上的电压是否高于或低于参考电压; 以及夹持电路79，用于根据电路78的对应的一个的输出，将片钳电压Vclip输出到对应的一个采样电容器62.在累积在对应的光电二极管中的信号的状态下的每个垂直信号线上的电压已经转移到相应的浮动扩散，可以用作每列的比较电压。

4. 发明授权

US08068155B2 Solid-state image sensor and driving method thereof, and image sensor 有权
标题翻译：固态图像传感器及其驱动方法和图像传感器
公开(公告)号：US08068155B2
公开(公告)日：2011-11-29
申请号：US12524981
申请日：2007-06-28
申请人： Takahiro Muroshima , Yasuyuki Endoh
发明人： Takahiro Muroshima , Yasuyuki Endoh
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/3651 , H04N5/3598 , H04N5/3741 , H04N5/37452
摘要： A solid-state image sensor includes: a plurality of pixels, each having a photodiode, a floating diffusion, a transfer transistor, a reset transistor, and an amplifying transistor; vertical signal lines 31 for receiving signals from the plurality of pixels; sampling capacitors 62; circuits 78 for comparing a voltage on a corresponding one of the vertical signal lines 31 with a reference voltage to determine whether the voltage on the corresponding vertical signal line 31 is higher or lower than the reference voltage; and clip circuits 79 for outputting a clip voltage Vclip to a corresponding one of the sampling capacitors 62 based on the output of a corresponding one of the circuits 78. A voltage on each vertical signal line in the state where the signal accumulated in a corresponding photodiode has been transferred to a corresponding floating diffusion, can be used as a comparison voltage of each column.
摘要翻译：固态图像传感器包括：多个像素，每个具有光电二极管，浮动扩散，传输晶体管，复位晶体管和放大晶体管; 用于从多个像素接收信号的垂直信号线31; 采样电容器62; 用于将垂直信号线31中的一个垂直信号线31上的电压与参考电压进行比较的电路78，以确定对应的垂直信号线31上的电压是否高于或低于参考电压; 以及夹持电路79，用于根据电路78的对应的一个的输出，将片钳电压Vclip输出到对应的一个采样电容器62.在累积在对应的光电二极管中的信号的状态下的每个垂直信号线上的电压已经转移到相应的浮动扩散，可以用作每列的比较电压。

5. 发明申请

US20130022415A1 CUTTING TOOL 审中-公开
标题翻译：切割用具
公开(公告)号：US20130022415A1
公开(公告)日：2013-01-24
申请号：US12998888
申请日：2010-03-04
申请人： Jiro Osawa , Yasuyuki Endoh , Tamotsu Nagai
发明人： Jiro Osawa , Yasuyuki Endoh , Tamotsu Nagai
IPC分类号： B23B27/00 , B23B51/00 , B23G5/06 , B23C5/22
CPC分类号： B23C5/10 , B23B31/1107 , B23B31/1122 , B23C2210/02 , B23C2210/03 , Y10T407/1932
摘要： To provide a cutting tool in which the amount of waste of a main body unit and a cutting head can be suppressed and oscillation at the time of a cutting process can be suppressed. In a cutting tool 100, a helisert 20 made of steel that is lower in rigidity than cemented carbide is provided between an external screw unit 32 and an internal screw unit 11. Accordingly, the external screw unit 32 and the internal screw unit 11 are prevented from being brought into contact with each other, so that a thread 33 of the external screw unit 32 and a thread 12 of the internal screw unit 11 can be prevented from being damaged. Further, oscillation of a cutting head 30 against the main body unit 10 can be absorbed by providing the helisert 20 between the external screw unit 32 and the internal screw unit 11 because steel is lower in rigidity than cemented carbide.
摘要翻译：提供一种可以抑制主体单元和切割头的浪费量并且可以抑制切割时的振动的切削工具。在切削工具100中，在外螺纹单元32和内螺纹单元11之间设置有刚性低于硬质合金的由钢制成的螺旋20。因此，防止外螺纹单元32和内螺纹单元11 从而可以防止外螺纹单元32的螺纹33和内螺纹单元11的螺纹12的损坏。此外，由于钢的刚性低于硬质合金，所以可以通过在外螺纹单元32和内螺纹单元11之间设置螺线管20来吸收切割头30抵靠主体单元10的振动。

6. 发明授权

US07398450B2 Parallel precoder circuit 有权
标题翻译：并行预编码电路
公开(公告)号：US07398450B2
公开(公告)日：2008-07-08
申请号：US11304913
申请日：2005-12-16
申请人： Yoshiaki Konishi , Kazuo Kubo , Yasuyuki Endoh
发明人： Yoshiaki Konishi , Kazuo Kubo , Yasuyuki Endoh
IPC分类号： G11C29/00
CPC分类号： H04L25/497 , H04L27/2096
摘要： A parallel precoder circuit executes an EXOR operation on an n-row parallel input, and outputs an n-row parallel output, where 2≦n. Outputs of EXOR circuits each of which having a largest column number from among EXOR circuits disposed in first to (n−1)th rows become first-row to (n−1)th-row parallel outputs, respectively. A output of an nth-row delay circuit becomes an nth-row parallel output.
摘要翻译：并行预编码器电路对n行并行输入执行EXOR运算，并输出n行并行输出，其中2 <= n。分别从第一到第（n-1）行中排列的EXOR电路中具有最大列数的EXOR电路的输出分别成为第一行到第（n-1）行并行输出。第n行延迟电路的输出变为第n行并行输出。

7. 发明授权

US08792037B2 Solid-state imaging device and method of driving the same where three levels of potentials including a negative potential are applied in the transfer gate 有权
标题翻译：固态成像装置及其驱动方法，其中在传输门中施加包括负电位的三个电位电平
公开(公告)号：US08792037B2
公开(公告)日：2014-07-29
申请号：US13590670
申请日：2012-08-21
申请人： Hikaru Hasegawa , Yasuyuki Endoh , Nobukazu Teranishi
发明人： Hikaru Hasegawa , Yasuyuki Endoh , Nobukazu Teranishi
IPC分类号： H04N5/335 , H04N3/14
CPC分类号： H04N5/357 , H04N5/3742
摘要： A row scanning unit is configured to change a potential of a transfer signal from a second potential V2 to a third potential V3 prior to driving of a transfer operation for causing a transfer of signal charges from a photodiode to a floating diffusion, by supplying a transfer pulse having a first potential V1. The first potential V1 is a positive potential for turning a transfer transistor into ON state, the second potential V2 is a potential for causing pinning of holes under a gate of the transfer transistor and turning the transfer transistor into OFF state, and the third potential V3 is a potential for not causing the pinning of the holes under the gate of the transfer transistor and turning the transfer transistor into OFF state, the third potential being lower than the first potential and higher than the second potential.
摘要翻译：行扫描单元被配置为在驱动用于使来自光电二极管的信号电荷到浮动扩散的传输操作的驱动之前将传输信号的电位从第二电位V2改变为第三电位V3，通过提供转移具有第一电位V1的脉冲。第一电位V1是将转移晶体管转换为导通状态的正电位，第二电位V2是用于使转移晶体管的栅极下方的空穴锁定的电位，并将转移晶体管转换为截止状态，第三电位V3 是不会导致在转移晶体管的栅极下方的钉锁钉并将转移晶体管转为断开状态的可能性，第三电位低于第一电位并高于第二电位。

8. 发明申请

US20120200753A1 SOLID-STATE IMAGE PICKUP DEVICE 审中-公开
标题翻译：固态图像拾取器件
公开(公告)号：US20120200753A1
公开(公告)日：2012-08-09
申请号：US13500591
申请日：2010-02-19
申请人： Yasuyuki Endoh , Takashi Fujioka
发明人： Yasuyuki Endoh , Takashi Fujioka
IPC分类号： H04N5/335
CPC分类号： H04N5/3658 , H04N5/3742
摘要： During the vertical blanking period, first the vertical common signal line switch transistor 213 is turned OFF, then the clamp transistor 218 is turned ON, thereby fixing the sample/hold capacitor 223 to the clamp potential. Also, the column amplifier reset transistor 217 is turned ON, and the column amplifier 216 is reset. Next, the column amplifier reset transistor 217 and the clamp transistor 218 are turned OFF, and the unit column circuit 105 is kept to the clamp state. In this state, the sample/hold transistor 221 is turned OFF, and the sample/hold capacitance 223 is read. The read data is used as the data for correcting the vertical fixed pattern noise.
摘要翻译：在垂直消隐期间，首先将垂直公共信号线开关晶体管213截止，然后钳位晶体管218导通，从而将取样/保持电容器223固定到钳位电位。此外，列放大器复位晶体管217导通，并且列放大器216被复位。接下来，列放大复位晶体管217和钳位晶体管218截止，单位列电路105保持为钳位状态。在该状态下，采样/保持晶体管221截止，读取/取样/保持电容223。读取数据用作校正垂直固定图案噪声的数据。

9. 发明授权

US07969485B2 Solid-state imaging device and camera 有权
标题翻译：固态成像装置和相机
公开(公告)号：US07969485B2
公开(公告)日：2011-06-28
申请号：US12026090
申请日：2008-02-05
申请人： Hiroshi Toya , Yasuyuki Endoh
发明人： Hiroshi Toya , Yasuyuki Endoh
IPC分类号： H04N5/235 , H04N3/14
CPC分类号： H04N5/353 , H04N5/341 , H04N5/3658 , H04N5/3745
摘要： A solid-state imaging device comprises a pixel array including a plurality of pixels arranged in rows and columns, and a readout unit operable to read out pixel signals of the pixels included in the pixel array row by row. The readout unit (i) reads out pixel signals of a row of pixels in column order of the pixel array during a horizontal readout period, except during a readout-standby period that is within the horizontal readout period, and (ii) suspends reading out the pixel signals of the row of pixels in the column order during the readout-standby period.
摘要翻译：固态成像装置包括：像素阵列，包括以行和列排列的多个像素;读出单元，用于逐行读出像素阵列中包括的像素的像素信号。读出单元（i）除了在水平读出期间的读出待机期间外，在水平读出期间以像素排列的顺序读出像素行的像素信号，（ii）暂停读出在读出 - 待机期间列列中的像素行的像素信号。

10. 发明授权

US08406360B2 Signal generating method for clock recovery and clock recovery circuit 有权
标题翻译：用于时钟恢复和时钟恢复电路的信号产生方法
公开(公告)号：US08406360B2
公开(公告)日：2013-03-26
申请号：US12992443
申请日：2009-04-22
申请人： Yasuyuki Endoh , Kazuhito Takei , Katuyoshi Miura , Tadanobu Nikaido , Yoshiaki Kisaka
发明人： Yasuyuki Endoh , Kazuhito Takei , Katuyoshi Miura , Tadanobu Nikaido , Yoshiaki Kisaka
IPC分类号： H04L7/00 , H03D3/24 , H04J3/06
CPC分类号： H04J3/0691 , H03L7/00 , H04J3/07
摘要： According to the present invention, as shown in FIG. 5(a), when a signal for clock recovery ED is generated, which is formed by alternately generating enable periods EN having a ratio (N/M) of N clocks' client data to M clocks' line data and disable periods D1 to D4, a phase of the disable period D2 is advanced by a phase corresponding to the disable period (such as one clock period) during the enable period with reference to phase information added to the signal for clock recovery ED as shown in FIG. 5(c) when a stuff pulse in the line data is detected as indicated by the symbol m0 in FIG. 5(b), thereby generating the signal for clock recovery ED.
摘要翻译：根据本发明，如图1所示，如图5（a）所示，当产生用于时钟恢复ED的信号时，其通过交替产生具有N个时钟的客户端数据与M个时钟线数据的比率（N / M）的使能周期EN和禁用周期D1至D4 参考图5所示的时钟恢复ED信号的相位信息，禁用期间D2的相位在使能期间内与禁止期间（例如一个时钟周期）相对应的相位推进。如图5（c）所示，当检测到行数据中的填充脉冲时，如图5中的符号m0所示。从而产生用于时钟恢复ED的信号。

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