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    • 1. 发明授权
    • Nonvolatile semiconductor memory with virtual ground array
    • 具有虚拟接地阵列的非易失性半导体存储器
    • US07408820B2
    • 2008-08-05
    • US11641951
    • 2006-12-20
    • Takafumi MaruyamaKazuyuki KounoAkifumi KawaharaYasuhiro Tomita
    • Takafumi MaruyamaKazuyuki KounoAkifumi KawaharaYasuhiro Tomita
    • G11C11/34
    • G11C16/0491G11C16/28
    • A nonvolatile semiconductor memory of virtual ground array in which a common connection of the sources and a common connection of the drains of nonvolatile memory cells arranged in rows and columns in a memory cell array are used as bit lines, the nonvolatile memory cells including: a reference cell from which a characteristic used as a reference in a differential readout determination operation is obtained; and a neighbor cell at one side of the reference cell, the neighbor cell sharing one of the source and the drain of the reference cell and being connected to a word line which is connected to the reference cell, wherein the nonvolatile semiconductor memory includes a neighbor cell programming circuit to set the neighbor cell to a programmed state when the word line is activated to set the reference cell to a conduction state, the neighbor cell being kept in a non-conduction state during the programmed state.
    • 虚拟接地阵列的非易失性半导体存储器用作位线,其中源和存储单元阵列中以列和列排列的非易失性存储单元的漏极的公共连接的公共连接用作位线,非易失性存储单元包括: 获得在差分读出确定操作中用作参考的特性的参考单元; 以及在所述参考小区的一侧的相邻小区,所述相邻小区分享所述参考小区的源和漏极之一并且连接到连接到所述参考小区的字线,其中所述非易失性半导体存储器包括邻居 当字线被激活以将参考单元设置为导通状态时,相邻单元在编程状态期间保持在非导通状态,将相邻单元设置为编程状态。
    • 2. 发明申请
    • Nonvolatile semiconductor memory
    • 非易失性半导体存储器
    • US20070183240A1
    • 2007-08-09
    • US11641951
    • 2006-12-20
    • Takafumi MaruyamaKazuyuki KounoAkifumi KawaharaYasuhiro Tomita
    • Takafumi MaruyamaKazuyuki KounoAkifumi KawaharaYasuhiro Tomita
    • G11C7/02
    • G11C16/0491G11C16/28
    • A nonvolatile semiconductor memory of virtual ground array in which a common connection of the sources and a common connection of the drains of nonvolatile memory cells arranged in rows and columns in a memory cell array are used as bit lines, the nonvolatile memory cells including: a reference cell from which a characteristic used as a reference in a differential readout determination operation is obtained; and a neighbor cell at one side of the reference cell, the neighbor cell sharing one of the source and the drain of the reference cell and being connected to a word line which is connected to the reference cell, wherein the nonvolatile semiconductor memory includes a neighbor cell programming circuit to set the neighbor cell to a programmed state when the word line is activated to set the reference cell to a conduction state, the neighbor cell being kept in a non-conduction state during the programmed state.
    • 虚拟接地阵列的非易失性半导体存储器用作位线,其中源和存储单元阵列中以列和列排列的非易失性存储单元的漏极的公共连接的公共连接用作位线,非易失性存储单元包括: 获得在差分读出确定操作中用作参考的特性的参考单元; 以及在所述参考小区的一侧的相邻小区,所述相邻小区分享所述参考小区的源和漏极之一并且连接到连接到所述参考小区的字线,其中所述非易失性半导体存储器包括邻居 当字线被激活以将参考单元设置为导通状态时,相邻单元在编程状态期间保持在非导通状态,将相邻单元设置为编程状态。
    • 5. 发明授权
    • Communications system for transmitting, receiving, and displaying an image and associated image action information
    • 用于发送,接收和显示图像和相关图像动作信息的通信系统
    • US07234116B2
    • 2007-06-19
    • US10066564
    • 2002-02-06
    • Kimihito WatanabeTakafumi Maruyama
    • Kimihito WatanabeTakafumi Maruyama
    • G06F3/00
    • G06Q10/107H04L51/066H04L51/18H04L51/30H04L67/38
    • A novel communications system is provided, including a plurality of user terminals capable of communication using a predetermined communication software program and accessible to Internet, and an administrator server on line with Internet, wherein each of the user terminals is capable of transmitting a character message comprising character information for designating a character, action information for designating an action of the character and a text message to another user terminal through Internet via the administrator server with use of the communication software program, while the latter user terminal having received the character message is capable of displaying an image of the character performing the action and the text message on a screen by selecting a motion picture file based on the character information and the action information received using the communication software program and executing the motion picture file.
    • 提供了一种新颖的通信系统,其包括能够使用预定的通信软件程序进行通信并可互联网访问的多个用户终端和与因特网在线的管理员服务器,其中每个用户终端能够发送字符消息,包括 用于通过使用通信软件程序经由管理员服务器通过因特网指定字符的字符信息,用于指定字符的动作的动作信息和文本消息到另一个用户终端,而后一个用户终端已经接收到该字符消息的能力 通过基于使用通信软件程序接收的字符信息和动作信息选择运动图像文件,并且执行运动图像文件,在屏幕上显示执行动作和文本消息的角色的图像。
    • 7. 发明申请
    • Electric motor car controller
    • 电动马达控制器
    • US20050264255A1
    • 2005-12-01
    • US11050754
    • 2005-02-07
    • Takafumi MaruyamaSatoshi Azuma
    • Takafumi MaruyamaSatoshi Azuma
    • B60L9/18H02P21/00H02P27/04H02P27/06H02P5/34
    • H02P21/09
    • An electric motor car controller includes a voltage detector for detecting the voltage across a filter capacitor, an energy amount calculator for calculating the amount of energy of the filter capacitor from the output of the voltage detector, a frequency band component detector for extracting a given frequency band component included in the amount of energy, a frequency band component coefficient unit for multiplying the frequency band component by a coefficient and outputting a q-axis current command correcting value, and a q-axis current command correcting value adder for adding a q-axis current command correcting value to the q-axis current command value to correct the q-axis current command value.
    • 一种电动车辆控制器,包括用于检测滤波电容器两端的电压的电压检测器,用于根据电压检测器的输出计算滤波电容器的能量的能量计算器,用于提取给定频率的频带分量检测器 包括在能量中的频带分量,用于将频带分量乘以系数并输出q轴电流指令校正值的频带分量系数单元,以及q轴电流指令校正值加法器,用于将q- 轴电流指令校正值,以校正q轴电流指令值。
    • 8. 发明申请
    • Non-volatile semiconductor memory device
    • 非易失性半导体存储器件
    • US20050180212A1
    • 2005-08-18
    • US11058374
    • 2005-02-16
    • Makoto KojimaTakafumi Maruyama
    • Makoto KojimaTakafumi Maruyama
    • G11C16/06G11C16/02G11C16/04G11C11/34
    • G11C16/04
    • A plurality of memory cells are connected between two adjacent sub-bit lines. A row decoder 3 selects a word line connected to a memory cell to be read. A selection line selection circuit 2 and a column selection circuit 5 include first and second selection portions that perform selection operations simultaneously and independently. The first selection portion selects a first pair of main bit lines and selection lines in order to select the memory cell to be read. The second selection portion selects a second pair of main bit lines that is different from the first pair of main bit lines and selection lines for selecting a sector different from that for the memory cell to be read in order to select a line to be used for reading a reference voltage.
    • 多个存储单元连接在两个相邻的子位线之间。 行解码器3选择连接到要读取的存储单元的字线。 选择线选择电路2和列选择电路5包括同时且独立地执行选择操作的第一和第二选择部分。 第一选择部分选择第一对主位线和选择线,以选择要读取的存储单元。 第二选择部分选择不同于第一对主位线和选择线的第二对主位线,用于选择与要读取的存储单元的扇区不同的扇区,以便选择要用于 读取参考电压。
    • 9. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US08593888B2
    • 2013-11-26
    • US13591766
    • 2012-08-22
    • Reiji MochidaTakafumi MaruyamaYukimasa Hamamoto
    • Reiji MochidaTakafumi MaruyamaYukimasa Hamamoto
    • G11C5/14
    • G11C16/30G11C16/10G11C16/26
    • In a semiconductor memory device, the output of a regulator is coupled to the inputs of first and second switches, the output of the first switch is coupled to a path for supplying the drain voltage of a memory cell in the first mode, and the output of the second switch is coupled to a path for supplying the gate voltage of the memory cell in the second mode. A fourth switch is placed in parallel with the second switch: the output of the fourth switch is coupled to the output of the second switch, to supply the gate voltage of the memory cell in the first mode. Thus, one regulator is used as both the regulator for the drain voltage of the memory cell and the regulator for the gate voltage of the memory cell.
    • 在半导体存储器件中,调节器的输出耦合到第一和第二开关的输入,第一开关的输出耦合到用于在第一模式中提供存储单元的漏极电压的路径,并且输出 的第二开关耦合到用于在第二模式中提供存储器单元的栅极电压的路径。 第四开关与第二开关并联放置:第四开关的输出耦合到第二开关的输出,以在第一模式中提供存储单元的栅极电压。 因此,一个调节器用作存储器单元的漏极电压的调节器和用于存储器单元的栅极电压的调节器。