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    • 5. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND A MANUFACTURING METHOD THEREOF
    • 非易失性半导体存储器件及其制造方法
    • US20110057245A1
    • 2011-03-10
    • US12876376
    • 2010-09-07
    • Takaaki NAGAI
    • Takaaki NAGAI
    • H01L29/788H01L21/28
    • H01L21/28282H01L29/42344H01L29/6656H01L29/66659H01L29/66833H01L29/7835H01L29/792H01L29/7923
    • A nonvolatile semiconductor memory device according to an exemplary embodiment of the present invention including, a first gate electrode formed above a semiconductor substrate via a first insulating film, having a projecting part which projects in upper direction with a certain width; a second gate electrode formed beside a side surface of the first gate electrode via a second insulating film; two side walls having insulation properties formed on a side surface of the second gate electrode and a side surface of the projecting part respectively; and a silicide layer formed on an upper surface of the projecting part and a part of a surface of the second gate electrode, wherein a width of the projecting part is smaller than a width of the first gate electrode below the projecting part.
    • 根据本发明示例性实施例的非易失性半导体存储器件包括:第一栅电极,其经由第一绝缘膜形成在半导体衬底上方,具有突出部分,其以上方向突出一定宽度; 第二栅电极,经由第二绝缘膜形成在所述第一栅电极的侧面旁边; 分别形成在第二栅电极的侧面和突出部的侧面的具有绝缘性的两个侧壁; 以及形成在所述突出部的上表面上的硅化物层和所述第二栅电极的表面的一部分,其中所述突出部的宽度小于所述突出部的下方的所述第一栅电极的宽度。
    • 7. 发明申请
    • MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
    • 半导体器件和半导体器件的制造方法
    • US20110073992A1
    • 2011-03-31
    • US12893312
    • 2010-09-29
    • Masahiro WADATakaaki NAGAI
    • Masahiro WADATakaaki NAGAI
    • H01L27/108H01L21/76
    • H01L28/91H01L21/76264H01L21/76831H01L23/5223H01L27/10894H01L2924/0002H01L2924/00
    • A first interlayer dielectric is formed over a substrate, and an electric conductor pillar is formed in the first interlayer dielectric. A damascene wiring part insulating film is formed over an upper surface of the first interlayer dielectric. The damascene wiring part insulating film above the electric conductor pillar is removed to form an opening part for capacitance, and an insulating film for capacitive element is formed over the upper surface of the first interlayer dielectric. The insulating film for capacitive element and the first interlayer dielectric above the electric conductor pillar are removed to form a trench for wiring. Metal bodies are embedded in the opening part for capacitance and the trench for wiring. The metal body in the opening part for capacitance is to be an upper electrode of the capacitive element, and the metal body in the trench for wiring is to be a logic wiring.
    • 在衬底上形成第一层间电介质,并且在第一层间电介质中形成电导体柱。 在第一层间电介质的上表面上形成镶嵌布线部绝缘膜。 除去电导体柱上方的镶嵌布线部绝缘膜,形成电容用开口部,在第一层间电介质的上表面上形成电容元件用绝缘膜。 去除用于电容元件的绝缘膜和电导体柱上方的第一层间电介质以形成用于布线的沟槽。 金属体嵌入开口部分,用于电容和布线沟槽。 用于电容的开口部的金属体为电容元件的上部电极,配线用沟槽中的金属体为逻辑布线。
    • 8. 发明申请
    • NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
    • 非易失性半导体存储器件
    • US20100308392A1
    • 2010-12-09
    • US12791199
    • 2010-06-01
    • Takaaki NAGAI
    • Takaaki NAGAI
    • H01L29/788H01L21/336
    • H01L29/66825H01L27/11519H01L27/11521H01L29/40114H01L29/42324H01L29/7881
    • A control gate of a nonvolatile semiconductor storage device includes a first side surface on a side near a floating gate, a second side surface opposite to the first side surface, a silicide region formed in an upper portion of the control gate above the first side surface, and a protruding portion formed in an upper portion of the control gate above the second side surface. A side wall insulating film of the nonvolatile semiconductor storage device includes a first portion which covers at least a portion of the protruding portion without covering the silicide region, and a second portion which is provided continuously from the first portion and covers the second side surface with contacting the second side surface.
    • 非易失性半导体存储装置的控制栅极包括在浮置栅极附近的一侧的第一侧表面,与第一侧表面相对的第二侧表面,在第一侧表面上方形成在控制栅极的上部中的硅化物区域 以及形成在第二侧表面上方的控制栅极的上部的突出部分。 非易失性半导体存储装置的侧壁绝缘膜包括覆盖突出部分的至少一部分而不覆盖硅化物区域的第一部分,以及从第一部分连续地设置并覆盖第二侧表面的第二部分, 接触第二侧表面。