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    • 1. 发明申请
    • RAIL-TO-RAIL AMPLIFIER
    • 轨至轨放大器
    • US20110291759A1
    • 2011-12-01
    • US12833154
    • 2010-07-09
    • Taek-Sang SongDae-Han KwonJun-Woo Lee
    • Taek-Sang SongDae-Han KwonJun-Woo Lee
    • H03F3/45
    • H03F3/45192
    • A rail-to-rail amplifier includes an NMOS type amplification unit configured to perform an amplification operation on differential input signals in a domain in which DC levels of the differential input signals are higher than a first threshold value, a PMOS type folded-cascode amplification unit configured to perform an amplification operation on the differential input signals in a domain in which the DC levels of the differential input signals are lower than a second threshold value which is higher than the first threshold value, the PMOS type folded-cascode amplification unit being cascade-coupled to the NMOS type amplification unit, and an adaptive biasing unit configured to interrupt a current path of the PMOS type folded-cascode amplification unit in a domain in which the DC levels of the differential input signals are higher than the second threshold value in response to the differential input signals.
    • 轨到轨放大器包括:NMOS型放大单元,被配置为对差分输入信号的DC电平高于第一阈值的区域中的差分输入信号进行放大操作,PMOS型折叠共源共栅放大 被配置为对差分输入信号的DC电平低于高于第一阈值的第二阈值的区域中的差分输入信号进行放大操作的单元,PMOS型折叠共源共栅放大单元是 级联耦合到NMOS型放大单元,以及自适应偏置单元,被配置为在差分输入信号的DC电平高于第二阈值的区域中断PMOS型折叠共源共栅放大单元的电流路径 响应于差分输入信号。
    • 2. 发明授权
    • Internal voltage generator
    • 内部电压发生器
    • US08314651B2
    • 2012-11-20
    • US12647875
    • 2009-12-28
    • Taek-Sang SongDae-Han KwonJun-Woo Lee
    • Taek-Sang SongDae-Han KwonJun-Woo Lee
    • G05F1/10
    • G05F1/56
    • An internal voltage generator includes: a detection unit configured to detect a level of an internal voltage in comparison to a reference voltage; a first driving unit configured to discharge an internal voltage terminal, through which the internal voltage is outputted, in response to an output signal of the detection unit; a current detection unit configured to detect a discharge current flowing through the first driving unit; and a second driving unit configured to charge the internal voltage terminal in response to an output signal of the current detection unit.
    • 内部电压发生器包括:检测单元,被配置为与参考电压相比检测内部电压的电平; 第一驱动单元,被配置为响应于所述检测单元的输出信号,对输出所述内部电压的内部电压端子进行放电; 电流检测单元,被配置为检测流过所述第一驱动单元的放电电流; 以及第二驱动单元,其被配置为响应于所述电流检测单元的输出信号对所述内部电压端子进行充电。
    • 5. 发明授权
    • Rail-to-rail amplifier
    • 轨至轨放大器
    • US08130034B2
    • 2012-03-06
    • US12833154
    • 2010-07-09
    • Taek-Sang SongDae-Han KwonJun-Woo Lee
    • Taek-Sang SongDae-Han KwonJun-Woo Lee
    • H03F3/45
    • H03F3/45192
    • A rail-to-rail amplifier includes an NMOS type amplification unit configured to perform an amplification operation on differential input signals in a domain in which DC levels of the differential input signals are higher than a first threshold value, a PMOS type folded-cascode amplification unit configured to perform an amplification operation on the differential input signals in a domain in which the DC levels of the differential input signals are lower than a second threshold value which is higher than the first threshold value, the PMOS type folded-cascode amplification unit being cascade-coupled to the NMOS type amplification unit, and an adaptive biasing unit configured to interrupt a current path of the PMOS type folded-cascode amplification unit in a domain in which the DC levels of the differential input signals are higher than the second threshold value in response to the differential input signals.
    • 轨到轨放大器包括:NMOS型放大单元,被配置为对差分输入信号的DC电平高于第一阈值的区域中的差分输入信号进行放大操作,PMOS型折叠共源共栅放大 被配置为对差分输入信号的DC电平低于高于第一阈值的第二阈值的区域中的差分输入信号进行放大操作的单元,PMOS型折叠共源共栅放大单元是 级联耦合到NMOS型放大单元,以及自适应偏置单元,被配置为在差分输入信号的DC电平高于第二阈值的区域中断PMOS型折叠共源共栅放大单元的电流路径 响应于差分输入信号。
    • 10. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07830282B2
    • 2010-11-09
    • US12344917
    • 2008-12-29
    • Jun-Woo LeeTaek-Sang Song
    • Jun-Woo LeeTaek-Sang Song
    • H03M9/00
    • H03M9/00
    • A semiconductor device includes a plurality of synchronization blocks configured to sequentially synchronize a plurality of input signals swinging in a complementary metal oxide semiconductor (CMOS) region with multi-phase clock signals to output a plurality of output signals swinging in a current mode logic (CML) region, a plurality of first swing region converting blocks configured to convert the plurality of output signals to a plurality of converted output signals swinging in the CMOS region, a serialization block configured to serialize a plurality of converted output signals, thereby outputting a serialized signal swinging in the CML region, and a second swing region converting block configured to convert the serialized signal to a serialized output signal swinging in the CMOS region.
    • 半导体器件包括多个同步块,其被配置为使在互补金属氧化物半导体(CMOS)区域中摆动的多个输入信号与多相时钟信号顺序同步,以输出以当前模式逻辑(CML)摆动的多个输出信号 )区域,多个第一摆动区域转换块,被配置为将多个输出信号转换为在CMOS区域中摆动的多个转换的输出信号;串行化块,被配置为串行化多个转换的输出信号,从而输出串行化信号 以及第二摆动区域转换块,被配置为将串行化信号转换为在CMOS区域中摆动的串行输出信号。