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1. 发明授权

US07105474B2 Organic stripping composition and method of etching oxide using the same 失效
标题翻译：有机剥离组合物和使用其的氧化物蚀刻方法
公开(公告)号：US07105474B2
公开(公告)日：2006-09-12
申请号：US10634880
申请日：2003-08-06
申请人： Tae-Hyun Kim , Byoung-Moon Yoon , Kyung-Hyun Kim , Chang-Lyong Song , Yong-Sun Ko
发明人： Tae-Hyun Kim , Byoung-Moon Yoon , Kyung-Hyun Kim , Chang-Lyong Song , Yong-Sun Ko
IPC分类号： C11D7/50
CPC分类号： C11D11/0047 , C11D3/3942 , C11D3/3947 , C11D7/06 , C11D7/08 , C11D7/265 , C11D7/28
摘要： Disclosed is an organic stripping composition and a method of etching a semiconductor device in which the generation of an Si pitting phenomenon can be prevented. The composition includes a compound including a hydroxyl ion (OH−), a compound including a fluorine ion (F−) and a sufficient amount of an oxidizing agent to control the pH of the composition within the range of from about 6.5 to about 8.0. The method includes dry etching an oxide by a dry etching using a plasma, and then ashing the etched oxide using an ashing process to remove an organic material. The method further includes supplying the organic stripping composition to remove residues including any residual organic material, a metal polymer, and an oxide type polymer. The stripping composition is stable onto various metals and does not induce the Si pitting phenomenon.
摘要翻译：公开了一种有机剥离组合物和蚀刻半导体器件的方法，其中可以防止产生Si点蚀现象。该组合物包括含有羟基离子（OH）的化合物，含有氟离子（F）的化合物和足够量的氧化剂以控制pH 的组合物在约6.5至约8.0的范围内。该方法包括通过使用等离子体的干蚀刻来干蚀刻氧化物，然后使用灰化工艺灰化蚀刻的氧化物以除去有机材料。该方法还包括提供有机剥离组合物以除去包括任何残余有机材料，金属聚合物和氧化物型聚合物的残余物。汽提组合物对各种金属是稳定的，不会引起Si点蚀现象。

2. 发明授权

US07445997B2 Methods of forming non-volatile memory devices having floating gate electrodes 失效
标题翻译：形成具有浮动栅电极的非易失性存储器件的方法
公开(公告)号：US07445997B2
公开(公告)日：2008-11-04
申请号：US11103069
申请日：2005-04-11
申请人： Won-Jun Lee , Tae-Hyun Kim , Yong-Sun Ko , Kyung-Hyun Kim , Byoung-Moon Yoon , Ji-Hong Kim
发明人： Won-Jun Lee , Tae-Hyun Kim , Yong-Sun Ko , Kyung-Hyun Kim , Byoung-Moon Yoon , Ji-Hong Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521
摘要： Methods of forming non-volatile memory devices include the steps of forming a semiconductor substrate having first and second floating gate electrodes thereon and an electrically insulating region extending between the first and second floating gate electrodes. A step is then performed to etch back the electrically insulating region to expose upper corners of the first and second floating gate electrodes. Another etching step is then performed. This etching step includes exposing upper surfaces and the exposed upper corners of the first and second floating gate electrodes to an etchant that rounds the exposed upper corners of the first and second floating gate electrodes. The step of etching back the electrically insulating region includes etching back the electrically insulating region to expose sidewalls of the first and second floating gate electrodes having heights ranging from about 30 Å to about 200 Å. The step of exposing the upper corners of the first and second floating gate electrodes to an etchant is followed by the step of etching back the electrically insulating region to expose entire sidewalls of the first and second floating gate electrodes.
摘要翻译：形成非易失性存储器件的方法包括以下步骤：在其上形成具有第一和第二浮栅的半导体衬底和在第一和第二浮栅之间延伸的电绝缘区。然后执行步骤以回蚀电绝缘区域以暴露第一和第二浮栅电极的上角。然后执行另一蚀刻步骤。该蚀刻步骤包括将第一和第二浮栅电极的上表面和暴露的上角露出到蚀刻剂，该蚀刻剂围绕第一和第二浮栅的暴露的上角。蚀刻回电绝缘区域的步骤包括蚀刻电绝缘区域以暴露第一和第二浮栅电极的侧壁，其高度范围为约至约200。将第一和第二浮栅的上角暴露于蚀刻剂的步骤之后是蚀刻电绝缘区以暴露第一和第二浮栅的整个侧壁的步骤。

3. 发明申请

US20050255654A1 Methods of forming non-volatile memory devices having floating gate electrodes 失效
标题翻译：形成具有浮动栅电极的非易失性存储器件的方法
公开(公告)号：US20050255654A1
公开(公告)日：2005-11-17
申请号：US11103069
申请日：2005-04-11
申请人： Won-Jun Lee , Tae-Hyun Kim , Yong-Sun Ko , Kyung-Hyun Kim , Byoung-Moon Yoon , Ji-Hong Kim
发明人： Won-Jun Lee , Tae-Hyun Kim , Yong-Sun Ko , Kyung-Hyun Kim , Byoung-Moon Yoon , Ji-Hong Kim
IPC分类号： H01L21/336 , H01L21/8247 , H01L27/115
CPC分类号： H01L27/115 , H01L27/11521
摘要： Methods of forming non-volatile memory devices include the steps of forming a semiconductor substrate having first and second floating gate electrodes thereon and an electrically insulating region extending between the first and second floating gate electrodes. A step is then performed to etch back the electrically insulating region to expose upper corners of the first and second floating gate electrodes. Another etching step is then performed. This etching step includes exposing upper surfaces and the exposed upper corners of the first and second floating gate electrodes to an etchant that rounds the exposed upper corners of the first and second floating gate electrodes. The step of etching back the electrically insulating region includes etching back the electrically insulating region to expose sidewalls of the first and second floating gate electrodes having heights ranging from about 30 Å to about 200 Å. The step of exposing the upper corners of the first and second floating gate electrodes to an etchant is followed by the step of etching back the electrically insulating region to expose entire sidewalls of the first and second floating gate electrodes.
摘要翻译：形成非易失性存储器件的方法包括以下步骤：在其上形成具有第一和第二浮栅的半导体衬底和在第一和第二浮栅之间延伸的电绝缘区。然后执行步骤以回蚀电绝缘区域以暴露第一和第二浮栅电极的上角。然后执行另一蚀刻步骤。该蚀刻步骤包括将第一和第二浮栅电极的上表面和暴露的上角露出到蚀刻剂，该蚀刻剂围绕第一和第二浮栅的暴露的上角。蚀刻回电绝缘区域的步骤包括蚀刻电绝缘区域以暴露第一和第二浮栅电极的侧壁，其高度范围为约至约200。将第一和第二浮栅的上角暴露于蚀刻剂的步骤之后是蚀刻电绝缘区以暴露第一和第二浮栅的整个侧壁的步骤。

4. 发明授权

US07781346B2 Methods of forming patterns and capacitors for semiconductor devices using the same 失效
标题翻译：使用其形成用于半导体器件的图案和电容器的方法
公开(公告)号：US07781346B2
公开(公告)日：2010-08-24
申请号：US11455815
申请日：2006-06-20
申请人： Cheol-Woo Park , Byoung-Moon Yoon , Yong-Sun Ko , Kyung-Hyun Kim , Kwang-Wook Lee
发明人： Cheol-Woo Park , Byoung-Moon Yoon , Yong-Sun Ko , Kyung-Hyun Kim , Kwang-Wook Lee
IPC分类号： H01L21/302
CPC分类号： H01L21/31111 , H01L21/0206 , H01L21/02068 , H01L27/10852 , H01L28/91
摘要： A semiconductor structure may be formed by a wet etching process using an etchant containing water. The semiconductor structure may include a plurality of patterns having an increased or higher aspect ratio and may be arranged closer to one another. A dry cleaning process may be performed using hydrogen fluoride gas on the semiconductor structure.
摘要翻译：可以通过使用含有蚀刻剂的湿法蚀刻工艺形成半导体结构。半导体结构可以包括具有增加的或更高的纵横比的多个图案，并且可以彼此更靠近地布置。可以在半导体结构上使用氟化氢气体进行干法处理。

5. 发明申请

US20050176604A1 Corrosion-inhibiting cleaning compositions for metal layers and patterns on semiconductor substrates 审中-公开
标题翻译：用于金属层和半导体衬底上的图案的防腐蚀清洁组合物
公开(公告)号：US20050176604A1
公开(公告)日：2005-08-11
申请号：US11021040
申请日：2004-12-23
申请人： Kwang-Wook Lee , In-Seak Hwang , Yong-Sun Ko , Byoung-Moon Yoon , Kyung-Hyun Kim , Ky-Sub Kim , Sun-Young Song , Hyuk-Jin Lee , Byung-Mook Kim
发明人： Kwang-Wook Lee , In-Seak Hwang , Yong-Sun Ko , Byoung-Moon Yoon , Kyung-Hyun Kim , Ky-Sub Kim , Sun-Young Song , Hyuk-Jin Lee , Byung-Mook Kim
IPC分类号： C11D1/722 , C09K13/04 , C09K13/08 , C11D1/00 , C11D3/02 , C11D3/04 , C11D3/20 , C11D3/30 , C11D3/36 , C11D3/39 , C11D11/00 , C11D17/08 , C23G5/036 , H01L21/02 , H01L21/28 , H01L21/30 , H01L21/302 , H01L21/304 , H01L21/321 , H01L21/3213 , H01L21/82 , H01L21/8239 , H01L21/8242 , H01L27/108 , H01L29/78
CPC分类号： H01L21/02071 , C11D3/0073 , C11D3/042 , C11D3/046 , C11D3/2082 , C11D3/30 , C11D3/364 , C11D3/39 , C11D3/3947 , C11D11/0047 , C23G1/106
摘要： A corrosion-inhibiting cleaning composition for semiconductor wafer processing includes an aqueous admixture of at least water, a surfactant and a corrosion-inhibiting compound selected from a group consisting of amino phosphonates, polyamines and polycarboxylic acids. The quantity of the corrosion-inhibiting compound in the admixture is preferably in a range from about 0.0001 wt % to about 0.1 wt % and the quantity of the surfactant is preferably in a range from about 0.001 wt % to about 1.0 wt %. The aqueous admixture may also include sulfuric acid and a fluoride, which act as oxide etchants, and a peroxide, which acts as a metal etchant.
摘要翻译：用于半导体晶片处理的腐蚀抑制清洁组合物包括至少水，表面活性剂和选自氨基膦酸盐，多胺和多元羧酸的腐蚀抑制化合物的水性混合物。混合物中腐蚀抑制化合物的量优选在约0.0001重量％至约0.1重量％的范围内，表面活性剂的量优选在约0.001重量％至约1.0重量％的范围内。水性混合物还可以包括作为氧化物蚀刻剂的硫酸和氟化物，以及充当金属蚀刻剂的过氧化物。

6. 发明申请

US20060263971A1 Semiconductor device and method thereof 审中-公开
标题翻译：半导体装置及其方法
公开(公告)号：US20060263971A1
公开(公告)日：2006-11-23
申请号：US11436582
申请日：2006-05-19
申请人： Kwang-Wook Lee , Cheol-Woo Park , Yong-Sun Ko , Byoung-Moon Yoon , Kyung-Hyun Kim
发明人： Kwang-Wook Lee , Cheol-Woo Park , Yong-Sun Ko , Byoung-Moon Yoon , Kyung-Hyun Kim
IPC分类号： B32B3/10 , B32B3/00 , H01L21/8244 , H01L29/94
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852 , Y10T428/24273 , Y10T428/24479
摘要： A semiconductor device and a method thereof are disclosed. In the example method, a mold layer having an opening may be formed on a substrate. A conductive etchable pattern (e.g., a preliminary conductive pattern, a lower electrode pattern, etc.) may be formed within the opening. The mold layer may be reduced so as to expose a portion of the conductive etchable pattern and less than all of the exposed portion of the conductive etchable pattern may be etched such that the etched conductive etchable pattern has a reduced thickness. The example semiconductor device may include the etched conductive etchable pattern as above-described with respect to the example method.
摘要翻译：公开了一种半导体器件及其方法。在示例性方法中，可以在基板上形成具有开口的模具层。可以在开口内形成导电刻蚀图案（例如，初步导电图案，下电极图案等）。可以减小模具层，以便露出导电可蚀刻图案的一部分，并且可以蚀刻少于导电可蚀刻图案的全部暴露部分，使得蚀刻的导电可蚀刻图案具有减小的厚度。示例性半导体器件可以包括如上面关于示例性方法的蚀刻的导电可蚀刻图案。

7. 发明授权

US06946431B2 Cleaning solution including aqueous ammonia solution, acetic acid and deionized water for integrated circuit devices and methods of cleaning integrated circuit devices using the same 有权
标题翻译：包括用于集成电路器件的氨水溶液，乙酸和去离子水的清洗溶液以及使用其的集成电路器件的清洁方法
公开(公告)号：US06946431B2
公开(公告)日：2005-09-20
申请号：US10655421
申请日：2003-09-04
申请人： In-Joon Yeo , Yong-Sun Ko , In-Seak Hwang , Byoung-Moon Yoon , Dae-Hyuk Chung , Kyung-Hyun Kim
发明人： In-Joon Yeo , Yong-Sun Ko , In-Seak Hwang , Byoung-Moon Yoon , Dae-Hyuk Chung , Kyung-Hyun Kim
IPC分类号： H01L21/304 , C11D7/06 , C11D7/26 , C11D11/00 , H01L21/302
CPC分类号： C11D11/0047 , C11D7/06 , C11D7/265
摘要： Cleaning solutions for integrated circuit devices and methods of cleaning integrated circuit devices using the same are disclosed. The cleaning solution includes about 30% aqueous ammonia solution, acetic acid by a volume percent higher then a volume percent of the aqueous ammonia solution, and deionized water by a volume percent higher then the volume percent of the acetic acid. Additionally, disclosed are methods wherein the cleaning solution is formed on integrated circuit substrates having an exposed metal pattern formed thereon, and further providing mega-sonic energy to the film of the cleaning solution.
摘要翻译：公开了用于集成电路器件的清洁解决方案和使用其的集成电路器件的清洁方法。清洗溶液包括约30％氨水溶液，乙酸的体积百分数高于氨水溶液的体积百分比，去离子水的体积百分数高于乙酸的体积百分数。此外，公开了一种方法，其中清洁溶液形成在其上形成有暴露的金属图案的集成电路基板上，并且还向清洗溶液的膜提供大的声能。

8. 发明申请

US20080214006A1 METHODS OF USING CORROSION-INHIBITING CLEANING COMPOSITIONS FOR METAL LAYERS AND PATTERNS ON SEMICONDUCTOR SUBSTRATES 审中-公开
标题翻译：在金属层上使用腐蚀抑制性清洁组合物和在半导体衬底上形成图案的方法
公开(公告)号：US20080214006A1
公开(公告)日：2008-09-04
申请号：US12122264
申请日：2008-05-16
申请人： Kwang-Wook Lee , In-Seak Hwang , Yong-Sun Ko , Byoung-Moon Yoon , Kyung-Hyun Kim , Ky-Sub Kim , Sun-Young Song , Hyuk-Jin Lee , Byung-Mook Kim
发明人： Kwang-Wook Lee , In-Seak Hwang , Yong-Sun Ko , Byoung-Moon Yoon , Kyung-Hyun Kim , Ky-Sub Kim , Sun-Young Song , Hyuk-Jin Lee , Byung-Mook Kim
IPC分类号： H01L21/461 , G03C1/00
CPC分类号： H01L21/02071 , C11D3/0073 , C11D3/042 , C11D3/046 , C11D3/2082 , C11D3/30 , C11D3/364 , C11D3/39 , C11D3/3947 , C11D11/0047 , C23G1/106
摘要： Provided herein are methods for using corrosion-inhibiting cleaning compositions for semiconductor wafer processing that include an aqueous admixture of at least water, a surfactant and a corrosion-inhibiting compound selected from a group consisting of amino phosphonates, polyamines and polycarboxylic acids. The quantity of the corrosion-inhibiting compound in the admixture is preferably in a range from about 0.0001 wt % to about 0.1 wt % and the quantity of the surfactant is preferably in a range from about 0.001 wt % to about 1.0 wt %. The aqueous admixture may also include sulfuric acid and a fluoride, which act as oxide etchants, and a peroxide, which acts as a metal etchant.
摘要翻译：本文提供了使用用于半导体晶片加工的腐蚀抑制清洁组合物的方法，其包括至少水，表面活性剂和选自氨基膦酸盐，多胺和多元羧酸的腐蚀抑制化合物的水性混合物。混合物中腐蚀抑制化合物的量优选在约0.0001重量％至约0.1重量％的范围内，表面活性剂的量优选在约0.001重量％至约1.0重量％的范围内。水性混合物还可以包括作为氧化物蚀刻剂的硫酸和氟化物，以及充当金属蚀刻剂的过氧化物。

9. 发明申请

US20070059941A1 Methods of forming patterns and capacitors for semiconductor devices using the same 失效
标题翻译：使用其形成用于半导体器件的图案和电容器的方法
公开(公告)号：US20070059941A1
公开(公告)日：2007-03-15
申请号：US11455815
申请日：2006-06-20
申请人： Cheol-Woo Park , Byoung-Moon Yoon , Yong-Sun Ko , Kyung-Hyun Kim , Kwang-Wook Lee
发明人： Cheol-Woo Park , Byoung-Moon Yoon , Yong-Sun Ko , Kyung-Hyun Kim , Kwang-Wook Lee
IPC分类号： H01L21/302
CPC分类号： H01L21/31111 , H01L21/0206 , H01L21/02068 , H01L27/10852 , H01L28/91
摘要： A semiconductor structure may be formed by a wet etching process using an etchant containing water. The semiconductor structure may include a plurality of patterns having an increased or higher aspect ratio and may be arranged closer to one another. A dry cleaning process may be performed using hydrogen fluoride gas on the semiconductor structure.
摘要翻译：可以通过使用含有蚀刻剂的湿法蚀刻工艺形成半导体结构。半导体结构可以包括具有增加的或更高的纵横比的多个图案，并且可以彼此更靠近地布置。可以在半导体结构上使用氟化氢气体进行干法处理。

10. 发明授权

US07579284B2 Etching solution, method of forming a pattern using the same, method of manufacturing a multiple gate oxide layer using the same and method of manufacturing a flash memory device using the same 失效
标题翻译：蚀刻溶液，使用其形成图案的方法，使用该方法制造多栅极氧化物层的方法以及使用其制造闪存器件的方法
公开(公告)号：US07579284B2
公开(公告)日：2009-08-25
申请号：US11482773
申请日：2006-07-10
申请人： Byoung-Moon Yoon , Ji-Hong Kim , Yong-Sun Ko , Kyung-Hyun Kim
发明人： Byoung-Moon Yoon , Ji-Hong Kim , Yong-Sun Ko , Kyung-Hyun Kim
IPC分类号： H01L21/311
CPC分类号： C09K13/04 , H01L21/32134
摘要： Example embodiments of the present invention relate to an etching solution, a method of forming a pattern using the same, a method of manufacturing a multiple gate oxide layer using the same and a method of manufacturing a flash memory device using the same. Other example embodiments of the present invention relate to an etching solution having an etching selectivity between a polysilicon layer and an oxide layer, a method of forming a pattern using an etching solution using the same, a method of manufacturing a multiple gate oxide layer using the same, and a method of manufacturing a flash memory device using the same. An etching solution including hydrogen peroxide (H2O2) and ammonium hydroxide (NH4OH) by a volume ratio of about 1:2 to about 1:10 mixed in water. In a method of forming a pattern and methods of manufacturing a multiple gate oxide layer and a flash memory device, a polysilicon layer may be formed on a substrate. An insulation layer pattern including an opening exposing the polysilicon layer may be formed on the polysilicon layer. The polysilicon layer exposed by the insulation layer pattern may be etched using the etching solution. A polysilicon layer pattern may be formed on the substrate using the etching solution.
摘要翻译：本发明的示例性实施例涉及一种蚀刻溶液，使用该方法形成图案的方法，使用该蚀刻溶液的多栅极氧化物层的制造方法以及使用其制造闪存器件的方法。本发明的其它示例性实施例涉及在多晶硅层和氧化物层之间具有蚀刻选择性的蚀刻溶液，使用其使用蚀刻溶液形成图案的方法，使用该栅极氧化物层的方法以及使用其制造闪存器件的方法。包含在水中混合的体积比为约1:2至约1:10的过氧化氢（H 2 O 2）和氢氧化铵（NH 4 OH）的蚀刻溶液。在形成图案的方法和制造多栅极氧化物层和闪存器件的方法中，可以在衬底上形成多晶硅层。可以在多晶硅层上形成包括露出多晶硅层的开口的绝缘层图案。可以使用蚀刻溶液蚀刻由绝缘层图案暴露的多晶硅层。可以使用蚀刻溶液在衬底上形成多晶硅层图案。

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