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    • 1. 发明授权
    • Amplifier
    • 放大器
    • US4128813A
    • 1978-12-05
    • US852971
    • 1977-11-18
    • Tadao SuzukiTadao Yoshida
    • Tadao SuzukiTadao Yoshida
    • H03F3/16H03F3/18H03F3/20H03F3/217H03F3/30H03F3/34H03F3/345H03K5/02
    • H03F3/2171H03F3/16H03F3/30H03K5/02H03K5/023H03F2200/511
    • An amplifier comprised of a field effect transistor whose gate electrode is adapted to receive an input signal. An impedance converter couples the input signal to the gate electrode of the field effect transistor, the impedance converter being formed of n impedance converting stages, each stage having a relatively low output impedance. A voltage limiting circuit is connected between the source of input signal and the gate electrode of the field effect transistor so as to limit the forward biasing of the field effect transistor. This voltage limiting circuit includes m voltage-limiting elements, wherein n and m are integers (1, 2, 3, . . . ) and n is equal to or greater than m. In a preferred embodiment, the amplifier is formed of two field effect transistors connected in push-pull relation, each field effect transistor being provided with an impedance converter and a voltage-limiting circuit as described above.
    • 放大器,由场效应晶体管组成,其栅极适于接收输入信号。 阻抗转换器将输入信号耦合到场效应晶体管的栅电极,阻抗转换器由n个阻抗转换级形成,每级具有相对低的输出阻抗。 电压限制电路连接在输入信号源和场效应晶体管的栅电极之间,以限制场效应晶体管的正向偏置。 该电压限制电路包括m个电压限制元件,其中n和m是整数(1,2,3等),n等于或大于m。 在优选实施例中,放大器由以推挽关系连接的两个场效应晶体管形成,每个场效应晶体管设置有如上所述的阻抗转换器和限压电路。
    • 3. 发明授权
    • Pulse width modulated signal amplifier
    • 脉宽调制信号放大器
    • US4021745A
    • 1977-05-03
    • US641244
    • 1975-12-16
    • Tadao SuzukiTadao Yoshida
    • Tadao SuzukiTadao Yoshida
    • H03F3/20H03F3/217H03K7/02H03K7/08H03F3/38
    • H03F3/217H03K7/02
    • A pulse width modulated signal amplifier includes a first input terminal supplied with a rectangular wave signal as a carrier, a second input terminal supplied with a modulating signal, such as an audio signal, an integrator supplied with both the rectangular wave signal and the modulating signal, a high gain amplifier receiving the output of the integrator, a low pass filter receiving the output of the high gain amplifier and producing a demodulated signal corresponding to the modulating signal and which is supplied to an output terminal, and a negative feedback circuit connected between the output of the high gain amplifier and the input of the integrator.
    • 脉宽调制信号放大器包括提供有作为载波的矩形波信号的第一输入端,提供有诸如音频信号的调制信号的第二输入端,提供有矩形波信号和调制信号两者的积分器 接收积分器的输出的高增益放大器,接收高增益放大器的输出的低通滤波器,产生对应于调制信号的解调信号,并将其提供给输出端;以及负反馈电路,其连接在 高增益放大器的输出和积分器的输入。
    • 4. 发明授权
    • Digital gain control apparatus
    • 数字增益控制装置
    • US4363001A
    • 1982-12-07
    • US171454
    • 1980-07-23
    • Tadao SuzukiTadao Yoshida
    • Tadao SuzukiTadao Yoshida
    • H03G3/02H03G1/02H03G3/00H03G5/04H03G9/14
    • H03G5/04H03G1/02H03G3/00H03G3/001
    • A digital gain control apparatus includes a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal. A shift register is supplied with the plurality of serial-binary coded signals and the clock pulse signal from the digital control signal generator. A latch circuit is connected to the output of the shift register and is supplied with the strobe signal from the digital control signal generator to convert the plurality of serial-binary coded signals into a plurality of parallel-binary coded signals. A decoder is connected to the output of the latch circuit to produce a plurality of control signals from the plurality of parallel-binary coded signals. A function selector circuit and a volume adjusting circuit for the selected functions is also provided, each being controlled by the plurality of control signals. The shift register, latch circuit and volume adjusting circuit are formed in one chip-integrated circuit. In one embodiment, a bass and treble tone control circuit is provided which is controlled by the output of the decoder.
    • 数字增益控制装置包括产生多个串行二进制编码信号的数字控制信号发生器,时钟脉冲信号和选通信号。 移位寄存器被提供有来自数字控制信号发生器的多个串行二进制编码信号和时钟脉冲信号。 锁存电路连接到移位寄存器的输出端,并从数字控制信号发生器提供选通信号,将多个串行二进制编码信号转换成多个并行二进制编码信号。 解码器连接到锁存电路的输出,以产生来自多个并行二进制编码信号的多个控制信号。 还提供了用于所选功能的功能选择器电路和音量调节电路,每个功能选择器电路和音量调节电路由多个控制信号控制。 移位寄存器,锁存电路和音量调节电路形成在一个芯片集成电路中。 在一个实施例中,提供了由解码器的输出控制的低音和高音音调控制电路。
    • 5. 发明授权
    • Pulse width modulated signal amplifier with protective means
    • 具有保护装置的脉宽调制信号放大器
    • US4167710A
    • 1979-09-11
    • US855389
    • 1977-11-28
    • Tadao SuzukiTadao Yoshida
    • Tadao SuzukiTadao Yoshida
    • H03F1/00H03F1/42H03F1/52H03F3/20H03F3/217H03F3/04
    • H03F3/217H03F1/523
    • A pulse width modulated signal amplifier comprises a DC power supply for rectifying an AC input voltage to produce a pair of DC voltages of opposite polarity, a pulse width modulated signal amplifying circuit supplied with a pulse width modulated signal to produce a demodulated signal through a low pass filter, and a detecting circuit responsive to an abnormal level of the DC voltages to produce a detecting signal when a smoothing condenser of the DC power supply is overcharged by a current flowing through the low pass filter in one direction. Such detecting signal is desirably employed to prevent the appearance of the output signal from the pulse width modulated amplifying circuit.
    • 脉冲宽度调制信号放大器包括直流电源,用于整流交流输入电压以产生相反极性的一对直流电压;脉冲宽度调制信号放大电路,被提供脉冲宽度调制信号以通过低电平产生解调信号 以及响应于DC电压的异常电平的检测电路,当直流电源的平滑电容器由在一个方向上流经低通滤波器的电流过充电时产生检测信号。 期望采用这种检测信号来防止来自脉宽调制放大电路的输出信号的出现。
    • 7. 发明授权
    • Push-pull pulse amplifier having improved turn-on and turn-off times
    • 推挽脉冲放大器具有改善的导通和关断时间
    • US4115740A
    • 1978-09-19
    • US850830
    • 1977-11-11
    • Tadao YoshidaTadao Suzuki
    • Tadao YoshidaTadao Suzuki
    • H03F3/20H03F3/217H03F3/30H03F3/34H03F3/345H03K5/02H03F3/16H03F3/26H03K17/60
    • H03F3/30H03F3/217H03F3/2171H03K5/023
    • A pulse amplifier formed of first and second field effect transistors, each exhibiting an inherent input capacitance at its gate electrode, the field effect transistors being connected in push-pull relation whereby their drain or source electrodes are connected to a common output terminal. First and second resistive circuits are connected in a pulse supply circuit to supply pulse signals to the respective gate electrodes of the field effect transistors. Each of the resistive circuits exhibits a higher resistance when a pulse is supplied therethrough to turn the respective field effect transistor ON and a lower resistance when the pulse is terminated to turn the respective field effect transistor OFF. The higher resistance of the resistive circuit cooperates with the inherent input capacitance of the respective field effect transistor to provide a higher discharge time constant to turn that field effect transistor ON and the lower resistance cooperates with the inherent input capacitance of the field effect transistor to provide a lower charge time constant to turn that field effect transistor OFF, whereby the field effect transistors are not ON concurrently. In a preferred embodiment, the field effect transistors are complementary field effect transistors so that a positive-going pulse turns one of those field effect transistors OFF while turning the other ON, and a negative-going pulse turns the one field effect transistor ON while turning the other OFF.
    • 由第一场效应晶体管和第二场效应晶体管构成的脉冲放大器,每个场效应晶体管在其栅极处呈现固有的输入电容,场效应晶体管以推挽方式连接,由此其漏极或源极连接到公共输出端。 第一和第二电阻电路连接在脉冲供电电路中,以向场效应晶体管的各个栅电极提供脉冲信号。 当脉冲被提供通过其中以使各个场效应晶体管导通时,每个电阻电路呈现较高的电阻,并且当脉冲终止时使电阻电阻降低,以使各个场效应晶体管截止。 电阻电路的较高电阻与相应的场效应晶体管的固有输入电容配合,以提供更高的放电时间常数,以使该场效应晶体管导通,并且较低电阻与场效应晶体管的固有输入电容配合,以提供 较低的充电时间常数使该场效应晶体管截止,由此场效应晶体管不是同时导通。 在优选实施例中,场效应晶体管是互补的场效应晶体管,使得正向脉冲将这些场效应晶体管中的一个截止,同时使另一个导通,而负向脉冲使一个场效应晶体管导通,同时转动 另一个OFF。
    • 9. 发明授权
    • Transistor inverter
    • 晶体管逆变器
    • US4031454A
    • 1977-06-21
    • US691827
    • 1976-06-01
    • Tadao SuzukiTadao YoshidaShigeaki Wachi
    • Tadao SuzukiTadao YoshidaShigeaki Wachi
    • H02M3/338H02M7/5383H02M7/5387H02M3/335
    • H02M3/3387
    • A transistor inverter includes a pair of switching transistors each having base, emitter and collector electrodes, each of the collector and emitter circuits of which is connected between a DC voltage source through a primary winding of an output transformer, respectively, the secondary winding of which is connected to a rectifying circuit so as to produce a DC output voltage at its output. The transistor inverter also includes an input transformer with a saturable core and voltage feedback and current feedback circuits. The current feedback circuit has another transformer which controls the amount of current feedback, and the winding ratio of the primary and secondary windings is determined in connection with the current amplification factor of said first and second switching transistors in order to improve a switching speed of the switching transistors.
    • 晶体管反相器包括一对开关晶体管,每个开关晶体管具有基极,发射极和集电极,其集电极和发射极各自分别通过输出变压器的初级绕组连接在直流电压源之间,其次级绕组 连接到整流电路,以在其输出端产生直流输出电压。 晶体管反相器还包括具有饱和磁芯和电压反馈和电流反馈电路的输入变压器。 电流反馈电路具有控制电流反馈量的另一个变压器,并且根据所述第一和第二开关晶体管的电流放大系数来确定初级绕组和次级绕组的绕组比,以便提高开关速度 开关晶体管。
    • 10. 发明授权
    • Pulse width modulated signal amplifier
    • 脉宽调制信号放大器
    • US3999143A
    • 1976-12-21
    • US641243
    • 1975-12-16
    • Tadao YoshidaTadao Suzuki
    • Tadao YoshidaTadao Suzuki
    • H03F3/20H03F3/217H03F3/38
    • H03F3/217
    • A pulse width modulated signal amplifier includes a pair of transistors, each having a base, an emitter, and a collector. The bases are supplied with a pulse width modulated signal to be amplified, and the emitters are connected to each other and to an output terminal. A low pass filter connects the output terminal to a load. The collectors are connected to first and second terminals of a DC power source through first and second DC voltage sources, respectively, and first and second diodes are connected between the connection point of the emitters and corresponding terminals of the DC power source, respectively. First and second voltage limiting circuits are provided between the bases of the first and second transistors and corresponding terminals of the DC power source so as not to produce a longitudinal amplitude distortion in response to the switching operation of the first and second transistors.
    • 脉宽调制信号放大器包括一对晶体管,每个晶体管具有基极,发射极和集电极。 提供基极以被放大的脉宽调制信号,并且发射器彼此连接并连接到输出端子。 低通滤波器将输出端子连接到负载。 收集器分别通过第一和第二直流电压源连接到直流电源的第一和第二端子,第一和第二二极管分别连接在发射器的连接点和直流电源的对应端子之间。 第一和第二限压电路设置在第一和第二晶体管的基极与直流电源的对应端之间,以便不响应于第一和第二晶体管的开关操作而产生纵向幅度失真。