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    • 9. 发明授权
    • Failure self-diagnosis device for semiconductor memory
    • 半导体存储器故障自诊断装置
    • US6009028A
    • 1999-12-28
    • US154774
    • 1998-09-17
    • Tsutomu Akiyama
    • Tsutomu Akiyama
    • G01R31/28G01R31/3193G06F11/22G06F12/16G11C29/02G11C29/12G11C29/16G11C7/00
    • G11C29/16G01R31/31935
    • The failure self-diagnosis device for semiconductor memory, comprises: a CPU for controlling a diagnosis operation; a data generating circuit for generating a test data to be written into memory elements to be diagnosed and an expected data which is the same as a data to be precisely read out from the memory elements after the test data was precisely written into the memory elements; a clock generating circuit for outputting a clock signal; address generating circuits, each of which is arranged with each of the memory elements to be diagnosed, for generating address assigning signals by synchronizing with the clock signal; comparators, each of which is arranged with each of the memory elements to be diagnosed, for comparing read out data which was read out from each of the memory elements by synchronizing with the address assigning signal, with the expected data; and diagnosis stop circuits, each of which is arranged with each of the memory elements to be diagnosed, for stopping the diagnosis operation of each of the memory elements when a corresponding comparator judges that the read out data from a corresponding memory element is not coincident with the expected data.
    • 半导体存储器的故障自诊断装置包括:用于控制诊断操作的CPU; 数据产生电路,用于在将测试数据精确地写入存储器元件之后,生成要写入待诊断的存储器元件的测试数据和与从存储器元件精确读出的数据相同的预期数据; 时钟发生电路,用于输出时钟信号; 地址发生电路,其中每个被布置成要被诊断的每个存储器元件,用于通过与时钟信号同步来产生地址分配信号; 比较器,其中每个被布置为要被诊断的每个存储器元件,用于将从每个存储器元件读出的读出数据与地址分配信号同步地与预期数据进行比较; 以及诊断停止电路,每个诊断停止电路配置有要被诊断的每个存储器元件,用于当相应的比较器判断出来自相应的存储器元件的读出数据不一致时停止每个存储器元件的诊断操作 预期数据。