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    • 1. 发明申请
    • TUNNELING DEVICE AND METHOD FOR FORMING THE SAME
    • 隧道装置及其形成方法
    • WO2012116529A1
    • 2012-09-07
    • PCT/CN2011/076342
    • 2011-06-24
    • TSINGHUA UNIVERSITYCUI, NingLIANG, RenrongWANG, JingXU, Jun
    • CUI, NingLIANG, RenrongWANG, JingXU, Jun
    • H01L29/78H01L21/336
    • H01L29/7391H01L21/26586
    • The present disclosure provides a tunneling device, which comprises: a substrate (1100); a channel region (1300) formed in the substrate, and a source region (1500) and a drain region (1400) formed on two sides of the channel region (1300); and a gate stack (1600) formed on the channel region (1300) and a first side wall (1910) and a second side wall (1920) formed on two sides of the gate stack (1600), wherein the gate stack (1600) comprises: a first gate dielectric layer (1631); at least a first gate electrode (1610) and a second gate electrode (1620) formed on the first gate dielectric layer (1631); a second gate dielectric layer (1632) formed between the first gate electrode (1610) and the first side wall (1910); and a third gate dielectric layer (1633) formed between the second gate electrode (1620) and the second side wall (1920).
    • 本公开提供一种隧道装置,其包括:基板(1100); 形成在所述基板中的沟道区域(1300),以及形成在所述沟道区域(1300)的两侧的源极区域(1500)和漏极区域(1400)。 以及形成在所述沟道区域(1300)上的栅极堆叠(1600)和形成在所述栅极堆叠(1600)的两侧上的第一侧壁(1910)和第二侧壁(1920),其中所述栅极堆叠(1600) 包括:第一栅介质层(1631); 形成在所述第一栅极介电层(1631)上的至少第一栅电极(1610)和第二栅电极(1620)。 形成在第一栅电极(1610)和第一侧壁(1910)之间的第二栅介质层(1632); 和形成在第二栅电极(1620)和第二侧壁(1920)之间的第三栅介质层(1633)。
    • 3. 发明申请
    • TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FORMING THE SAME
    • 隧道场效应晶体管及其形成方法
    • WO2012116528A1
    • 2012-09-07
    • PCT/CN2011/076340
    • 2011-06-24
    • TSINGHUA UNIVERSITYLIANG, RenrongCUI, NingWANG, JingXU, Jun
    • LIANG, RenrongCUI, NingWANG, JingXU, Jun
    • H01L29/78H01L21/336
    • H01L21/28105H01L21/26586H01L29/4966H01L29/66659H01L29/7391
    • The present disclosure provides a TFET, which comprises: a substrate (1100); a channel region (1300) formed in the substrate (1100), and a source region (1500) and a drain region (1400) formed on two sides of the channel region (1300); a gate stack (1600) formed on the channel region (1300), wherein the gate stack (1600) comprises: a gate dielectric layer (1630), and at least a first gate electrode (1610) and a second gate electrode (1620) distributed in a direction from the source region (1500) to the drain region (1400) and formed on the gate dielectric layer (1630), and the first gate electrode (1610) and the second gate electrode (1620) have different work functions; and a first side wall (1910) and a second side wall (1920) formed on a side of the first gate electrode (1610) and on a side of the second gate electrode (1620) respectively.
    • 本公开提供了一种TFET,其包括:衬底(1100); 形成在所述基板(1100)中的沟道区域(1300),以及形成在所述沟道区域(1300)的两侧的源极区域(1500)和漏极区域(1400)。 形成在所述沟道区域(1300)上的栅极叠层(1600),其中所述栅极堆叠(1600)包括:栅极介电层(1630),以及至少第一栅电极(1610)和第二栅极电极(1620) 分布在从源极区域(1500)到漏极区域(1400)的方向上并且形成在栅极介电层(1630)上,并且第一栅极电极(1610)和第二栅极电极(1620)具有不同的功函数; 以及分别形成在第一栅电极(1610)侧和第二栅电极(1620)一侧的第一侧壁(1910)和第二侧壁(1920)。