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1. 发明专利

JP2006261421A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2006261421A
公开(公告)日：2006-09-28
申请号：JP2005077352
申请日：2005-03-17
申请人： Toshiba Corp , 株式会社東芝
发明人： SHIMOJO YOSHIRO , KUNISHIMA IWAO
IPC分类号： H01L21/8234 , H01L27/088 , H01L29/78
CPC分类号： H01L29/78642 , H01L21/76838 , H01L27/0207 , H01L27/108 , H01L27/10802 , H01L27/10876 , H01L27/10891 , H01L29/7841
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device wherein an arbitrary transistor can be selected from among a plurality of transistor and which can be refined.
SOLUTION: This semiconductor device comprises a first source/drain layer 11, a first gate electrode M1 provided above the first source/drain layer 11 and having a first opening, a first gate insulating film 14 provided to cover the side surface of the first opening, a first base layer 13 provided on the first source/drain layer 11 and on the side surface of the first gate insulating film 14, a second source/drain layer 16 provided on the first base layer 13, a second gate electrode M2 provided above the second source/drain layer 16 and having a second opening, a second gate insulating film 19 provided to cover the side surface of the second opening, a second base layer 18 provided on the second source/drain layer 16 and on the side surface of the second gate insulating film 19, and a third source/drain layer 21 provided on the second base layer 18.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种半导体器件，其中任意晶体管可以从多个晶体管中选择并且可以被精炼。解决方案：该半导体器件包括第一源极/漏极层11，设置在第一源极/漏极层11上方并具有第一开口的第一栅极电极M1，设置成覆盖第一源极/漏极层11的侧表面的第一栅极绝缘膜14 第一开口，设置在第一源极/漏极层11上以及第一栅极绝缘膜14的侧表面上的第一基极层13，设置在第一基极层13上的第二源极/漏极层16，第二栅极电极 M2设置在第二源极/漏极层16上方并且具有第二开口，设置成覆盖第二开口的侧表面的第二栅极绝缘膜19，设置在第二源极/漏极层16上的第二基极层18 第二栅极绝缘膜19的侧表面和设置在第二基极层18上的第三源极/漏极层21。（C）2006，JPO和NCIPI

2. 发明专利

JP2005268478A Ferroelectric storage device and its manufacturing method 有权
标题翻译：电力储存装置及其制造方法
公开(公告)号：JP2005268478A
公开(公告)日：2005-09-29
申请号：JP2004077713
申请日：2004-03-18
申请人： Toshiba Corp , 株式会社東芝
发明人： KUMURA YOSHINORI , OZAKI TORU , KANETANI HIROYUKI , KUNISHIMA IWAO , SHIMOJO YOSHIRO
IPC分类号： H01L27/10 , G11C11/14 , G11C11/22 , H01L21/8246 , H01L27/105
CPC分类号： G11C11/22 , H01L27/105 , H01L27/11502 , H01L27/11507 , H01L27/11509 , H01L28/57
摘要： PROBLEM TO BE SOLVED: To provide a ferroelectric storage device that prevents oxidation of contacts, and also to provide a method of manufacturing the storage device. SOLUTION: The ferroelectric storage device is provided with: a first contact 17a electrically connected to a diffused layer 14 through a first insulating film 16; a first oxygen barrier film 18 formed on the first contact 17a and first insulating film 16; and a second insulating film formed on the first oxygen barrier film 18. The storage device is also provided with: a second contact 29a connected to the first contact 17a through the second insulating film and first oxygen barrier film 18; a second oxygen barrier film 30 formed on the second contact 29a and second insulating film; and a ferroelectric capacitor 25b formed in the second insulating film and having a lower electrode 21, a ferroelectric film 22, and an upper electrode 23. In addition, the storage device is also provided with: a third contact 32b connected to the upper electrode 23; first wiring 34a connected to the second and third contacts 29a and 32b; and a third oxygen barrier film 26 which is arranged between the ferroelectric capacitor 25b and second contact 29a in a state where the film 26 is brought into contact with the first oxygen barrier film 18. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种防止触点氧化的铁电存储装置，并且还提供一种制造存储装置的方法。解决方案：铁电存储装置设置有：通过第一绝缘膜16电连接到扩散层14的第一接触17a; 形成在第一接触件17a和第一绝缘膜16上的第一氧阻挡膜18; 以及形成在第一氧阻隔膜18上的第二绝缘膜。存储装置还设置有：通过第二绝缘膜和第一氧阻隔膜18连接到第一接触件17a的第二接触件29a; 形成在第二接触件29a和第二绝缘膜上的第二氧阻隔膜30; 以及形成在第二绝缘膜中并具有下电极21，铁电体膜22和上电极23的铁电电容器25b。此外，存储装置还设置有：连接到上电极23的第三触点32b ; 连接到第二和第三触点29a和32b的第一布线34a; 以及在膜26与第一氧阻隔膜18接触的状态下布置在铁电电容器25b和第二触点29a之间的第三氧阻隔膜26.（C）2005，JPO＆NCIPI

3. 发明专利

JP2002094022A SEMICONDUCTOR MEMORY DEVICE AND IS MANUFACTURING METHOD 失效
公开(公告)号：JP2002094022A
公开(公告)日：2002-03-29
申请号：JP2000284710
申请日：2000-09-20
申请人： TOSHIBA CORP
发明人： OZAKI TORU , KUNISHIMA IWAO , KANETANI HIROYUKI , MORIMOTO TOYOTA
IPC分类号： H01L27/105 , H01L21/8246 , H01L27/115 , G11C11/22
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory device for preventing deterioration of capacitor characteristics at a terminal end of a memory cell block, and to provide a method of manufacturing the same. SOLUTION: In a TC parallel unit serially connected type ferroelectric memory, a dummy upper electrode 25 which is not connected to another element is disposed in a capacitor of a terminal end of the block in which a block selecting transistor 6 or a plate line is disposed, so that an upper electrode 20 in the capacitor used for the cell is not disposed at an outermost periphery to prevent a deterioration of the ferroelectric capacitor characteristics. An element region for holding a passing word line 36 of a block selector of the TC parallel unit serially connected type ferroelectric memory is connected by a lower electrode wiring of the capacitor, a hierarchical word line can pass thereon, and hence high integration is realized.

4. 发明专利

JP2000031398A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JP2000031398A
公开(公告)日：2000-01-28
申请号：JP21477498
申请日：1998-07-15
申请人： TOSHIBA CORP
发明人： KUNISHIMA IWAO
IPC分类号： H01L21/8247 , H01L21/02 , H01L21/8242 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/788 , H01L29/792 , H01L29/92
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device wherein a contact hole electrically connecting an upper electrode of a ferroelectric capacitor with a substrate is formed in a capacitor surface in a self-alignment manner, and its manufacturing method, and enable scale-down of a nonvolatile storage device. SOLUTION: A transistor having a source/drain region 3 and a gate, and a nonvolatile semiconductor storage device having a capacitor composed of a ferroelectric thin film 92 via an electrode on an interlayer insulating film 5 formed on the semiconductor substrate main surface are formed on a silicon semiconductor substrate 1. Side surfaces of a lower electrode 91 of the capacitor and the ferroelectric film 92 are covered with a side wall insulating film 14. As to wiring electrically connecting an upper lectrode 93 of the ferroelectric capacitor with the source/drain region 3, at least a connection part with the upper electrode and its vicinity are formed of the same material as the upper electrode, and both of them are continuously connected. The contact hole formed in the insulating film which a wiring connecting the capacitor and the semiconductor substrate passes can be formed just under the capacitor lower electrode, so that the cell area can be remarkably reduced.

5. 发明专利

JPH10270652A MANUFACTURE OF SEMICONDUCTOR STORAGE DEVICE 失效
公开(公告)号：JPH10270652A
公开(公告)日：1998-10-09
申请号：JP7100097
申请日：1997-03-25
申请人： TOSHIBA CORP
发明人： KAWAKUBO TAKASHI , FUKUSHIMA SHIN , KUNISHIMA IWAO
IPC分类号： H01L21/8247 , H01L21/8242 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To provide a capacitor cell which enables high integration in a semiconductor memory wherein a ferroelectric film which shows ferroelectricity, by using an epitaxial effect or a dielectric film whose ferroelectricity or paraelectricity is reinforced by the epitaxial effect is used. SOLUTION: Crystal orientation of a semiconductor board 1 is successive by applied from at least one of source electrodes and drain electrodes 6 of a transistor formed on a semiconductor board 1. A semiconductor layer 5 which is subjected to epitaxial growth or orientation growth is formed all over the board 1. A groove is provided to the semiconductor layer 5 by patterning and an insulation film 7 is buried in the groove. Thereby, a semiconductor plug 11 which is subject to insulation and separation and is formed of a part of the semiconductor layer 5 is formed on at least one of source electrodes and drain electrodes 6 of the transistor and a capacitor which is conductive thereto is formed on the semiconductor plug 11.

6. 发明专利

JPH10256329A METHOD OF EVALUATING SEMICONDUCTOR 失效
公开(公告)号：JPH10256329A
公开(公告)日：1998-09-25
申请号：JP6130597
申请日：1997-03-14
申请人： TOSHIBA CORP
发明人： TOMIYASU HARUKO , SAKATA ATSUKO , KUNISHIMA IWAO
IPC分类号： H01L21/66
摘要： PROBLEM TO BE SOLVED: To accurately evaluate the level of a semiconductor structure by providing an electrode insulated from the semiconductor structure on a part round a junction face and utilizing the state change of the semiconductor structure about a direction parallel to the junction face with varying a voltage applied to the electrode. SOLUTION: On the surface of an n-type Si substrate 1, a Schottky electrode 2 is formed to form a Schottky junction, a gate electrode 4 is provided through a gate oxide film 3 on a plane perpendicular to the Schottky junction face and connected to a gate voltage source 6, and the substrate 1 and electrode 2 are connected to a bias voltage source 5 to inject carriers into the junction face from the voltage source 5 while the capacitive response of the Schottky junction at each gate voltage is measured by a capacitance meter 7 to obtain a deep level distribution in a direction parallel to the junction face, based on the measured result.

7. 发明专利

JPH08255792A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08255792A
公开(公告)日：1996-10-01
申请号：JP5724995
申请日：1995-03-16
申请人： TOSHIBA CORP
发明人： SASAKI KEIICHI , NAKADA RENPEI , HAYASAKA NOBUO , KUNISHIMA IWAO
IPC分类号： C23C16/40 , H01L21/205 , H01L21/316
摘要： PURPOSE: To enable high-speed formation of a silicon oxide film excelling in step coverage by using a gas of compounds containing siloxane as a raw material gas of a silicon oxide film and rotating a workpiece at the time of silicon oxide film formation. CONSTITUTION: A susceptor 5 is set on a silicon substrate 6 and the inside of a chamber 1 is subjected to N2 substitution. Next, while the silicon substrate 6 is heated by a resistance heating heater 7 to a film-forming temperature of 800 deg.C, the silicon substrate 6 is rotated. TEDS [(C2 H5 O)2 CH3 Si)2 O], O2 , and N2 are introduced to the chamber 1 at respective flow rates of 20scm for TEDS [(C2 H5 O)2 CH2 Si)2 O], 1slm for O2 , and 10slm for N2 . At this time, the total gas pressure is set to 100Torr. Such film-forming method enables a silicon oxide film having an excellent step coverage and maintaining an in-plane uniformity to be formed at high speed on the silicon substrate 6.

8. 发明专利

JPH03166736A SEMICONDUCTOR DEVICE, MANUFACTURE OF SEMICONDUCTOR DEVICE AND HEAT TREATMENT EQUIPMENT 失效
公开(公告)号：JPH03166736A
公开(公告)日：1991-07-18
申请号：JP30732289
申请日：1989-11-27
申请人： TOSHIBA CORP
发明人： KUNISHIMA IWAO , AOYAMA TOMONORI , SUGURO KYOICHI
IPC分类号： H01L29/78 , H01L21/225 , H01L21/28 , H01L21/331 , H01L21/336 , H01L29/41 , H01L29/43 , H01L29/45 , H01L29/49
摘要： PURPOSE:To prevent breakdown of a gate while lowering the resistdance in source-drain regions by selecting the face azimuth of a substrate and a metallic material forming a metallic compound layer. CONSTITUTION:The surface of a substrate 11 is formed in a (100) face, a material epitaxial-grown from contact sections with the substrate 11 is selected as a metallic material constituting metallic compound layers 17, and the bottoms of the metallic compound layers 17 are surrounded by the (100) face of the substrate and side sections thereof by (111) faces. Consequently, when the face azimuth of the substrate 11 and the material of the metallic compound layers 17 are selected, the metallic compound layers 17 are grown in the depth direction of the substrate 11, but they are hardly grown in the direction parallel with the surface of the substrate. Accordingly, the metallic compound layers 17 do not reach to the lower section of a gate electrode 14b, and the breakdown of a gate is prevented while the thickness of the metallic compound layers 17 can be thickened sufficiently, thus lowering the resistance of source-drain regions.

9. 发明专利

JPS6355932A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6355932A
公开(公告)日：1988-03-10
申请号：JP19890486
申请日：1986-08-27
申请人： TOSHIBA CORP
发明人： KUNISHIMA IWAO , NAKADA RENPEI
IPC分类号： H01L21/285 , H01L21/28 , H01L21/3205
摘要： PURPOSE:To enable an interconnection with high reliability to be formed without deteriorating the element characteristics by a method wherein a high melting point metallic compound film is previously formed on an insulating film. CONSTITUTION:An n type diffused layer 12 is formed on a p type Si substrate 11 and then an SiO2 film 13 as an insulating film is formed on overall surface of substrate further an WN2 film 14 is formed on the film 13. Later, the films 14 and 13 are etched to make a contact hole 15 with the layer 12 and then a W film 16 is grown on the layer 12 exposed to the bottom of hole 15. Furthermore, another W film 17 is buried in the hole 15 and then an Al film is evaporated to form an interconnection 18. Through these procedures, the film 14 is formed on the film 13 before forming the W film 17 so that the selectivity may not deteriorate enabling the contact hole 15 to be buried completely.

10. 发明专利

JPS62230981A FORMATION OF THIN FILM 失效
公开(公告)号：JPS62230981A
公开(公告)日：1987-10-09
申请号：JP7331586
申请日：1986-03-31
申请人： TOSHIBA CORP
发明人： KUNISHIMA IWAO
IPC分类号： H01L21/205 , C23C16/08 , C23C16/34 , C23C16/40 , C23C16/44 , H01L21/285
摘要： PURPOSE:To form a thin film having good quality without a decrease in a deposition speed and selectivity by growing an insulating film in a reaction tube to coat the inside wall of the reaction tube with the insulating film, then forming a metallic film or metallic compd. film by vapor growth on the surface of a substrate. CONSTITUTION:The metallic film or metallic compd. film is formed on the surface of the substrate to be treated in the reaction tube by a vapor growth method. The insulating film is grown prior to the formation of the thin film in the above-mentioned thin film forming method to coat the inside wall of the reaction tube with the insulating film consisting of SiO2 or Si3N4, etc. The consumption of gaseous raw materials in the inside wall part of the reaction tube in the subsequent vapor growth is thereby eliminated and the metallic film or metallic compd. film is deposited at a high speed on the substrate with good controllability. The thin film having good quality which have no defects such as exfoliation of the deposit on the inside wall of the reaction tube is thus formed.

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