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1. 发明申请

WO2006107417A3 METHOD AND SYSTEM FOR FORMING A HIGH-K DIELECTRIC LAYER 审中-公开
公开(公告)号：WO2006107417A3
公开(公告)日：2006-10-12
申请号：PCT/US2006/005432
申请日：2006-02-16
申请人： TOKYO ELECTRON LIMITED , WAJDA, Cory , IGETA, Masanobu , LEUSINK, Gert
发明人： WAJDA, Cory , IGETA, Masanobu , LEUSINK, Gert
IPC分类号： H01L21/31 , H01L21/469
摘要： A method for preparing an interfacial layer for a high-k dielectric layer on a substrate. A surface of said substrate is exposed to oxygen radicals formed by ultraviolet (UV) radiation induced dissociation of a first process gas comprising at least one molecular composition comprising oxygen to form an oxide film. The oxide film is exposed to nitrogen radicals formed by plasma induced dissociation of a second process gas comprising at least one molecular composition comprising nitrogen to nitridate the oxide film to form the interfacial layer. A high-k dielectric layer is formed on said interfacial layer.

2. 发明申请

WO2006104583A3 METHOD AND SYSTEM FOR INCREASING TENSILE STRESS IN A THIN FILM USING MULTI-FREQUENCY ELECTROMAGNETIC RADIATION 审中-公开
公开(公告)号：WO2006104583A3
公开(公告)日：2006-10-05
申请号：PCT/US2006/005433
申请日：2006-02-16
申请人： TOKYO ELECTRON LIMITED , IGETA, Masanobu , WAJDA, Cory , LEUSINK, Gert
发明人： IGETA, Masanobu , WAJDA, Cory , LEUSINK, Gert
IPC分类号： B29C65/00 , B29C65/02 , G02B26/00 , G02B26/08 , G02F1/35 , H01S3/10 , H01L21/00 , H01L21/469 , H01L23/58
摘要： A method and system are described for increasing the tensile stress in thin films formed on a substrate, such as silicon nitride films. The thin film may be a planar film, or a non-planar film, such as a nitride film formed over a NMOS gate. The thin film is exposed to electro-magnetic (EM) radiation, such as EM radiation having a wavelength component less than about 500 nm. The EM source can include a multi-frequency source of radiation. Additionally, the source of radiation is collimated in order to selectively treat regions of a non-planar film.

3. 发明申请

WO2006104582A2 METHOD AND SYSTEM FOR INCREASING TENSILE STRESS IN A THIN FILM USING COLLIMATED ELECTROMAGNETIC RADIATION 审中-公开
标题翻译：使用集合电磁辐射在薄膜中增加拉伸应力的方法和系统
公开(公告)号：WO2006104582A2
公开(公告)日：2006-10-05
申请号：PCT/US2006/005419
申请日：2006-02-16
申请人： TOKYO ELECTRON LIMITED , IGETA, Masanobu , WAJDA, Cory , LEUSINK, Gert
发明人： IGETA, Masanobu , WAJDA, Cory , LEUSINK, Gert
IPC分类号： H01L23/58 , C23C16/50 , H01L21/4757
CPC分类号： C23C16/56 , C23C16/345 , H01L21/3185 , H01L21/67115 , H01L21/67248 , H01L21/76825 , H01L21/76828 , H01L21/76829
摘要： A method and system are described for increasing the tensile stress in thin films formed on a substrate, such as silicon nitride films. The thin film may be a planar film, or a non-planar film, such as a nitride film formed over a NMOS gate. The thin film is exposed to collimated electro-magnetic (EM) radiation to anisotropically expose the film. The EM radiation can have a component having a wavelength less than about 500 nm. The EM source can include a multi-frequency source of radiation.
摘要翻译：描述了一种用于增加在诸如氮化硅膜之类的衬底上形成的薄膜中的拉伸应力的方法和系统。薄膜可以是平面薄膜，或非平面薄膜，例如在NMOS栅极上形成的氮化物薄膜。将薄膜暴露于准直的电磁（EM）辐射以各向异性地暴露膜。 EM辐射可以具有波长小于约500nm的分量。 EM源可以包括多频辐射源。

4. 发明申请

WO2006083380A2 METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：WO2006083380A2
公开(公告)日：2006-08-10
申请号：PCT/US2005/043293
申请日：2005-11-30
申请人： TOKYO ELECTRON LIMITED , WAJDA, Cory , LEUSINK, Gert
发明人： WAJDA, Cory , LEUSINK, Gert
IPC分类号： H01L21/84 , H01L21/26 , H01L21/425
CPC分类号： H01L21/02321 , H01L21/02123 , H01L21/02175 , H01L21/0234 , H01L21/28079 , H01L21/316 , H01L29/495
摘要： A method for treating a gate stack in the fabrication of a semiconductor device by providing a substrate containing a gate stack having a dielectric layer formed on the substrate and a metal-containing gate electrode layer formed on the high-k dielectric layer, forming low-energy excited dopant species from a process gas in a plasma, and exposing the gate stack to the excited dopant species to incorporate a dopant into the gate stack. The method can be utilized to tune the workfunction of the gate stack.
摘要翻译：一种在制造半导体器件中处理栅叠层的方法，其特征在于，提供一种基板，该基板含有形成在基板上的电介质层的栅叠层和形成在高k电介质层上的含金属的栅电极层，来自等离子体中的工艺气体的能量激发的掺杂剂物质，并且将栅极堆叠暴露于激发的掺杂物种类以将掺杂剂掺入到栅极堆叠中。该方法可用于调整栅极堆叠的功能。

5. 发明申请

WO2005103325A1 A METHOD FOR PROCESSING A SUBSTRATE 审中-公开
标题翻译：一种处理基板的方法
公开(公告)号：WO2005103325A1
公开(公告)日：2005-11-03
申请号：PCT/US2005/004905
申请日：2005-02-15
申请人： TOKYO ELECTRON LIMITED , INTERNATIONAL BUSINESS MACHINES CORPORATION , NAKAMURA, Kazuhito , WAJDA, Cory , MOSCA, Enrico , LEUSINK, Gert , MCFEELY, Fenton, R. , KAWANO, Yumiko , MALHOTRA, Sandra, G.
发明人： NAKAMURA, Kazuhito , WAJDA, Cory , MOSCA, Enrico , LEUSINK, Gert , MCFEELY, Fenton, R. , KAWANO, Yumiko , MALHOTRA, Sandra, G.
IPC分类号： C23C16/16
CPC分类号： C23C16/4581 , C23C16/16
摘要： A method for processing a substrate (25, 620, 720) on a ceramic substrate heater (20, 600, 700) in a process chamber (10). The method includes forming a protective coating (730, 790) on the ceramic substrate heater (20, 600, 700) in the process chamber (10) and processing a substrate (25, 620, 720) on the coated substrate heater. The processing can include providing a substrate (25, 620, 720) to be processed on the coated ceramic substrate heater, performing a process on the substrate (25, 620, 720) by exposing the substrate (25, 620, 720) to a process gas, and removing the processed substrate from the process chamber (10).
摘要翻译：一种用于在处理室（10）中的陶瓷衬底加热器（20,600,700）上处理衬底（25,620,720）的方法。该方法包括在处理室（10）中的陶瓷衬底加热器（20,600,700）上形成保护涂层（730,790）并且处理涂覆的衬底加热器上的衬底（25,620,720）。该处理可以包括提供在被涂覆的陶瓷基板加热器上待处理的基板（25,620,720），通过将基板（25,620,720）暴露于基板（25,620,720）到基板处理气体，以及从所述处理室（10）去除所述经处理的基板。

6. 发明申请

WO2005034181A2 METHOD FOR MONITORING STATUS OF SYSTEM COMPONENTS 审中-公开
标题翻译：监控系统组件状态的方法
公开(公告)号：WO2005034181A2
公开(公告)日：2005-04-14
申请号：PCT/US2004/028802
申请日：2004-09-21
申请人： TOKYO ELECTRON LIMITED , O'MEARA, David, L. , BURDETT, Daniel, Craig , CABRAL, Stephen, H. , LEUSINK, Gert , KOSTENKO, John, William , WAJDA, Cory
发明人： O'MEARA, David, L. , BURDETT, Daniel, Craig , CABRAL, Stephen, H. , LEUSINK, Gert , KOSTENKO, John, William , WAJDA, Cory
IPC分类号： H01L
CPC分类号： H01J37/32935 , G01N21/55 , G01N21/59
摘要： A method and system are provided for monitoring status of a system component in a process chamber of a batch type processing system. The method includes exposing a system component to light from a light source and monitoring interaction of the light with the system component to determine status of the system component. The method can detect light transmission and/or light reflection from a system component during a process that can include a chamber cleaning process, a chamber conditioning process, a substrate etching process, and a substrate film formation process. The system component can be a consumable system part such as a process tube, a shield, a ring, a baffle, and a liner, and can further contain a protective coating.
摘要翻译：提供了一种用于监视批处理系统的处理室中的系统组件的状态的方法和系统。该方法包括将系统组件暴露于来自光源的光并监测光与系统组件的相互作用以确定系统组件的状态。该方法可以在可以包括室清洁过程，室调节过程，基板蚀刻工艺和基板成膜工艺的过程中检测来自系统部件的光透射和/或光反射。系统组件可以是消耗系统部件，例如处理管，屏蔽，环，挡板和衬垫，并且还可以包含保护涂层。

7. 发明申请

WO2005104197A1 A METHOD OF FORMING A TANTALUM-CONTAINING GATE ELECTRODE STRUCTURE 审中-公开
标题翻译：一种形成含钛的电极结构的方法
公开(公告)号：WO2005104197A1
公开(公告)日：2005-11-03
申请号：PCT/US2005/004903
申请日：2005-02-15
申请人： TOKYO ELECTRON LIMITED , INTERNATIONAL BUSINESS MACHINES CORPORATION , NAKAMURA, Kazuhito , YAMASAKI, Hideaki , KAWANO, Yumiko , LEUSINK, Gert , MCFEELY, Fenton, R. , YURKAS, John, J. , NARAYANAN, Vijay
发明人： NAKAMURA, Kazuhito , YAMASAKI, Hideaki , KAWANO, Yumiko , LEUSINK, Gert , MCFEELY, Fenton, R. , YURKAS, John, J. , NARAYANAN, Vijay
IPC分类号： H01L21/28
CPC分类号： H01L21/28088 , H01L21/28194 , H01L29/4966 , H01L29/51 , H01L29/517
摘要： A method for forming a tantalum-containing gate electrode structure (250, 260, 270) by providing a substrate (50, 252, 262, 272) having a high-k dielectric layer (254, 264, 274) thereon in a process chamber (1) and forming a tantalum-containing layer (256, 266, 276) on the high-k dielectric layer (254, 264, 274) in a thermal chemical vapor deposition process by exposing the substrate (50, 252, 262, 272) to a process gas containing TAIMATA (Ta(N(CH 3 ) 2 ) 3 (NC(C 2 H 5 )(CH 3 ) 2 )) precursor gas. In one embodiment of the invention, the tantalum-containing layer (256, 266,276) can include a TaSiN layer (256, 266, 276) formed from a process gas containing TAIMATA precursor gas, a silicon containing gas, and optionally a nitrogen-containing gas. In another embodiment of the invention, a TaN layer (278) is formed on the TaSiN layer (276). The TaN layer (278) can be formed from a process gas containing TAIMATA precursor gas and optionally a nitrogen-containing gas. A computer readable medium (1202, 1204, 1207, 1208) executable by a processor (1203) to cause a processing system (100, 220, 230) to perform the method and a processing system (100, 220, 230) for forming a tantalum-containing gate electrode structure (250, 260, 270) are also provided.
摘要翻译：一种通过在处理室中提供具有高k电介质层（254,264,274）的衬底（50,252,262,272）来形成含钽栅电极结构（250,260,270）的方法，（1），并且在热化学气相沉积工艺中在高k电介质层（254,264,274）上形成含钽层（256,266,276），通过使衬底（50,252,262,272）暴露）到含有TAIMATA（Ta（N（CH 3）2）3（NC（C 2 H 5）（CH 3）2））前体气体的工艺气体。在本发明的一个实施例中，含钽层（256,266,276）可以包括由含有TAIMATA前体气体，含硅气体和任选含氮的工艺气体形成的TaSiN层（256,266,276）加油站。在本发明的另一实施例中，在TaSiN层（276）上形成TaN层（278）。 TaN层（278）可以由含有TAIMATA前体气体和任选的含氮气体的工艺气体形成。一种可由处理器（1203）执行以使处理系统（100,220,230）执行所述方法的计算机可读介质（1202,1204,1207,1208）和用于形成所述处理系统的处理系统（100,220,230）还提供了含钽栅极电极结构（250,260,270）。

8. 发明申请

WO2008042528A2 UV-ASSISTED DIELECTRIC FORMATION FOR DEVICES WITH STRAINED GERMANIUM-CONTAINING LAYERS 审中-公开
标题翻译：具有含锗含锗层的器件的UV辅助电介质形成
公开(公告)号：WO2008042528A2
公开(公告)日：2008-04-10
申请号：PCT/US2007/076937
申请日：2007-08-28
申请人： TOKYO ELECTRON LIMITED , LEUSINK, Gert
发明人： LEUSINK, Gert
IPC分类号： H01L31/00 , H01L21/336
CPC分类号： C23C16/30 , C23C16/24 , H01L21/28202 , H01L21/32105 , H01L21/3211 , H01L29/1054 , H01L29/495 , H01L29/4966 , H01L29/518 , H01L29/78
摘要： A method of forming a semiconductor device includes providing a substrate in a vacuum processing tool, the substrate having a strained Ge-containing layer on the substrate and a Si-containing layer on the strained Ge-containing layer, maintaining the substrate at a temperature less than 700°C, and exposing the Si- containing layer to oxidation radicals in an UV-assisted oxidation process to form a Si-containing dielectric layer while minimizing oxidation and strain relaxation in the underlying strained Ge-containing layer. A semiconductor device containing a substrate, a strained Ge-containing layer on the substrate, and a Si-containing dielectric layer formed on the strained Ge-containing layer is provided. The semiconductor device can further contain a gate electrode layer on the Si- containing dielectric layer or a high-k layer on the Si-containing dielectric layer and a gate electrode layer on the high-k layer.
摘要翻译：形成半导体器件的方法包括在真空处理工具中提供衬底，所述衬底在衬底上具有应变的Ge含有层，并且在应变的含Ge层上含有Si层，将衬底保持在较低的温度并且在UV辅助氧化工艺中将含Si层暴露于氧化基团以形成含Si的电介质层，同时使下层的应变Ge含量层中的氧化和应变弛豫最小化。提供了一种包含衬底，在衬底上的应变Ge含有层和形成在应变Ge含有层上的含Si电介质层的半导体器件。半导体器件还可以在含Si电介质层上的栅电极层或含Si介质层上的高k层和高k层上的栅极电极层上含有栅电极层。

9. 发明申请

WO2007126463A2 LOW-TEMPERATURE DIELECTRIC FORMATION FOR DEVICES WITH STRAINED GERMANIUM-CONTAINING CHANNELS 审中-公开
标题翻译：具有含锗含锗通道的器件的低温电介质形成
公开(公告)号：WO2007126463A2
公开(公告)日：2007-11-08
申请号：PCT/US2007/002438
申请日：2007-01-31
申请人： TOKYO ELECTRON LIMITED , LEUSINK, Gert
发明人： LEUSINK, Gert
IPC分类号： H01L21/20
CPC分类号： H01L21/3185 , H01L21/0214 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02252 , H01L21/02326 , H01L21/02332 , H01L21/0234 , H01L21/0245 , H01L21/02532 , H01L21/02664 , H01L21/3143 , H01L21/31662
摘要： A method of forming a semiconductor device includes providing a substrate in a vacuum processing tool, the substrate having a strained Ge- containing layer on the substrate and a Si layer on the strained Ge-containing layer, maintaining the substrate at a temperature less than 7000C, and generating a soft plasma in the vacuum processing tool. The Si layer is exposed to the soft plasma to form a Si-containing dielectric layer while minimizing oxidation and strain relaxation in the underlying strained Ge-containing layer. A semiconductor device containing a substrate, a strained Ge-containing layer on the substrate, and an Si-containing dielectric layer formed on the strained Ge- containing layer is provided. The semiconductor device can further contain a gate electrode layer on the Si-containing dielectric layer or a high-k layer on the Si- containing dielectric layer and a gate electrode layer on the high-k layer.
摘要翻译：形成半导体器件的方法包括在真空处理工具中提供衬底，所述衬底在衬底上具有应变的Ge含有层，并且在应变的含Ge层上形成Si层，将衬底保持在低于700℃的温度并且在真空处理工具中产生软等离子体。 Si层暴露于软质等离子体以形成含Si介电层，同时使下层的应变Ge含量层中的氧化和应变弛豫最小化。提供了一种包含衬底的半导体器件，在衬底上的应变Ge含有层和形成在应变含Ge层上的含Si电介质层。半导体器件还可以在含Si电介质层上的栅极电极层或含有Si的电介质层上的高k层和高k层上的栅电极层上包含栅极电极层。

10. 发明申请

WO2004065658A1 METHOD AND APPARATUS FOR REMOVING MATERIAL FROM CHAMBER AND WAFER SURFACES BY HIGH TEMPERATURE HYDROGEN-CONTAINING PLASMA 审中-公开
标题翻译：通过高温含氢等离子体从室和表面去除材料的方法和装置
公开(公告)号：WO2004065658A1
公开(公告)日：2004-08-05
申请号：PCT/US2004/000649
申请日：2004-01-12
申请人： TOKYO ELECTRON LIMITED , TOKYO ELECTRON ARIZONA, INC. , NEMOTO, Takenao , GUIDOTTI, Emmanuel , LEUSINK, Gert
发明人： NEMOTO, Takenao , GUIDOTTI, Emmanuel , LEUSINK, Gert
IPC分类号： C23C16/44
CPC分类号： H01L21/02046 , C23C16/0245 , C23C16/4405 , H01J37/321 , H01J37/32862 , H01L21/02063 , H01L21/76814 , Y02C20/30 , Y02P70/605
摘要： A cleaning method is provided using a cleaning gas mixture of hydrogen and inert gas, for example a mixture in which the hydrogen content is between 20 percent and 80 percent by volume, provided to the chamber (16) of a semiconductor wafer processing apparatus (10) and an ICP power source only to generate a high density plasma in the gas mixture without biasing the surface to be cleaned. In examples of the invention, Si and Si02 contaminants or CFx contaminants are cleaned from a silicon contact (46) prior to subsequent metal deposition. In another example of the invention, silicon residue is cleaned from internal chamber surfaces before oxide etching to recover the baseline oxide etch rate.
摘要翻译：使用氢和惰性气体的清洁气体混合物（例如其中氢含量为20体积％至80体积％之间的混合物）提供给半导体晶片处理设备（10）的室（16）提供清洁方法）和ICP电源，仅在气体混合物中产生高密度等离子体而不偏压要清洁的表面。在本发明的实施例中，在随后的金属沉积之前，从硅触点（46）清除Si和SiO 2污染物或CF x污染物。在本发明的另一个实例中，在氧化物蚀刻之前，从内室表面清除硅渣，以恢复基线氧化物蚀刻速率。

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