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1. 发明申请

WO2004063931A3 METHOD AND SYSTEM FOR OPTIMIZATION OF A DATA PROCESSING CHAIN USING SYNCHRONOUS HANDSHAKE PROTOCOL WITH DATA ASSEMBLY AND SEGMENTATION 审中-公开
标题翻译：使用数据汇编和分段的同步手段协议优化数据处理链的方法和系统
公开(公告)号：WO2004063931A3
公开(公告)日：2004-12-16
申请号：PCT/IB2004000837
申请日：2004-01-16
申请人： VELEZ DIDIER , ROLLAND SOPHIE , LE GLANIC JEAN-PIERRE , THOMSON LICENSING SA
发明人： VELEZ DIDIER , ROLLAND SOPHIE , LE GLANIC JEAN-PIERRE
IPC分类号： G06F13/40
CPC分类号： G06F13/40
摘要： A format adaptation apparatus (82) for optimizing a data processing chain using synchronous handshake protocol by adapting the data format between an upstream block (52) having a upstream data format and generating an upstream Ready To Send ("RTS") signal, and a downstream block (54) having a downstream data format and generating a downstream Ready To Receive ("RTR") signal. The format adaptation apparatus (82) including a data pipeline (200, 400) configured to receive data words from the upstream block (52) in the upstream data format and to send the data words to the downstream block (54) in the downstream data format, a counter (220, 450) configured to generate a COUNT signal that indicates the number of data words in the data pipeline (200, 400); a RTR assembly (250, 520) configured to receive the COUNT signal and to generate an upstream adaptation RTR signal when the data pipeline (200, 400) is ready to receive data from the upstream block (52); a RTS assembly (320, 540) configured to receive the COUNT signal and to generate a downstream adaptation RTS signal when the data pipeline (200, 400) is ready to send data to the downstream block (54); an upstream handshake assembly (230, 430) configured to generate an input handshake signal (IN _HS) when both the upstream RTS signal and the upstream adaptation RTR signal are active; and a downstream handshake assembly (240, 440) configured to generate an output handshake signal (OUT _HS) when both the downstream RTR signal and the downstream adaptation RTS signal are active. The data word is received by the data pipeline (200, 400) when the IN _HS signal is generated, and the data word is sent by the data pipeline (200, 400) when the OUT_HS signal is generated.
摘要翻译：一种格式自适应装置（82），用于通过在具有上行数据格式的上行块（52）和生成上行准备发送（“RTS”）信号之间适配数据格式来优化使用同步握手协议的数据处理链，以及下游块（54）具有下行数据格式并产生下行准备接收（“RTR”）信号。格式适配装置（82）包括数据流水线（200,400），配置为以上游数据格式从上游块（52）接收数据字，并将数据字发送到下游数据块（54）被配置为产生指示数据流水线（200,400）中的数据字数量的COUNT信号的计数器（220,450）; RTR组件（250,520）被配置为当所述数据流水线（200,400）准备好从所述上游块（52）接收数据时，接收所述COUNT信号并产生上游适配RTR信号; RTS组件（320,540）被配置为当数据流水线（200,400）准备好向下游块（54）发送数据时，接收COUNT信号并产生下游适配RTS信号; 上游握手组件（230,430），被配置为当上游RTS信号和上游适配RTR信号都有效时产生输入握手信号（IN _HS）; 以及下游握手组件（240,440），被配置为当下游RTR信号和下游自适应RTS信号都有效时产生输出握手信号（OUT_HS）。当生成IN_HS信号时，由数据流水线（200,400）接收数据字，并且当产生OUT_HS信号时，由数据流水线（200,400）发送数据字。

2. 发明申请

WO2004063836A3 METHOD AND SYSTEM FOR CLOCK DOMAIN CROSSING AND FORMAT ADAPTATION USING SYNCHRONOUS HANDSHAKE PROTOCOL 审中-公开
标题翻译：使用同步汉斯协议的时域交叉和格式适应方法与系统
公开(公告)号：WO2004063836A3
公开(公告)日：2005-07-28
申请号：PCT/IB2004001190
申请日：2004-01-16
申请人： VELEZ DIDIER , ROLLAND SOPHIE , LE GLANIC JEAN-PIERRE , THOMSON LICENSING SA
发明人： VELEZ DIDIER , ROLLAND SOPHIE , LE GLANIC JEAN-PIERRE
IPC分类号： G06F20060101 , G06F13/40
CPC分类号： G06F13/4059 , Y02D10/14 , Y02D10/151
摘要： A method for optimizing a data processing chain using synchronous handshake protocol by adapting the operating frequency and the data format between an upstream block, having an upstream operating frequency and an upstream data format, and a downstream block, having a downstream operating frequency and a downstream data format. The upstream block generates an upstream RTS signal and an upstream clock signal, and the downstream block generates a downstream RTR signal and a downstream clock signal. The method of the present invention comprises the steps of: receiving the upstream RTS signal, the upstream clock signal, the downstream RTR signal and the downstream clock signal; generating an upstream adaptation RTR signal when ready to receive data from the upstream block; receiving data from the upstream block in the upstream data format when the upstream adaptation RTR signal are active; transforming the data from the upstream data format to the downstream data format; generating a downstream adaptation RTS signal when ready to send data to the downstream block; and sending the data to the downstream block in the downstream data format when the downstream RTR signal and the downstream adaptation RTR signal are active.
摘要翻译：一种用于使用同步握手协议来优化数据处理链的方法，该方法通过在具有上游工作频率和上行数据格式的上游块与具有下游工作频率和下行流的下游块之间进行操作频率和数据格式的调整数据格式。上游模块生成上游RTS信号和上行时钟信号，下游模块产生下行RTR信号和下行时钟信号。本发明的方法包括以下步骤：接收上行RTS信号，上行时钟信号，下行RTR信号和下行时钟信号; 当准备好从上游块接收数据时产生上游适配RTR信号; 当上游适配RTR信号有效时，以上游数据格式从上游块接收数据; 将数据从上游数据格式转换为下游数据格式; 当准备好向下游块发送数据时产生下游适配RTS信号; 并且当下行RTR信号和下游适配RTR信号有效时，以下游数据格式向下游块发送数据。

3. 发明申请

WO2004012405A2 PACKET SIGNAL PROCESSING ARCHITECTURE 审中-公开
标题翻译：分组信号处理架构
公开(公告)号：WO2004012405A2
公开(公告)日：2004-02-05
申请号：PCT/US0323554
申请日：2003-07-25
申请人： THOMSON LICENSING SA , LOPEZ PATRICK , VELEZ DIDIER , DEMOULIN VINCENT
发明人： LOPEZ PATRICK , VELEZ DIDIER , DEMOULIN VINCENT
IPC分类号： H04L12/56 , H04L29/06
CPC分类号： H04L1/0025 , H04L29/06 , H04L49/351 , H04L69/12 , H04L69/18 , H04L69/22
摘要： A system for processing data packets comprising a plurality of data processing blocks and a controller, which allows the configuration parameters used in processing the data blocks to be updated in each data processing blocks at the data packet boundary. The present invention involves a system that utilizes a handshaking method for synchronously exchanging data between data processing blocks, wherein the data processing blocks update configuration parameters based on the type of networking standard used. Each data processing block identifies a first data block in the data packet and transmits a first data signal along with a first output data block of the data packet, wherein the block updates the configuration parameters from the controller only when the first data signal is present. In this manner, the first data signal, which is indicative of the data packet boundary, is propagated along the sequence of data processing blocks.
摘要翻译：一种用于处理数据包的系统，包括多个数据处理块和控制器，其允许在数据分组边界的每个数据处理块中更新用于处理数据块的配置参数。本发明涉及利用握手方法在数据处理块之间同步交换数据的系统，其中数据处理块基于所使用的联网标准的类型来更新配置参数。每个数据处理块识别数据分组中的第一数据块，并且与数据分组的第一输出数据块一起发送第一数据信号，其中，仅当存在第一数据信号时，该块才从控制器更新配置参数。以这种方式，指示数据分组边界的第一数据信号沿着数据处理块的序列被传播。

4. 发明申请

WO2004063931A8 METHOD AND SYSTEM FOR OPTIMIZATION OF A DATA PROCESSING CHAIN USING SYNCHRONOUS HANDSHAKE PROTOCOL WITH DATA ASSEMBLY AND SEGMENTATION 审中-公开
标题翻译：使用数据汇编和分段的同步手段协议优化数据处理链的方法和系统
公开(公告)号：WO2004063931A8
公开(公告)日：2005-05-06
申请号：PCT/IB2004000837
申请日：2004-01-16
申请人： VELEZ DIDIER , ROLLAND SOPHIE , LE GLANIC JEAN-PIERRE , THOMSON LICENSING SA
发明人： VELEZ DIDIER , ROLLAND SOPHIE , LE GLANIC JEAN-PIERRE
IPC分类号： G06F13/40
CPC分类号： G06F13/40
摘要： A format adaptation apparatus (82) for optimizing a data processing chain using synchronous handshake protocol by adapting the data format between an upstream block (52) having a upstream data format and generating an upstream Ready To Send ("RTS") signal, and a downstream block (54) having a downstream data format and generating a downstream Ready To Receive ("RTR") signal. The format adaptation apparatus (82) including a data pipeline (200, 400) configured to receive data words from the upstream block (52) in the upstream data format and to send the data words to the downstream block (54) in the downstream data format, a counter (220, 450) configured to generate a COUNT signal that indicates the number of data words in the data pipeline (200, 400); a RTR assembly (250, 520) configured to receive the COUNT signal and to generate an upstream adaptation RTR signal when the data pipeline (200, 400) is ready to receive data from the upstream block (52); a RTS assembly (320, 540) configured to receive the COUNT signal and to generate a downstream adaptation RTS signal when the data pipeline (200, 400) is ready to send data to the downstream block (54); an upstream handshake assembly (230, 430) configured to generate an input handshake signal (IN _HS) when both the upstream RTS signal and the upstream adaptation RTR signal are active; and a downstream handshake assembly (240, 440) configured to generate an output handshake signal (OUT _HS) when both the downstream RTR signal and the downstream adaptation RTS signal are active. The data word is received by the data pipeline (200, 400) when the IN _HS signal is generated, and the data word is sent by the data pipeline (200, 400) when the OUT_HS signal is generated.
摘要翻译：一种格式适配装置（82），用于通过在具有上行数据格式的上游块（52）和生成上行准备发送（“RTS”）信号之间适配数据格式来优化使用同步握手协议的数据处理链，以及下游块（54）具有下行数据格式并产生下行准备接收（“RTR”）信号。格式适配装置（82）包括数据流水线（200,400），配置为以上游数据格式从上游块（52）接收数据字，并将数据字发送到下游数据中的下游块（54）被配置为产生指示数据流水线（200,400）中的数据字数量的COUNT信号的计数器（220,450）; 配置为当所述数据流水线（200,400）准备好从所述上游块（52）接收数据时，RTR组件（250,520）被配置为接收所述COUNT信号并产生上游适配RTR信号; 配置为当所述数据流水线（200,400）准备好向所述下游块（54）发送数据时，RTS组件（320,540）接收所述COUNT信号并产生下游适配RTS信号; 上游握手组件（230,430），被配置为当上游RTS信号和上游适配RTR信号都有效时产生输入握手信号（IN _HS）; 以及下游握手组件（240,440），被配置为当下游RTR信号和下游自适应RTS信号都有效时产生输出握手信号（OUT _HS）。当生成IN_HS信号时，由数据流水线（200,400）接收数据字，并且当产生OUT_HS信号时，数据字由数据流水线（200,400）发送。

5. 发明申请

WO2004012405A9 PACKET PROCESSING ARCHITECTURE 审中-公开
标题翻译：分组处理体系结构
公开(公告)号：WO2004012405A9
公开(公告)日：2004-07-15
申请号：PCT/US0323554
申请日：2003-07-25
申请人： THOMSON LICENSING SA , LOPEZ PATRICK , VELEZ DIDIER , DEMOULIN VINCENT
发明人： LOPEZ PATRICK , VELEZ DIDIER , DEMOULIN VINCENT
IPC分类号： H04L12/56 , H04L29/06
CPC分类号： H04L1/0025 , H04L29/06 , H04L49/351 , H04L69/12 , H04L69/18 , H04L69/22
摘要： A system for processing data packets comprising a plurality of data processing blocks and a controller, which allows the configuration parameters used in processing the data blocks to be updated in each data processing blocks at the data packet boundary. The present invention involves a system that utilizes a handshaking method for synchronously exchanging data between data processing blocks, wherein the data processing blocks update configuration parameters based on the type of networking standard used. Each data processing block identifies a first data block in the data packet and transmits a first data signal along with a first output data block of the data packet, wherein the block updates the configuration parameters from the controller only when the first data signal is present. In this manner, the first data signal, which is indicative of the data packet boundary, is propagated along the sequence of data processing blocks.
摘要翻译：一种用于处理包括多个数据处理块和控制器的数据分组的系统，其允许在数据分组边界处的每个数据处理块中更新用于处理数据块的配置参数。本发明涉及一种利用握手方法在数据处理块之间同步交换数据的系统，其中数据处理块根据所使用的网络标准的类型来更新配置参数。每个数据处理块标识数据分组中的第一数据块并且与数据分组的第一输出数据块一起发送第一数据信号，其中该块仅在第一数据信号存在时才从控制器更新配置参数。以这种方式，指示数据分组边界的第一数据信号沿着数据处理模块序列传播。

6. 发明专利

BR0302844A 未知
公开(公告)号：BR0302844A
公开(公告)日：2004-04-27
申请号：BR0302844
申请日：2003-01-22
申请人： THOMSON LICENSING SA
发明人： LITWIN LOUIS ROBERT , VELEZ DIDIER
IPC分类号： G06F11/10 , G11B20/18 , H03M13/15 , H04L1/00
摘要： A decoder and decoding method are described, in which a syndrome is calculated from a codeword in a syndrome generator, an error polynomial is generated based upon the syndrome in an error polynomial generator, an error location is determined from the error polynomial in the error location generator, an error magnitude is calculated from the error polynomial in the error magnitude generator and the codeword is corrected by a error corrected codeword generator responsive to location and error magnitude. An intra-decoder block messaging scheme is described in which one or more components generate inactivity messages to signal an ability to process data corresponding to a next codeword. A dual Chien search block implementation is described in which Chien block is used to determine the number of errors corresponding to a specified codeword, separately from error location and magnitude calculations performed by the Chien/Forney block. An enhanced Chien search cell architecture is described which utilizes an additional Galois field adder to synchronize the codeword and error vector, thereby decreasing delay and expense corresponding to an error correcting block implemented with a LIFO register.

7. 发明专利

BR0302821A 未知
公开(公告)号：BR0302821A
公开(公告)日：2004-04-27
申请号：BR0302821
申请日：2003-01-22
申请人： THOMSON LICENSING SA
发明人： LITWIN LOUIS ROBERT , VELEZ DIDIER
IPC分类号： G06F11/10 , G11B20/18 , H03M13/15 , H04L1/00 , H03M13/00
摘要： A decoder and decoding method are described, in which a syndrome is calculated from a codeword in a syndrome generator, an error polynomial is generated based upon the syndrome in an error polynomial generator, an error location is determined from the error polynomial in the error location generator, an error magnitude is calculated from the error polynomial in the error magnitude generator and the codeword is corrected by a error corrected codeword generator responsive to location and error magnitude. An intra-decoder block messaging scheme is described in which one or more components generate inactivity messages to signal an ability to process data corresponding to a next codeword. A dual Chien search block implementation is described in which Chien block is used to determine the number of errors corresponding to a specified codeword, separately from error location and magnitude calculations performed by the Chien/Forney block. An enhanced Chien search cell architecture is described which utilizes an additional Galois field adder to synchronize the codeword and error vector, thereby decreasing delay and expense corresponding to an error correcting block implemented with a LIFO register.

8. 发明专利

AU2003256938A1 PACKET SIGNAL PROCESSING ARCHITECTURE 未知
公开(公告)号：AU2003256938A1
公开(公告)日：2004-02-16
申请号：AU2003256938
申请日：2003-07-25
申请人： THOMSON LICENSING SA
发明人： LOPEZ PATRICK , VELEZ DIDIER , DEMOULIN VINCENT
IPC分类号： H04L12/56 , H04L29/06
摘要： A system for processing data packets comprising a plurality of data processing blocks and a controller, which allows the configuration parameters used in processing the data blocks to be updated in each data processing blocks at the data packet boundary. The present invention involves a system that utilizes a handshaking method for synchronously exchanging data between data processing blocks, wherein the data processing blocks update configuration parameters based on the type of networking standard used. Each data processing block identifies a first data block in the data packet and transmits a first data signal along with a first output data block of the data packet, wherein the block updates the configuration parameters from the controller only when the first data signal is present. In this manner, the first data signal, which is indicative of the data packet boundary, is propagated along the sequence of data processing blocks.

9. 发明专利

MXPA05001183A ARQUITECTURA DE PROCESAMIENTO DE SENAL EN PAQUETES. 未知
公开(公告)号：MXPA05001183A
公开(公告)日：2005-05-16
申请号：MXPA05001183
申请日：2003-07-25
申请人： THOMSON LICENSING SA
发明人： VELEZ DIDIER
IPC分类号： H04L29/06 , H04L12/56
摘要： Un sistema para procesar paquetes de datos comprendiendo una pluralidad de bloques de procesamiento de datos y un controlador, que permite que los parametros de configuracion utilizados en el procesamiento de bloques de datos se actualicen en cada bloque de procesamiento de datos en el limite del paquete de datos. La presente invencion incluye un sistema que utiliza un metodo de dialogo para intercambiar datos de manera sincronica entre bloques de procesamiento de datos, en donde los bloques de procesamiento de datos actualizan los parametros de configuracion en base al tipo de estandar de red utilizado. Cada bloque de procesamiento de datos identifica un primer bloque de datos en el paquete de datos y transmite una primera senal de datos junto con un primer bloque de datos de salida del paquete de datos, en donde el bloque actualiza los parametros de configuracion del controlador solamente cuando la primera senal de datos esta presente. De esta manera, la primera senal de datos, que es indicativa del limite de paquete de datos, se propaga a lo largo de la secuencia de bloques de procesamiento de datos.

10. 发明专利

BR0302820A 未知
公开(公告)号：BR0302820A
公开(公告)日：2004-03-09
申请号：BR0302820
申请日：2003-01-22
申请人： THOMSON LICENSING SA
发明人： LITWIN LOUIS ROBERT , VELEZ DIDIER
IPC分类号： G06F11/10 , G11B20/18 , H03M13/15 , H03M13/29 , H04L1/00 , H03M13/00
摘要： A decoder and decoding method are described, in which a syndrome is calculated from a codeword in a syndrome generator, an error polynomial is generated based upon the syndrome in an error polynomial generator, an error location is determined from the error polynomial in the error location generator, an error magnitude is calculated from the error polynomial in the error magnitude generator and the codeword is corrected by a error corrected codeword generator responsive to location and error magnitude. An intra-decoder block messaging scheme is described in which one or more components generate inactivity messages to signal an ability to process data corresponding to a next codeword. A dual Chien search block implementation is described in which Chien block is used to determine the number of errors corresponding to a specified codeword, separately from error location and magnitude calculations performed by the Chien/Forney block. An enhanced Chien search cell architecture is described which utilizes an additional Galois field adder to synchronize the codeword and error vector, thereby decreasing delay and expense corresponding to an error correcting block implemented with a LIFO register.

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