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1. 发明授权

US09916449B2 Identification of backdoors and backdoor triggers 有权
公开(公告)号：US09916449B2
公开(公告)日：2018-03-13
申请号：US14773104
申请日：2013-11-12
申请人： THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK , Lakshminarasimhan Sethumadhavan , Adam Waksman , Matthew Suozzo
发明人： Lakshminarasimhan Sethumadhavan , Adam Waksman , Matthew Suozzo
IPC分类号： G06F21/56 , G06F21/71 , H04L29/06 , G06F11/263
CPC分类号： G06F21/566 , G06F11/263 , G06F21/56 , G06F21/71 , H04L63/1466
摘要： Disclosed are devices, systems, apparatus, methods, products, media, and other implementations, including a method that includes computing for one or more inputs of a circuit associated metrics representative of degree of influence that values of each of the one or more inputs have on at least one output dependent on the one or more inputs, and determining based, at least in part, on the computed metrics associated with the one or more inputs of a more inputs whether the at least one output dependent on the one or more inputs is part of a potentially malicious implementation.

2. 发明授权

US10599847B2 Implementations to facilitate hardware trust and security 有权
公开(公告)号：US10599847B2
公开(公告)日：2020-03-24
申请号：US16040763
申请日：2018-07-20
申请人： The Trustees of Columbia University in the City of New York
发明人： Lakshminarasimhan Sethumadhavan , Adam Waksman
IPC分类号： G06F21/57 , G06F21/87
摘要： Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes triggering a beacon circuit combined with a hardware-based protection module, included within a hardware device, the hardware-based protection module configured to provide protection against malicious implementations within the hardware device, with the beacon circuit being configured to provide a beacon output when triggered. The method further includes determining based on the beacon output provided by the triggered beacon circuit whether the hardware device includes at least one malicious implementation.

3. 发明授权

US10055587B2 Implementations to facilitate hardware trust and security 有权
公开(公告)号：US10055587B2
公开(公告)日：2018-08-21
申请号：US15105087
申请日：2014-12-19
申请人： THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
发明人： Lakshminarasimhan Sethumadhavan , Adam Waksman
IPC分类号： G06F21/87 , G06F21/57
CPC分类号： G06F21/57 , G06F21/87 , G06F2221/034
摘要： Disclosed are devices, systems, apparatus, methods, products, media and other implementations, including a method that includes triggering a beacon circuit combined with a hardware-based protection module, included within a hardware device, the hardware-based protection module configured to provide protection against malicious implementations within the hardware device, with the beacon circuit being configured to provide a beacon output when triggered. The method further includes determining based on the beacon output provided by the triggered beacon circuit whether the hardware device includes at least one malicious implementation.

4. 发明申请

US20130061322A1 Systems and Methods for Detecting Design-Level Attacks Against a Digital Circuit 有权
标题翻译：用于检测针对数字电路的设计级攻击的系统和方法
公开(公告)号：US20130061322A1
公开(公告)日：2013-03-07
申请号：US13580121
申请日：2011-02-28
申请人： Lakshminarasimhan Sethumadhavan , Adam Waksman
发明人： Lakshminarasimhan Sethumadhavan , Adam Waksman
IPC分类号： G06F21/00
CPC分类号： G06F21/554 , G06F9/30145 , G06F9/3867 , G06F12/14 , G06F15/16 , G06F21/00 , G06F21/71 , G06F2221/2101
摘要： Systems and methods for detecting design-level attacks against a digital circuit which includes various functional units. A target unit is selected from among the functional units for monitoring and a predictor unit is arranged to receive events before they reach the target unit. A reactor unit is selected from among the functional units of the digital circuit which are arranged to receive events after they pass through the target unit. A monitor unit is arranged to receive predicted event messages from the predictor unit and actual event messages from the reactor unit. The monitor unit is configured to indicate an alarm based on a comparison of the predicted event messages received from the predictor unit and the actual event messages received from the reactor unit.
摘要翻译：用于检测包括各种功能单元的数字电路的设计级别攻击的系统和方法。从用于监视的功能单元中选择目标单元，并且预测单元布置成在到达目标单元之前接收事件。从数字电路的功能单元中选择反应器单元，其被布置成在它们通过目标单元之后接收事件。监视器单元布置成从预测器单元接收预测的事件消息和来自反应器单元的实际事件消息。监视器单元被配置为基于从预测器单元接收的预测事件消息与从反应器单元接收的实际事件消息的比较来指示警报。

5. 发明申请

US20120124393A1 System and Methods for Silencing Hardware Backdoors 有权
标题翻译：静音硬件后门的系统和方法
公开(公告)号：US20120124393A1
公开(公告)日：2012-05-17
申请号：US13273016
申请日：2011-10-13
申请人： Lakshminarasimhan SETHUMADHAVAN , Adam Waksman
发明人： Lakshminarasimhan SETHUMADHAVAN , Adam Waksman
IPC分类号： G06F21/02 , G06F1/24 , G06F1/26
CPC分类号： H04L9/002 , G06F21/76 , H04L9/008 , H04L2209/16
摘要： Methods for preventing activation of hardware backdoors installed in a digital circuit, the digital circuit comprising one or more hardware units to be protected. A timer is repeatedly initiated for a period less than a validation epoch, and the hardware units are reset upon expiration of the timer to prevent activation of a time-based backdoor. Data being sent to the hardware unit is encrypted in an encryption element to render it unrecognizable to a single-shot cheat code hardware backdoor present in the hardware unit. The instructions being sent to the hardware unit are reordered randomly or pseudo-randomly, with determined sequential restraints, using an reordering element, to render an activation instruction sequence embedded in the instructions unrecognizable to a sequence cheat code hardware backdoor present in the hardware unit.
摘要翻译：用于防止安装在数字电路中的硬件后门的激活的方法，所述数字电路包括要被保护的一个或多个硬件单元。定时器在小于验证时期的周期内重复启动，并且硬件单元在计时器到期时复位，以防止启动基于时间的后门。被发送到硬件单元的数据在加密元素中被加密，以使它无法识别到存在于硬件单元中的单一作弊代码硬件后门。发送到硬件单元的指令被随机地或伪随机地重新排序，使用重新排序元素确定的顺序限制来呈现嵌入在硬件单元中存在的序列作弊码硬件后门的无法识别的指令中的激活指令序列。

6. 发明授权

US09098700B2 Systems and methods for detecting attacks against a digital circuit 有权
标题翻译：用于检测对数字电路的攻击的系统和方法
公开(公告)号：US09098700B2
公开(公告)日：2015-08-04
申请号：US13580121
申请日：2011-02-28
申请人： Lakshminarasimhan Sethumadhavan , Adam Waksman
发明人： Lakshminarasimhan Sethumadhavan , Adam Waksman
IPC分类号： G06F21/00 , G06F21/55 , G06F9/30 , G06F9/38 , G06F21/71 , G06F15/16 , G06F12/14
CPC分类号： G06F21/554 , G06F9/30145 , G06F9/3867 , G06F12/14 , G06F15/16 , G06F21/00 , G06F21/71 , G06F2221/2101
摘要： Systems and methods for detecting design-level attacks against a digital circuit which includes various functional units. A target unit is selected from among the functional units for monitoring and a predictor unit is arranged to receive events before they reach the target unit. A reactor unit is selected from among the functional units of the digital circuit which are arranged to receive events after they pass through the target unit. A monitor unit is arranged to receive predicted event messages from the predictor unit and actual event messages from the reactor unit. The monitor unit is configured to indicate an alarm based on a comparison of the predicted event messages received from the predictor unit and the actual event messages received from the reactor unit.
摘要翻译：用于检测包括各种功能单元的数字电路的设计级别攻击的系统和方法。从用于监视的功能单元中选择目标单元，并且预测单元布置成在到达目标单元之前接收事件。从数字电路的功能单元中选择反应器单元，其被布置成在它们通过目标单元之后接收事件。监视器单元布置成从预测器单元接收预测的事件消息和来自反应器单元的实际事件消息。监视器单元被配置为基于从预测器单元接收的预测事件消息与从反应器单元接收的实际事件消息的比较来指示警报。

7. 发明授权

US09325493B2 System and methods for silencing hardware backdoors 有权
公开(公告)号：US09325493B2
公开(公告)日：2016-04-26
申请号：US14671905
申请日：2015-03-27
申请人： Lakshminarasimhan Sethumadhavan , Adam Waksman
发明人： Lakshminarasimhan Sethumadhavan , Adam Waksman
IPC分类号： H04L29/06 , G06F11/00 , G06F12/16 , G08B23/00 , H04L9/00 , G06F21/76
CPC分类号： H04L9/002 , G06F21/76 , H04L9/008 , H04L2209/16
摘要： Methods for preventing activation of hardware backdoors installed in a digital circuit, the digital circuit comprising one or more hardware units to be protected. A timer is repeatedly initiated for a period less than a validation epoch, and the hardware units are reset upon expiration of the timer to prevent activation of a time-based backdoor. Data being sent to the hardware unit is encrypted in an encryption element to render it unrecognizable to a single-shot cheat code hardware backdoor present in the hardware unit. The instructions being sent to the hardware unit are reordered randomly or pseudo-randomly, with determined sequential restraints, using an reordering element, to render an activation instruction sequence embedded in the instructions unrecognizable to a sequence cheat code hardware backdoor present in the hardware unit.

8. 发明授权

US09037895B2 System and methods for silencing hardware backdoors 有权
标题翻译：用于消除硬件后门的系统和方法
公开(公告)号：US09037895B2
公开(公告)日：2015-05-19
申请号：US13273016
申请日：2011-10-13
申请人： Lakshminarasimhan Sethumadhavan , Adam Waksman
发明人： Lakshminarasimhan Sethumadhavan , Adam Waksman
IPC分类号： G06F1/04 , G06F21/76
CPC分类号： H04L9/002 , G06F21/76 , H04L9/008 , H04L2209/16
摘要： Methods for preventing activation of hardware backdoors installed in a digital circuit, the digital circuit comprising one or more hardware units to be protected. A timer is repeatedly initiated for a period less than a validation epoch, and the hardware units are reset upon expiration of the timer to prevent activation of a time-based backdoor. Data being sent to the hardware unit is encrypted in an encryption element to render it unrecognizable to a single-shot cheat code hardware backdoor present in the hardware unit. The instructions being sent to the hardware unit are reordered randomly or pseudo-randomly, with determined sequential restraints, using an reordering element, to render an activation instruction sequence embedded in the instructions unrecognizable to a sequence cheat code hardware backdoor present in the hardware unit.
摘要翻译：用于防止安装在数字电路中的硬件后门的激活的方法，所述数字电路包括要被保护的一个或多个硬件单元。定时器在小于验证时期的周期内重复启动，并且硬件单元在计时器到期时复位，以防止启动基于时间的后门。被发送到硬件单元的数据在加密元素中被加密，以使它无法识别到存在于硬件单元中的单一作弊代码硬件后门。发送到硬件单元的指令被随机地或伪随机地重新排序，使用重新排序元素确定的顺序限制来呈现嵌入在硬件单元中存在的序列作弊码硬件后门的无法识别的指令中的激活指令序列。

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