专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

EP0808023B1 Current bit cell and switched current network formed of such cells 失效
标题翻译：当前位，并用这样的细胞功率交换网络
公开(公告)号：EP0808023B1
公开(公告)日：2005-07-20
申请号：EP97401063.9
申请日：1997-05-13
申请人： TEXAS INSTRUMENTS FRANCE , TEXAS INSTRUMENTS INCORPORATED
发明人： Carbou, Pierre , Guignon, Pascal
IPC分类号： H03K5/24
CPC分类号： H03K5/2481

2. 发明公开

EP1189347A1 Electronically trimmed VCO 审中-公开
标题翻译： Elektronisch abgeglichener spannungsgesteuerter Oszillator
公开(公告)号：EP1189347A1
公开(公告)日：2002-03-20
申请号：EP00402561.5
申请日：2000-09-15
申请人： TEXAS INSTRUMENTS FRANCE , Texas Instruments Incorporated
发明人： Bisanti, Biagio, RES Les Terasses d'Antibes , Coppola, Francesco , Guignon, Pascal
IPC分类号： H03J5/24 , H03B5/08 , H03L7/099
CPC分类号： H03L7/113 , H03B5/1243 , H03B5/1265 , H03B5/1293 , H03J5/246 , H03L7/099
摘要： A voltage controlled oscillator (38) includes an LC tank (20) and a capacitor bank (21). LC tank (20) includes an inductor (12) and a varactor (14). The capacitive output of the varactor is controlled by a control voltage ν. To electronically tune the voltage controlled oscillator, a set of capacitors (24) in the capacitor bank (21) are enabled by a digital control signal based on a frequency comparison with a desired frequency. Once the capacitor bank is set, the frequency can be locked at the desired frequency by the phase lock loop.
摘要翻译：压控振荡器（38）包括LC箱（20）和电容器组（21）。 LC箱（20）包括电感器（12）和变容二极管（14）。变容二极管的电容输出由控制电压nu控制。为了电压调节压控振荡器，电容器组（21）中的一组电容器（24）通过基于与期望频率的频率比较的数字控制信号来启动。一旦电容器组置位，频率可以通过锁相环锁定在所需的频率。

3. 发明公开

EP0603077A1 Controlled delay digital clock signal generator 失效
标题翻译：数字仪器仪表仪器Verzögerung。
公开(公告)号：EP0603077A1
公开(公告)日：1994-06-22
申请号：EP93403059.4
申请日：1993-12-16
申请人： TEXAS INSTRUMENTS FRANCE , TEXAS INSTRUMENTS INCORPORATED
发明人： Carbou, Pierre , Guignon, Pascal
IPC分类号： H03K5/15 , H03K4/00
CPC分类号： H03K4/00 , H03K5/15073
摘要： Controlled delay digital clock signal generator, characterized in that it comprises means (I5, I6, I7, I8, I9, I10, IT7, IT8, IT9, IT10, C4) to generate from a clock signal (CK) and its complementary signal (CKB) a ramp signal comprising at least two segments of positive slope and at least two segments of negative slope, means (I1, I2, IT1, IT2, IT3, C2, CET1T2, AMPLI, I3, I4, IT4, IT5, IT6, C3, CET3T4, AMPL2) for separate control of the slopes of the said segments, means with trigger circuits (AMPLO) for converting the ramp signal (RAMP) into a square signal (CKQ) means (NO0, A0, A1, NO1) for achieving the logic combinations of the delayed square clock signal (CKQ) resulting from the conversion with the clock signal (CK) and the clock complementary clock signal (CKB) of the said clock signal to obtain as many delayed digital clock signals as the ramp signal has segments of different slopes.
摘要翻译：控制延迟数字时钟信号发生器，其特征在于它包括从时钟信号（CK）及其互补信号（CK）产生的装置（I5，I6，I7，I8，I9，I10，IT7，IT8，IT9，IT10，C4） CKB）包括至少两个正斜率段和至少两个负斜率段的斜坡信号，所述斜坡信号装置（I1，I2，IT1，IT2，IT3，C2，CET1T2，AMPLI，I3，I4，IT4，IT5，IT6， C3，CET3T4，AMPL2），用于单独控制所述段的斜率的装置，具有用于将斜坡信号（RAMP）转换成方波信号（CKQ）的触发电路（AMPLO）装置（NO0，A0，A1，NO1）实现与时钟信号（CK）的转换和所述时钟信号的时钟互补时钟信号（CKB）产生的延迟平方时信号（CKQ）的逻辑组合，以获得与斜坡信号相同的延迟的数字时钟信号有不同坡度的段。

4. 发明授权

EP0603077B1 Controlled delay digital clock signal generator 失效
标题翻译：数字时钟发生器控制延迟
公开(公告)号：EP0603077B1
公开(公告)日：1998-08-26
申请号：EP93403059.4
申请日：1993-12-16
申请人： TEXAS INSTRUMENTS FRANCE , TEXAS INSTRUMENTS INCORPORATED
发明人： Carbou, Pierre , Guignon, Pascal
IPC分类号： H03K5/15 , H03K4/00
CPC分类号： H03K4/00 , H03K5/15073

5. 发明公开

EP0601935A1 Controlled delay circuit 失效
标题翻译： GesteuerteVerzögerungsschaltung。
公开(公告)号：EP0601935A1
公开(公告)日：1994-06-15
申请号：EP93402978.6
申请日：1993-12-09
申请人： TEXAS INSTRUMENTS FRANCE , TEXAS INSTRUMENTS INCORPORATED
发明人： Carbou, Pierre , Guignon, Pascal , Perney, Philippe
IPC分类号： H03K5/04 , H03K5/13 , H03K5/15
CPC分类号： H03K5/133 , H03K5/04 , H03K5/1515
摘要： Delay circuit comprising a delay cell formed by a current source (I) connected between drain and source of two field-effect transistors (PO, NO) whose gates are connected to each other in order to constitute the input of the cell, and an inverter (INV) linked to one or other of the terminals of the current source (I) according to whether the delay is to affect the leading edge or the trailing edge of the signal to be delayed, a capacitor (C) for defining a delay time (Te) proportional to the power supply voltage and inversely proportional to the current (I) delivered by the current source, being connected between the input of the inverter (INV) and earth, characterized in that it furthermore comprises a circuit (Ci, Cu, Sl, S3, AMPLO, P1) for regulating the current delivered by the current source in order to make it proportional to the power supply voltage of the circuit.
摘要翻译：延迟电路包括由连接在两个场效应晶体管（PO，NO）的漏极和源极之间的电流源（I）形成的延迟单元，栅极彼此连接以构成单元的输入，以及反相器（INV）根据延迟是否影响要延迟的信号的前沿或后沿，与电流源（I）的一个或另外一个端子相连，用于定义延迟时间的电容器（C）（Te）与电源电压成比例并且与由电流源传递的电流（I）成反比，其连接在逆变器（INV）的输入端和地之间，其特征在于，它还包括电路（Ci，Cu ，S1，S3，AMPLO，P1），用于调节由电流源传递的电流，以使其与电路的电源电压成比例。

6. 发明授权

EP0601935B1 Controlled delay circuit 失效
标题翻译：控制延时电路
公开(公告)号：EP0601935B1
公开(公告)日：2000-04-19
申请号：EP93402978.6
申请日：1993-12-09
申请人： TEXAS INSTRUMENTS FRANCE , TEXAS INSTRUMENTS INCORPORATED
发明人： Carbou, Pierre , Guignon, Pascal , Perney, Philippe
IPC分类号： H03K5/04 , H03K5/13 , H03K5/15
CPC分类号： H03K5/133 , H03K5/04 , H03K5/1515

7. 发明公开

EP0808023A1 Current bit cell and switched current network formed of such cells 失效
标题翻译： Strombitzelle und Stromgeschaltetes Netzwerk mit derartigen Zellen
公开(公告)号：EP0808023A1
公开(公告)日：1997-11-19
申请号：EP97401063.9
申请日：1997-05-13
申请人： TEXAS INSTRUMENTS FRANCE , TEXAS INSTRUMENTS INCORPORATED
发明人： Carbou, Pierre , Guignon, Pascal
IPC分类号： H03K5/24
CPC分类号： H03K5/2481
摘要： Current bit cell comprising a current source (P1), means (P6) for detecting the presence of a digital signal bit (Bit) and means (P2, P5, P7) for detecting at least one command signal (L, Lc) so as to command, on a first output (S1) of the cell, the appearance of a current delivered by the current source (P1) as a function of the digital signal (Bit) applied to the said cell and of the said at least one command signal (L, Lc), characterized in that it furthermore includes means (P9) for detecting the presence of a bit (Bitz) complementary to the bit of the digital signal (Bit) and means (P3, P4, P8) for detecting the complement (Lz, Lcz) of the said at least one command signal (L, Lc), so as to command on a second output (S2) of the cell the appearance of a current delivered by the current source (P1) which is the complement of the current delivered on the first output (S1), the said means for detecting the presence of bits and of the said at least one command signal, the said means for detecting the presence of complementary bits and of complementary command signals and the said current source being embodied with the aid of field-effect transistors of the same type.
摘要翻译：包括电流源（P1）的当前位单元，用于检测数字信号位（Bit）的存在的装置（P6）以及用于检测至少一个指令信号（L，Lc）的装置（P2，P5，P7）在单元的第一输出（S1）上命令由当前源（P1）传送的电流作为施加到所述单元的数字信号（Bit）和所述至少一个命令的函数的出现信号（L，Lc），其特征在于它还包括用于检测与数字信号（位）的位互补的位（Bitz）的存在的装置（P9）和用于检测数字信号的位（P3，P4，P8）所述至少一个命令信号（L，Lc）的补码（Lz，Lcz），以便在单元的第二输出（S2）上命令出现由当前源（P1）在第一输出（S1）上传送的电流的补码，所述用于检测位的存在和所述至少一个命令信号的装置，所述装置 r检测互补位和互补指令信号的存在，并且所述电流源借助于相同类型的场效应晶体管来实现。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式