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1. 发明申请

WO2004098087A3 METHODS AND RECEIVERS THAT ESTIMATE MULTI-PATH DELAYS BY REMOVING SIGNAL RAYS FROM A POWER-DELAY PROFILE 审中-公开
公开(公告)号：WO2004098087A3
公开(公告)日：2004-11-11
申请号：PCT/US2004/012733
申请日：2004-04-23
申请人： TELEFONAKTIEBOLAGET LM ERICSSON (publ) , BOTTOMLEY, Gregory Edward , KHAYRALLAH, Ali S. , OLSON, Henrik , NILSSON, Johan
发明人： BOTTOMLEY, Gregory Edward , KHAYRALLAH, Ali S. , OLSON, Henrik , NILSSON, Johan
IPC分类号： H04B1/707
摘要： A method for estimating a plurality of delay values in a multi-path communication signal. Correlation values are generated that correspond to a plurality of delay values associated with the multi-path communication signal. A first power-delay profile (PDP) sequence is produced from the correlation values and is used to estimate a first delay value. A first reference PDP sequence is generated based on a predefined PDP sequence and the first PDP sequence. The first reference PDP sequence is removed from the first PDP sequence so as to remove at least a portion of the contributions to the first PDP sequence from the first delay value, and to provide a second PDP sequence. A second value is estimated based on the second PDP sequence.

2. 发明申请

WO2012029028A1 FREQUENCY-DOMAIN MULTI-STAGE GROUP DETECTION FOR ALLEVIATING INTER-SYMBOL INTERFERENCE 审中-公开
标题翻译：用于识别间歇性干扰的频域多级组检测
公开(公告)号：WO2012029028A1
公开(公告)日：2012-03-08
申请号：PCT/IB2011/053799
申请日：2011-08-30
申请人： TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) , WANG, Yi-Pin Eric , BOTTOMLEY, Gregory Edward
发明人： WANG, Yi-Pin Eric , BOTTOMLEY, Gregory Edward
IPC分类号： H04L25/03
CPC分类号： H04L25/08 , H04L25/03012 , H04L25/03159 , H04L25/03171 , H04L25/03184 , H04L25/03312 , H04L25/03331 , H04L2025/03414 , H04L2025/03426
摘要： A receiver (30) comprises plural receive antennas (50) and processing means (34). The plural receive antennas (50) are configured to receive, on plural subcarriers transmitted over a radio interface, a frequency domain signal that comprises contribution from a block of time domain symbols. The processing means (34) is configured or operable to perform symbol detection of time domain, symbols comprising the block by performing s multi-stage joint detection procedure comprising plural stages, and thus serves as a detector (40), For a first stage the block is divided into a first number of sub-blocks each having a sub-block first size. For a second stage the block is divided into a second number of sub-block each having a sub-block, second size, the sub-block second size being greater than the sub-block first size. For each stage a detector (40) formulates frequency domain combining weights for uses the frequency domain combining weights for combining multiple receive versions of each subcarrier to provide candidate symbol combination values for symbols la each sub-block of the respective stage. For the second stage the detector (40) is further configured, to use the candidate symbol combination values of the first stage to formulate joint hypotheses to serve as candidates for the joint detection operation of the second stage.
摘要翻译：接收器（30）包括多个接收天线（50）和处理装置（34）。多个接收天线（50）被配置为在由无线电接口发射的多个子载波上接收包括来自时域符号块的贡献的频域信号。处理装置（34）被配置或可操作以通过执行包括多级的多级联合检测程序来执行时域的符号检测，包括该块的符号，并且因此用作检测器（40）。对于第一级，块被分成具有子块第一大小的第一数量的子块。对于第二级，块被分成第二数量的子块，每个子块具有子块，第二大小，子块第二大小大于子块第一大小。对于每个阶段，检测器（40）制定频域组合权重，以使用频域组合权重来组合每个子载波的多个接收版本，以为相应级的每个子块提供符号1a的候选符号组合值。对于第二级，检测器（40）还被配置为使用第一级的候选符号组合值来形成联合假设以用作第二级的联合检测操作的候选。

3. 发明授权

EP1618676B1 METHODS AND RECEIVERS THAT ESTIMATE MULTI-PATH DELAYS BY REMOVING SIGNAL RAYS FROM A POWER-DELAY PROFILE 有权
标题翻译：方法和接收机中，更多的方式延误去除信号辐射从电源延迟分布欣赏
公开(公告)号：EP1618676B1
公开(公告)日：2007-02-07
申请号：EP04750619.1
申请日：2004-04-23
申请人： TELEFONAKTIEBOLAGET LM ERICSSON (publ)
发明人： BOTTOMLEY, Gregory Edward , KHAYRALLAH, Ali S. , OLSON, Henrik , NILSSON, Johan
IPC分类号： H04B1/707 , H04L25/02
CPC分类号： H04B1/7113 , H04B1/7077 , H04B1/7117 , H04L25/0212
摘要： A method for estimating a plurality of delay values in a multi-path communication signal. Correlation values are generated that correspond to a plurality of delay values associated with the multi-path communication signal. A first power-delay profile (PDP) sequence is produced from the correlation values and is used to estimate a first delay value. A first reference PDP sequence is generated based on a predefined PDP sequence and the first PDP sequence. The first reference PDP sequence is removed from the first PDP sequence so as to remove at least a portion of the contributions to the first PDP sequence from the first delay value, and to provide a second PDP sequence. A second value is estimated based on the second PDP sequence.

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