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1. 发明授权

US08183691B2 Semiconductor device with pads overlapping wiring layers including dummy wiring 有权
标题翻译：具有焊盘重叠布线层的半导体器件包括虚拟布线
公开(公告)号：US08183691B2
公开(公告)日：2012-05-22
申请号：US12817557
申请日：2010-06-17
申请人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/48
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

2. 发明授权

US08669659B2 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08669659B2
公开(公告)日：2014-03-11
申请号：US13454354
申请日：2012-04-24
申请人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/552
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

3. 发明授权

US07102223B1 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07102223B1
公开(公告)日：2006-09-05
申请号：US10633583
申请日：2003-08-05
申请人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/12 , H01L23/053
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

4. 发明授权

US07342302B2 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07342302B2
公开(公告)日：2008-03-11
申请号：US11458905
申请日：2006-07-20
申请人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/485
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

5. 发明申请

US20120205788A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120205788A1
公开(公告)日：2012-08-16
申请号：US13454354
申请日：2012-04-24
申请人： TAKU KANAOKA , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： TAKU KANAOKA , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/552 , H01L23/488
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

6. 发明授权

US07759804B2 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07759804B2
公开(公告)日：2010-07-20
申请号：US12020032
申请日：2008-01-25
申请人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/485
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

7. 发明申请

US20060289998A1 Semiconductor Device and a Method of Manufacturing the Same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20060289998A1
公开(公告)日：2006-12-28
申请号：US11458905
申请日：2006-07-20
申请人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/52
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

8. 发明申请

US20100252924A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100252924A1
公开(公告)日：2010-10-07
申请号：US12817557
申请日：2010-06-17
申请人： TAKU KANAOKA , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： TAKU KANAOKA , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/498
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

9. 发明申请

US20080122085A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080122085A1
公开(公告)日：2008-05-29
申请号：US12020032
申请日：2008-01-25
申请人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
发明人： Taku Kanaoka , Masashi Sahara , Yoshio Fukayama , Yutaro Ebata , Kazuhisa Higuchi , Koji Fujishima
IPC分类号： H01L23/48
CPC分类号： H01L24/02 , H01L21/76202 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/3185 , H01L23/48 , H01L23/49572 , H01L23/49838 , H01L23/4985 , H01L23/522 , H01L23/528 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/50 , H01L24/83 , H01L27/0255 , H01L27/0296 , H01L27/12 , H01L27/124 , H01L2224/02235 , H01L2224/02255 , H01L2224/05001 , H01L2224/05085 , H01L2224/05124 , H01L2224/05166 , H01L2224/05184 , H01L2224/056 , H01L2224/13026 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29355 , H01L2224/29393 , H01L2224/4554 , H01L2224/45644 , H01L2224/48 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/12036 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/15788 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
摘要翻译：半导体器件包括布置在半导体芯片的有源区域中的多个电极焊盘和设置在多个电极焊盘下方的布线层，其中布置在电极焊盘的区域内的布线的占有率分别对于每个布线层均匀。为此，在布线占空比小于其他区域的区域中，设置虚拟布线。相反，当布线的占用率大于其他区域时，在布线中形成狭缝以控制布线占用率。在各个布线层中，各个电极焊盘下面的布线的形状，尺寸和间隔彼此相似或相等。

10. 发明申请

US20070246780A1 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070246780A1
公开(公告)日：2007-10-25
申请号：US11723344
申请日：2007-03-19
申请人： Kozo Watanabe , Shoji Yoshida , Masashi Sahara , Shinichi Tanabe , Takashi Hashimoto
发明人： Kozo Watanabe , Shoji Yoshida , Masashi Sahara , Shinichi Tanabe , Takashi Hashimoto
IPC分类号： H01L29/94 , H01L21/8234
CPC分类号： H01L29/872 , H01L27/0629 , H01L28/20 , H01L29/7833
摘要： A technology is provided where a high performance Schottky-barrier diode and other semiconductor elements can be formed in the same chip controlling the increase in the number of steps. After a silicon oxide film is deposited over a substrate where an n-channel type MISFET is formed and the silicon oxide film over a gate electrode and n+ type semiconductor region is selectively removed, a Co film is deposited over the substrate and a CoSi2 layer is formed over the n+ type semiconductor region and the gate electrode by applying a heat treatment to the substrate. After a silicon nitride film is deposited over the substrate and an aperture reaching the substrate is formed by removing the silicon nitride-film and the silicon oxide film at the anode formation part of the Schottky barrier diode, a Ti film is deposited over the substrate including the inside of the aperture, and a TiSi2 layer which becomes an anode electrode of the Schottky-barrier diode is formed at the bottom of the aperture by applying a heat treatment to the substrate.
摘要翻译：提供了一种技术，其中可以在同一芯片中形成高性能肖特基势垒二极管和其他半导体元件，以控制步骤数量的增加。在氧化硅膜沉积在其上形成n沟道型MISFET的衬底上并且选择性地去除栅电极和n + +型半导体区之上的氧化硅膜之后，沉积Co膜并且通过对衬底进行热处理，在n + +型半导体区域和栅极上形成CoSi 2 +层。在氮化硅膜沉积在衬底之上并且通过去除肖特基势垒二极管的阳极形成部分处的氮化硅膜和氧化硅膜来形成到达衬底的孔，在衬底上沉积Ti膜，包括通过对基板进行热处理，在孔的底部形成孔径的内部和成为肖特基势垒二极管的阳极的TiSi 2层。

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