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1. 发明申请

US20220335192A1 METHOD FOR COLORING CIRCUIT LAYOUT AND SYSTEM FOR PERFORMING THE SAME 有权
公开(公告)号：US20220335192A1
公开(公告)日：2022-10-20
申请号：US17853758
申请日：2022-06-29
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Chia-Ping CHIANG , Ming-Hui CHIH , Chih-Wei HSU , Ping-Chieh WU , Ya-Ting CHANG , Tsung-Yu WANG , Wen-Li CHENG , Hui En YIN , Wen-Chun HUANG , Ru-Gun LIU , Tsai-Sheng GAU
IPC分类号： G06F30/39 , G03F1/70 , G03F7/20
摘要： Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.

2. 发明申请

US20150040083A1 SYSTEM AND METHOD FOR DECOMPOSITION OF A SINGLE PHOTORESIST MASK PATTERN INTO 3 PHOTORESIST MASK PATTERNS 有权
标题翻译：单光栅掩模图案分解成3个光栅掩模图案的系统和方法
公开(公告)号：US20150040083A1
公开(公告)日：2015-02-05
申请号：US13955780
申请日：2013-07-31
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Wen-Li CHENG , Ming-Hui CHIH , Chia-Ping CHIANG , Ken-Hsien HSIEH , Tsong-Hua OU , Wen-Chun HUANG , Ru-Gun LIU
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/00 , G03F1/70 , G03F7/70283 , G03F7/70433 , G03F7/70466
摘要： A system and method of decomposing a single photoresist mask pattern to three photoresist mask patterns. The system and method assign nodes to polygon features on the single photoresist mask pattern, designate nodes as being adjacent nodes for those nodes that are less than a predetermined distance apart, iteratively remove nodes having 2 or less adjacent nodes until no nodes having 2 or less adjacent nodes remain, identify one or more internal nodes, map photoresist mask pattern designations (colors) to the internal nodes, and replace and map a color to each of the nodes removed by the temporarily removing nodes, such that each node does not have an adjacent node of the same color.
摘要翻译：将单个光致抗蚀剂掩模图案分解成三个光致抗蚀剂掩模图案的系统和方法。系统和方法将节点分配给单个光致抗蚀剂掩模图案上的多边形特征，将节点指定为距离小于预定距离的那些节点的相邻节点，迭代地移除具有2个或更少相邻节点的节点，直到没有节点具有2个或更少的节点保留相邻节点，识别一个或多个内部节点，将光刻胶掩模图案指定（颜色）映射到内部节点，并将颜色替换并映射到由临时删除节点删除的每个节点，使得每个节点不具有相邻节点的颜色相同。

3. 发明申请

US20160063169A1 METHOD OF DETERMINING COLORABILITY OF A LAYOUT AND SYSTEM FOR IMPLEMENTING THE SAME 有权
标题翻译：确定布局的颜色的方法及其实施方法
公开(公告)号：US20160063169A1
公开(公告)日：2016-03-03
申请号：US14471859
申请日：2014-08-28
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Nien-Yu TSAI , Chin-Chang HSU , Wen-Chun HUANG , Wen-Ju YANG
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/00 , G03F1/68 , G03F7/0035
摘要： A method of determining colorability of a layout includes generating a conflict diagram based on circuit information. The conflict diagram includes a plurality of nodes, each node of the plurality of nodes is connected to at least another node of the plurality of nodes by a link, and each node of the plurality of nodes has a degree equal to a number of links connected to the node. The method includes setting a degree of each anchor node within the conflict diagram to a value of n, where n is equal to a number of mask usable to manufacture the layout. The method further includes excluding, using a processor, nodes having a degree less than n from the conflict diagram. The method further includes performing a color status check on the conflict diagram after the excluding; and determining whether the layout is colorable based on the performed color status check.
摘要翻译：确定布局的着色性的方法包括基于电路信息生成冲突图。冲突图包括多个节点，多个节点中的每个节点通过链路连接到多个节点中的至少另一个节点，并且多个节点中的每个节点具有等于连接数量的链路的程度到节点。该方法包括将冲突图中的每个锚节点的度数设置为n的值，其中n等于可用于制造布局的掩模的数量。该方法还包括从冲突图中排除使用处理器具有小于n的度的节点。该方法还包括在排除之后对冲突图执行颜色状态检查; 以及基于所执行的颜色状态检查来确定所述布局是否可着色。

4. 发明申请

US20160019333A1 METHOD OF DETERMINING WHETHER A LAYOUT IS COLORABLE 有权
标题翻译：确定布局是否合适的方法
公开(公告)号：US20160019333A1
公开(公告)日：2016-01-21
申请号：US14872338
申请日：2015-10-01
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Wen-Li CHENG , Ming-Hui CHIH , Chia-Ping CHIANG , Ken-Hsien HSIEH , Tsong-Hua OU , Wen-Chun HUANG , Ru-Gun LIU
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/00 , G03F1/70 , G03F7/70283 , G03F7/70433 , G03F7/70466
摘要： A method of determining whether a layout is colorable includes assigning nodes to polygon features of the layout. The method includes designating nodes as being adjacent nodes for nodes separated by less than a minimum pitch. The method includes iteratively removing nodes having less than three adjacent nodes from consideration to identify a node arrangement, wherein all nodes in the node arrangement have at least three adjacent nodes. The method includes determining whether the layout is colorable based on the node arrangement. Determining whether the layout is colorable includes independently assessing each internal node of node arrangement to determine whether each internal node of the node arrangement is colorable. The method includes generating a colored layout design for fabrication of the semiconductor device if each internal node of the node arrangement is colorable; and modifying the layout if at least one internal node of the node arrangement is not colorable.
摘要翻译：确定布局是否可着色的方法包括将节点分配给布局的多边形特征。该方法包括将节点指定为以小于最小间距分开的节点的相邻节点。该方法包括从考虑中迭代地去除具有少于三个相邻节点的节点以识别节点布置，其中节点布置中的所有节点具有至少三个相邻节点。该方法包括基于节点布置确定布局是否可着色。确定布局是否可着色包括独立地评估节点布置的每个内部节点以确定节点布置的每个内部节点是否是可着色的。该方法包括：如果节点装置的每个内部节点是可着色的，则产生用于制造半导体器件的彩色布局设计; 以及如果所述节点装置的至少一个内部节点不可着色，则修改所述布局。

5. 发明申请

US20140248555A1 EXTREME ULTRAVIOLET LIGHT (EUV) PHOTOMASKS, AND FABRICATION METHODS THEREOF 有权
标题翻译：极光超光（EUV）光电及其制造方法
公开(公告)号：US20140248555A1
公开(公告)日：2014-09-04
申请号：US14279577
申请日：2014-05-16
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Ching-Hsu CHANG , Hung-Chun WANG , Boren LUO , Wen-Chun HUANG , Ru-Gun LIU
IPC分类号： G03F1/58
CPC分类号： G03F1/58 , G03F1/24
摘要： An extreme ultraviolet photomask comprises a reflective layer over a substrate, a capping layer over the reflective layer, a hard mask layer over the capping layer, and an absorber. The absorber is in the hard mask layer, the capping layer and the reflective layer.
摘要翻译：极紫外光掩模包括在衬底上的反射层，反射层上的覆盖层，覆盖层上的硬掩模层和吸收体。吸收体位于硬掩模层，封盖层和反射层中。

6. 发明申请

US20140101623A1 METHOD OF MERGING COLOR SETS OF LAYOUT 有权
标题翻译：合并色彩集合的方法
公开(公告)号：US20140101623A1
公开(公告)日：2014-04-10
申请号：US14104279
申请日：2013-12-12
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Pi-Tsung CHEN , Ming-Hui CHIH , Ken-Hsien HSIEH , Wei-Long WANG , Wen-Chun HUANG , Ru-Gun LIU , Tsai-Sheng GAU , Wen-Ju YANG , Gwan Sin CHANG , Yung-Sung YEN
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A method includes determining one or more potential merges corresponding to a color set Ai and a color set Aj of N color sets, represented by A1 to AN, used in coloring polygons of a layout of an integrated circuit. N is a positive integer, i and j are integers from 1 to N, and i≠j. One or more potential cuts corresponding to the color set Ai and the second color set Aj are determined. An index Aij is determined according to the one or more potential merges and the one or more potential cuts. A plurality of parameters F related to the index Aij is obtained based on various values of indices fi and fj. A parameter F is selected among the plurality of parameters F based on a definition of the index Aij.
摘要翻译：一种方法包括确定一个或多个与集成电路的布局的着色多边形中使用的颜色集合Ai和由A 1到AN表示的颜色集合A 1对应的潜在合并。 N是正整数，i和j是从1到N的整数，i≠j。确定对应于颜色集合Ai和第二颜色集合Aj的一个或多个可能的剪切。根据一个或多个潜在的合并和一个或多个潜在的切割来确定索引Aij。基于索引fi和fj的各种值获得与索引Aij有关的多个参数F。基于索引Aij的定义，在多个参数F中选择参数F.

7. 发明公开

US20230367942A1 METHOD FOR COLORING CIRCUIT LAYOUT AND SYSTEM FOR PERFORMING THE SAME 审中-公开
公开(公告)号：US20230367942A1
公开(公告)日：2023-11-16
申请号：US18226677
申请日：2023-07-26
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Chia-Ping CHIANG , Ming-Hui CHIH , Chih-Wei HSU , Ping-Chieh WU , Ya-Ting CHANG , Tsung-Yu WANG , Wen-Li CHENG , Hui En YIN , Wen-Chun HUANG , Ru-Gun LIU , Tsai-Sheng GAU
IPC分类号： G06F30/39 , G03F1/70 , G03F7/00
CPC分类号： G06F30/39 , G03F1/70 , G03F7/70466
摘要： Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.

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