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US07501348B2 Method for forming a semiconductor structure having nanometer line-width 有权
标题翻译：用于形成具有纳米线宽度的半导体结构的方法
公开(公告)号：US07501348B2
公开(公告)日：2009-03-10
申请号：US11783470
申请日：2007-04-10
申请人： Szu-Hung Chen , Yi-Chung Lien , Yi Edward Chang
发明人： Szu-Hung Chen , Yi-Chung Lien , Yi Edward Chang
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/0272 , H01L29/42312
摘要： A method for forming a semiconductor structure having a deep sub-micron or nano scale line-width is disclosed. Structure consisting of multiple photoresist layers is first formed on the substrate, then patterned using adequate exposure energy and development condition so that the bottom photoresist layer is not developed while the first under-cut resist groove is formed on top of the bottom photoresist layer. Anisotropic etching is then performed at a proper angle to the normal of the substrate surface, and a second resist groove is formed by the anisotropic etching. Finally, the metal evaporation process and the lift-off process are carried out and the Γ-shaped metal gate with nano scale line-width can be formed.
摘要翻译：公开了一种形成深亚微米或纳米级线宽的半导体结构的方法。首先在基板上形成由多个光致抗蚀剂层组成的结构，然后使用适当的曝光能量和显影条件进行图案化，使得底部光致抗蚀剂层不被显影，而第一底切光刻胶凹槽形成在底部光致抗蚀剂层的顶部。然后以与基板表面的法线成适当的角度进行各向异性蚀刻，通过各向异性蚀刻形成第二抗蚀剂槽。最后，进行金属蒸发处理和剥离处理，形成具有纳米线宽度的伽玛状金属栅极。

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