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1. 发明授权

US5652760A Error rate measuring apparatus 失效
标题翻译：误差率测量仪
公开(公告)号：US5652760A
公开(公告)日：1997-07-29
申请号：US554790
申请日：1995-11-07
申请人： Syugo Yamashita , Yoshikazu Tomida , Terumasa Tokumoto , Minoru Honda , Toshihiro Kubo
发明人： Syugo Yamashita , Yoshikazu Tomida , Terumasa Tokumoto , Minoru Honda , Toshihiro Kubo
IPC分类号： H04N19/00 , H04B1/16 , H04L1/00 , H04L1/24 , H04N7/20 , H04N19/42 , H04N19/423 , H04N19/44 , H04N19/65 , H04N19/70 , H04N19/89 , H04N21/61 , H04N21/647 , G06F11/00
CPC分类号： H04L1/24 , H04B1/16
摘要： An error rate measuring apparatus includes a demodulator, and data from the demodulator is applied to a decoding circuit in which an error bit number is evaluated for each of a BIC portion and a packet portion. In the BIC portion, if a synchronization is settled, the error bit number is evaluated by comparing received BICs and a predetermined BIC pattern, and if the synchronization is not settled, the error bit number is determined as eight (8) bits. In the packet portion, if a frame synchronization is settled and decoding is successful, the error bit number is calculated by comparing data before decoding and data after decoding with each other. If the frame synchronization is settled but the decoding is unsuccessful, a presumed error bit number is set according to the number of packets being decoded successfully in a first time horizontal direction, and if the frame synchronization is not settled, a predetermined error bit number is set. In each of the BIC portion and the packet portion, a bit error rate is calculated on the basis of the error bit number for each measurement range, and displayed on a monitor.
摘要翻译：错误率测量装置包括解调器，并且来自解调器的数据被应用于对BIC部分和分组部分中的每一个评估错误比特数的解码电路。在BIC部分中，如果同步被确定，则通过比较所接收的BIC和预定的BIC模式来评估错误比特数，并且如果同步未被确定，则错误比特数被确定为八（8）比特。在分组部分中，如果帧同步被确定并且解码成功，则通过比较解码之前的数据和解码之后的数据来计算错误比特数。如果帧同步被确定但是解码不成功，则根据在第一时间水平方向成功解码的分组的数量来设置推定的错误比特数，并且如果帧同步未被确定，则预定的错误比特数是组。在每个BIC部分和分组部分中，基于每个测量范围的误差位数来计算误码率，并显示在监视器上。

2. 发明授权

US09278049B2 Double-chamber container and method for manufacturing same 有权
标题翻译：双室容器及其制造方法
公开(公告)号：US09278049B2
公开(公告)日：2016-03-08
申请号：US14002050
申请日：2012-02-28
申请人： Minoru Honda
发明人： Minoru Honda
IPC分类号： B65D25/08 , A61J1/00 , A61J1/10 , A61J1/20 , B29C65/76 , B29C65/00 , B29C65/02 , B65D81/32 , B29L31/00
CPC分类号： A61J1/00 , A61J1/10 , A61J1/2024 , A61J1/2093 , B29C65/02 , B29C65/76 , B29C66/004 , B29C66/1122 , B29C66/3472 , B29C66/43 , B29C66/53262 , B29C66/71 , B29C66/72321 , B29C66/7234 , B29C66/8322 , B29C66/91411 , B29C66/919 , B29L2031/7148 , B65D81/3266 , B29K2023/0625 , B29K2023/0633 , B29K2023/12 , B29K2067/003
摘要： There is provided a method for manufacturing a double-chamber container including an agent storage chamber and a solution storage chamber separated from each other by a weak seal portion, the method including the steps of: preparing a first sheet-like member including a first agent storage chamber forming portion and a first solution storage chamber forming portion whose one sides are joined to each other, as well as a second sheet-like member including a second agent storage chamber forming portion and a second solution storage chamber forming portion whose one sides are joined to each other; and forming the agent storage chamber and the solution storage chamber by joining the first and the second sheet-like members. The weak seal portion is formed by joining the one side of the first medical solution storage chamber forming portion and the one side of the second medical solution storage chamber forming portion.
摘要翻译：提供了一种用于制造双室容器的方法，所述双室容器包括通过弱密封部彼此分离的试剂储存室和溶液储存室，所述方法包括以下步骤：制备包括第一试剂的第一片状构件存储室形成部分和一侧彼此接合的第一溶液储存室形成部分，以及包括第二药剂储存室形成部分和第二溶液储存室形成部分的第二片状部件，相互联系以及通过接合所述第一和第二片状构件形成所述试剂储存室和所述溶液储存室。弱密封部分通过将第一药液存储室形成部分的一侧和第二药液存储室形成部分的一侧接合而形成。

3. 发明申请

US20120153442A1 SILICON NITRIDE FILM AND PROCESS FOR PRODUCTION THEREOF, COMPUTER-READABLE STORAGE MEDIUM, AND PLASMA CVD DEVICE 审中-公开
标题翻译：硅氮化硅膜及其制造方法，计算机可读存储介质和等离子体CVD装置
公开(公告)号：US20120153442A1
公开(公告)日：2012-06-21
申请号：US13164337
申请日：2011-06-20
申请人： Minoru Honda , Masayuki Kohno
发明人： Minoru Honda , Masayuki Kohno
IPC分类号： H01L23/58 , C23C16/511 , H01L21/318
CPC分类号： H01L21/0217 , C23C16/345 , C23C16/511 , H01L21/02274 , H01L21/31111 , H01L2924/0002 , H01L2924/00
摘要： Provided is a process of forming a silicon nitride film having concentration of hydrogen atoms below or equal to 9.9×1020 atoms/cm3 in the silicon nitride film by using a plasma CVD device, which generates plasma by introducing microwaves into a process chamber by using a planar antenna having a plurality of apertures, by setting the pressure inside a process chamber within a range from 0.1 Pa to 6.7 Pa and by performing a plasma CVD by using a raw material gas for film formation including SiCl4 gas and nitrogen gas.
摘要翻译：提供了通过使用等离子体CVD装置在氮化硅膜中形成低于或等于9.9×1020原子/ cm3的氢原子浓度的氮化硅膜的工艺，该等离子体CVD装置通过使用等离子体CVD装置将微波引入处理室来产生等离子体通过将处理室内的压力设定在0.1Pa〜6.7Pa的范围内，通过使用包含SiCl 4气体和氮气的成膜原料气体进行等离子体CVD，具有多个孔的平面天线。

4. 发明申请

US20100323531A1 METHOD FOR FORMING INSULATING FILM AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 失效
标题翻译：形成绝缘膜的方法和制造半导体器件的方法
公开(公告)号：US20100323531A1
公开(公告)日：2010-12-23
申请号：US12521666
申请日：2007-12-20
申请人： Minoru Honda , Yoshihiro Sato , Toshio Nakanishi
发明人： Minoru Honda , Yoshihiro Sato , Toshio Nakanishi
IPC分类号： H01L21/314
CPC分类号： H01L21/28202 , H01L21/67109 , H01L21/67115
摘要： A method for forming an insulating film includes a step of preparing a substrate, which is to be processed and has silicon exposed on the surface, a step of performing oxidizing to the silicon on the surface, and forming a silicon oxide thin film on the surface of the silicon, a step of performing first nitriding to the silicon oxide film and the base silicon thereof, and forming a silicon oxynitride film, and a step of performing first heat treatment to the silicon oxynitride film in N2O atmosphere. In such method, a step of performing second nitriding to the silicon oxynitride film may be further included after the first heat treatment, and furthermore, a step of performing second heat treatment to the silicon oxynitride film after the second nitriding may be included.
摘要翻译：一种形成绝缘膜的方法包括制备待加工的基板并且在表面上露出硅的步骤，对表面上的硅进行氧化并在表面上形成氧化硅薄膜的步骤的硅，对氧化硅膜及其基底硅进行氮化的步骤，形成氮氧化硅膜，以及在N 2 O气氛中对氮氧化硅膜进行热处理的工序。在这种方法中，可以在第一热处理之后进一步包括对氮氧化硅膜进行第二氮化的步骤，此外，可以包括在第二次氮化之后对氮氧化硅膜进行第二次热处理的步骤。

5. 发明授权

US07772813B2 Power supply circuit 有权
标题翻译：电源电路
公开(公告)号：US07772813B2
公开(公告)日：2010-08-10
申请号：US11639280
申请日：2006-12-15
申请人： Tomokazu Kojima , Minoru Honda
发明人： Tomokazu Kojima , Minoru Honda
IPC分类号： G05F1/00
CPC分类号： H03F3/45475 , H03F1/56 , H03F2203/45674
摘要： An operational amplifier generates a power supply potential from a reference potential. An impedance adjuster adjusts an output impedance of the operational amplifier in accordance with a control signal. A charge accumulator accumulates an output charge of the operational amplifier whose impedance is adjusted by the impedance adjuster. A comparator compares an output voltage of the operational amplifier before the impedance adjustment by the impedance adjuster and the output voltage of the operational amplifier after the impedance adjustment by the impedance adjuster to each other, and the comparator further generates the control signal in accordance with a result of the comparison so as to output the generated control signal to the impedance adjuster.
摘要翻译：运算放大器从参考电位产生电源电位。阻抗调节器根据控制信号调整运算放大器的输出阻抗。电荷累加器累积运算放大器的输出电荷，其阻抗由阻抗调节器调节。比较器在通过阻抗调节器进行的阻抗调整之后，将由阻抗调节器进行的阻抗调整之前的运算放大器的输出电压与运算放大器的输出电压进行比较，并且比较器进一步根据比较结果，将所生成的控制信号输出到阻抗调节器。

6. 发明申请

US20090269940A1 METHOD FOR NITRIDING SUBSTRATE AND METHOD FOR FORMING INSULATING FILM 失效
标题翻译：氮化衬底的方法和形成绝缘膜的方法
公开(公告)号：US20090269940A1
公开(公告)日：2009-10-29
申请号：US11910354
申请日：2006-03-28
申请人： Minoru Honda , Toshio Nakanishi
发明人： Minoru Honda , Toshio Nakanishi
IPC分类号： H01L21/318 , C23C16/513
CPC分类号： H01L21/28202 , H01J2237/3387 , H01L21/3185 , H01L21/3211 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： In a substrate nitriding method for nitriding a target substrate by allowing a nitrogen-containing plasma to act on silicon on a surface of the substrate in a processing chamber of a plasma processing apparatus, the nitridation by the nitrogen-containing plasma is performed by controlling a sheath voltage Vdc around the substrate to be less than or equal to about 3.5 eV. The sheath voltage Vdc is a potential difference Vp−Vf between a plasma potential Vp in a plasma generating region and a floating potential Vf of the substrate.
摘要翻译：在等离子体处理装置的处理室中，通过使含氮等离子体在基板的表面上的硅上作用于氮化等离子体的基板氮化方法中，通过控制含氮等离子体的氮化，基板周围的护套电压Vdc小于或等于约3.5eV。鞘电压Vdc是等离子体产生区域中的等离子体电位Vp与衬底的浮置电位Vf之间的电位差Vp-Vf。

7. 发明申请

US20090104787A1 PLASMA NITRIDING METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND PLASMA PROCESSING APPARATUS 失效
标题翻译：等离子体氮化方法，制造半导体器件和等离子体处理装置的方法
公开(公告)号：US20090104787A1
公开(公告)日：2009-04-23
申请号：US11917013
申请日：2006-06-07
申请人： Tadahiro Ohmi , Akinobu Teramoto , Minoru Honda , Toshio Nakanishi
发明人： Tadahiro Ohmi , Akinobu Teramoto , Minoru Honda , Toshio Nakanishi
IPC分类号： H01L21/31 , G05B19/00 , C23C16/34
CPC分类号： H01L21/3185
摘要： A nitriding process is performed at a process temperature of 500° C. or more by causing microwave-excited high-density plasma of a nitrogen-containing gas to act on silicon in the surface of a target object, inside a process container of a plasma processing apparatus. The plasma is generated by supplying microwaves into the process container from a planar antenna having a plurality of slots.
摘要翻译：通过使含氮气体的微波激发的高密度等离子体作用在目标物体的表面的硅上，等离子体的处理容器内，在500℃以上的过程温度下进行氮化处理处理装置。通过从具有多个槽的平面天线向处理容器提供微波产生等离子体。

8. 发明申请

US20070062825A1 Multi-chamber container 审中-公开
标题翻译：多室容器
公开(公告)号：US20070062825A1
公开(公告)日：2007-03-22
申请号：US11516719
申请日：2006-09-07
申请人： Kenji Omori , Shin-ichi Kawamura , Minoru Honda
发明人： Kenji Omori , Shin-ichi Kawamura , Minoru Honda
IPC分类号： B65D25/08
CPC分类号： A61J1/2093 , A61J1/2024 , A61M2207/00 , B32B7/06 , B32B15/085 , B32B15/20 , B32B27/08 , B32B27/32 , B32B27/325 , B32B27/36 , B32B2255/10 , B32B2255/20 , B32B2255/205 , B32B2307/546 , B32B2307/7242 , B32B2307/748 , B32B2307/75 , B32B2435/02 , B32B2439/40 , B32B2439/62 , B32B2439/80 , B65D81/3266
摘要： A multi-chamber container having chambers formed of a film of which at least an innermost layer is a cyclic polyolefin, one chamber being partitioned from another chamber by a partition wall, and the partition wall having an easily peelable seal layer which contains a low-density polyethylene and a propylene/α-olefin copolymer. The multi-chamber container enables the contents of the chambers to be mixed together.
摘要翻译：一种多室容器，其具有由至少最内层为环状聚烯烃的膜形成的室，一个室通过分隔壁与另一室隔开，并且所述隔壁具有容易剥离的密封层，密度聚乙烯和丙烯/α-烯烃共聚物。多室容器使得室的内容物可以混合在一起。

9. 发明授权

US07028673B2 Evaporative fuel adsorption device 失效
标题翻译：蒸发燃料吸附装置
公开(公告)号：US07028673B2
公开(公告)日：2006-04-18
申请号：US11111826
申请日：2005-04-22
申请人： Takaaki Itou , Koichi Hoshi , Kouichi Oda , Minoru Honda , Hideki Suzuki , Toshiki Annoura , Masahiro Mochizuki , Futaba Kanehira
发明人： Takaaki Itou , Koichi Hoshi , Kouichi Oda , Minoru Honda , Hideki Suzuki , Toshiki Annoura , Masahiro Mochizuki , Futaba Kanehira
IPC分类号： F02M37/04
CPC分类号： F02M35/10281 , F02M33/02 , F02M35/02 , F02M35/10052 , F02M35/112
摘要： An evaporative fuel adsorbent 32, which adsorbs evaporative fuel, is positioned substantially parallel to a sidewall surface 30 of a surge tank 22. A retention member 34 is positioned between the sidewall surface 22 and evaporative fuel adsorbent 32 to prevent oil, which runs down on the sidewall surface 22, from adhering to the evaporative fuel adsorbent 32. The evaporative fuel adsorbent 32 is mounted on the sidewall surface 30 of the surge tank 22 via the retention member 34.
摘要翻译：吸附蒸发燃料的蒸发燃料吸附剂32基本平行于稳压罐22的侧壁表面30定位。保持构件34位于侧壁表面22和蒸发燃料吸附剂32之间，以防止在侧壁表面22上向下流动的油粘附到蒸发燃料吸附剂32上。蒸发燃料吸附剂32通过保持构件34安装在缓冲罐22的侧壁表面30上。

10. 发明授权

US06849542B2 Method for manufacturing a semiconductor device that includes planarizing with a grindstone that contains fixed abrasives 有权
标题翻译：一种半导体器件的制造方法，其包括用包含固定的研磨剂的磨石进行平坦化
公开(公告)号：US06849542B2
公开(公告)日：2005-02-01
申请号：US10272831
申请日：2002-10-18
申请人： Soichi Katagiri , Ui Yamaguchi , Seiichi Kondo , Kan Yasui , Masahiro Kaise , Minoru Honda
发明人： Soichi Katagiri , Ui Yamaguchi , Seiichi Kondo , Kan Yasui , Masahiro Kaise , Minoru Honda
IPC分类号： B24B57/02 , B24D3/32 , B24D3/34 , B24D7/06 , H01L21/304 , H01L21/321 , H01L21/463
CPC分类号： B24B37/245 , B24B37/042 , B24B37/22 , B24B57/02 , B24D3/32 , B24D3/344 , B24D7/063 , H01L21/3212
摘要： The invention provides a method for manufacturing a semiconductor device with reduced dishing and erosion. In this method for manufacturing a semiconductor device, the convex/concave pattern is planarized by relatively moving a substrate having the convex/concave pattern on the surface and a polishing tool with pressing the convex/concave surface of the substrate on the polishing tool. The polishing tool is provided with a grindstone 10 having a plurality of polygonal segments 20, which comprises abrasive 23 that is bonded together with resin 24 and contains pores 22. The polygonal segments are arranged so that corners of three or more polygonal segments are not located near each other.
摘要翻译：本发明提供一种制造具有减少的凹陷和侵蚀的半导体器件的方法。在这种制造半导体器件的方法中，通过在表面上相对移动具有凸/凹图案的衬底和将抛光工具上的衬底的凸/凹表面压在一起的抛光工具，使凸/凹图案平坦化。抛光工具设置有具有多个多边形节段20的磨石10，磨石10包括与树脂24结合并包含孔22的磨料23。多边形节段被布置成使得三个或更多个多边形节段的角部不位于靠近对方

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