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    • 1. 发明授权
    • BICMOS repeater circuit for a programmable logic device
    • 用于可编程逻辑器件的BICMOS中继器电路
    • US5497108A
    • 1996-03-05
    • US352402
    • 1994-12-08
    • Suresh M. MenonStanley WilsonTsung C. Whang
    • Suresh M. MenonStanley WilsonTsung C. Whang
    • H03K17/567H03K19/173H03K19/0175
    • H03K17/567H03K19/1736
    • A programmable logic device includes a plurality of logic cells in which logic functions are performed, a plurality of input lines for supplying signals to be processed by the logic cells, a plurality of output lines for receiving signals that have been processed by the logic cells, and a plurality of repeater circuits combining bipolar and CMOS transistor technologies for transferring data from one point in the PLD to another point. Unidirectional repeater circuits transfer data from a first data bus in the PLD to a second data bus in the PLD. Bidirectional repeater circuits maintain signal integrity by transferring data along the length of a single PLD data bus. The bipolar technology in the repeater circuits provides superior speed in data transfer, while the CMOS technology limits power consumption of the repeater circuits.
    • 可编程逻辑器件包括执行逻辑功能的多个逻辑单元,用于提供由逻辑单元处理的信号的多条输入线,用于接收由逻辑单元处理的信号的多条输出线, 以及组合用于将数据从PLD中的一个点传送到另一个点的双极和CMOS晶体管技术的多个中继器电路。 单向中继器电路将数据从PLD中的第一数据总线传送到PLD中的第二数据总线。 双向中继器电路通过沿单个PLD数据总线的长度传输数据来保持信号完整性。 中继器电路中的双极技术在数据传输方面提供卓越的速度,而CMOS技术限制了中继器电路的功耗。
    • 3. 发明授权
    • ECL circuit with output transistor auxiliary biasing circuit
    • ECL电路与输出晶体管辅助偏置电路
    • US4751406A
    • 1988-06-14
    • US730706
    • 1985-05-03
    • Stanley Wilson
    • Stanley Wilson
    • H03K17/60H03K17/62H03K19/003H03K19/086H03K3/01
    • H03K19/0866H03K17/603H03K17/6264H03K19/00353
    • An ECL circuit comprising an output transistor having a base, a resistor coupled to the base, a first circuit responsive to a deselect signal OE for drawing a first current through the resistor and a second circuit responsive to the deselect signal OE for drawing a second current through the resistor, said first and said second currents combining in said resistor for providing a predetermined turn-off bias potential on said base of said output transistor. The predetermined turn-off bias potential reduces the emitter current of the output transistor such that the noise immunity of a data bus is preserved when a plurality of output transistors are coupled in parallel to the data bus.
    • 一种ECL电路,包括具有基极的输出晶体管,耦合到基极的电阻器,响应于取消选择信号的第一电路和用于通过电阻器引出第一电流的上拉和下拉;以及响应于取消选择信号的第二电路和用于绘制 所述第一和第二电流组合在所述电阻器中,用于在所述输出晶体管的所述基极上提供预定的关断偏置电位。 预定的关断偏置电位减小了输出晶体管的发射极电流,使得当多个输出晶体管并联耦合到数据总线时,数据总线的抗噪声能力被保留。
    • 7. 发明申请
    • OIL DEFLECTION APPARATUS
    • 油偏转装置
    • US20140360592A1
    • 2014-12-11
    • US13913646
    • 2013-06-10
    • Stanley Wilson
    • Stanley Wilson
    • F16L55/168
    • F16L55/168E21B21/01F16L23/167F16L35/00Y10T137/5762
    • An apparatus for deflecting leaking oil comprising a first L-shaped member comprising a pivot arm and a latch mechanism and a second L-shaped member that is slidably coupled to the first L-shaped member. The pivot arm on the first L-shaped member is configured to pivot on the first L-shaped member and to engage with a plurality of recesses on the second L-shaped member. The latch mechanism is configured to lock and unlock the pivot arm. The first and second L-shaped members each comprises a flat center surface and two flat side surfaces that form a channel on an underside of the L-shaped members. The channels are configured to fit around at least one flange on a heater treater.
    • 一种用于偏转漏油的装置,包括第一L形构件,其包括枢转臂和闩锁机构,以及第二L形构件,其可滑动地联接到第一L形构件。 第一L形构件上的枢转臂构造成在第一L形构件上枢转并且与第二L形构件上的多个凹部接合。 闩锁机构构造成锁定和解锁枢轴臂。 第一和第二L形构件各自包括平坦的中心表面和在L形构件的下侧上形成通道的两个平坦侧表面。 通道被配置成围绕加热器处理器上的至少一个凸缘。
    • 8. 发明授权
    • Logic function module for field programmable array
    • 现场可编程阵列的逻辑功能模块
    • US5936426A
    • 1999-08-10
    • US794096
    • 1997-02-03
    • Stanley WilsonKing W. ChanMark Frappier
    • Stanley WilsonKing W. ChanMark Frappier
    • H03K19/173H03K19/094
    • H03K19/1737
    • A logic function module comprises a plurality of input nodes and an output node. A first control circuit has at least one input connected to one of the input nodes, a first output, and a second output which is the complement of the first output. A second control circuit has at least one input connected to one of the input nodes, a first output, and a second output which is the complement of the first output. A first switching circuit is connected between one of the input nodes and the output node and is controlled from the first output of the first control circuit the first output of the second switching circuit. A second switching circuit is connected between one of the input nodes and the output node and is controlled from the second output of the first control circuit the first output of the second switching circuit. A third switching circuit is connected between one of the input nodes and the output node and is controlled from the first output of the first control circuit the second output of the second switching circuit. A fourth switching circuit is connected between one of the input nodes and the output node and is controlled from the second output of the first control circuit the second output of the second switching circuit.
    • 逻辑功能模块包括多个输入节点和输出节点。 第一控制电路具有连接到输入节点之一,第一输出和作为第一输出的补码的第二输出的至少一个输入。 第二控制电路具有连接到输入节点之一,第一输出和作为第一输出的补码的第二输出的至少一个输入。 第一开关电路连接在输入节点之一和输出节点之间,并且由第一控制电路的第一输出端控制第二开关电路的第一输出。 第二开关电路连接在输入节点之一和输出节点之间,并从第一控制电路的第二输出端控制第二开关电路的第一输出。 第三开关电路连接在输入节点之一和输出节点之间,并从第一控制电路的第一输出端控制第二开关电路的第二输出。 第四开关电路连接在输入节点之一和输出节点之间,并从第一控制电路的第二输出端控制第二开关电路的第二输出。