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1. 发明授权

US07663136B2 Method of manufacturing amorphous NiO thin films and nonvolatile memory devices using the same 有权
标题翻译：制造非晶NiO薄膜的方法和使用其的非易失性存储器件
公开(公告)号：US07663136B2
公开(公告)日：2010-02-16
申请号：US11505968
申请日：2006-08-18
申请人： Sung-Ho Park , Bum-Seok Seo , Myoung-Jae Lee , June-Mo Koo , Sun-Ae Seo , Young-Kwan Cha
发明人： Sung-Ho Park , Bum-Seok Seo , Myoung-Jae Lee , June-Mo Koo , Sun-Ae Seo , Young-Kwan Cha
IPC分类号： H01L29/06
CPC分类号： H01L27/115 , C23C16/406 , C23C16/45553 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1616
摘要： Example embodiments relate to a method of manufacturing amorphous NiO thin films and nonvolatile memory devices including amorphous thin films that use a resistance material. Other example embodiments relate to a method of manufacturing amorphous NiO thin films having improved switching and resistance characteristics by reducing a leakage current and non-volatile memory devices using an amorphous NiO thin film. Provided is a method of manufacturing an amorphous NiO thin film having improved switching behavior by reducing leakage current and improving resistance characteristics. The method may include preparing a substrate in a vacuum chamber, preparing a nickel precursor material, preparing a source gas by vaporizing the nickel precursor material, preparing a reaction gas, preparing a purge gas and forming a monolayer NiO thin film on the substrate by performing one cycle of sequentially supplying the source gas, the purge gas, the reaction gas and the purge gas into the vacuum chamber.
摘要翻译：示例性实施例涉及制造非晶NiO薄膜的方法和包括使用电阻材料的非晶薄膜的非易失性存储器件。其他示例实施例涉及通过减少漏电流而制造具有改进的开关和电阻特性的非晶NiO薄膜的方法，以及使用非晶态NiO薄膜的非易失性存储器件。提供了通过减少漏电流和改善电阻特性来制造具有改进的开关行为的非晶NiO薄膜的方法。该方法可以包括在真空室中准备衬底，制备镍前体材料，通过汽化镍前体材料制备源气体，制备反应气体，制备吹扫气体，并在衬底上形成单层NiO薄膜，通过执行将源气体，净化气体，反应气体和吹扫气体依次供给到真空室中的一个循环。

2. 发明申请

US20070065961A1 Method of manufacturing amorphous NIO thin films and nonvolatile memory devices using the same 有权
标题翻译：制造非晶NIO薄膜的方法和使用其的非易失性存储器件
公开(公告)号：US20070065961A1
公开(公告)日：2007-03-22
申请号：US11505968
申请日：2006-08-18
申请人： Sung-Ho Park , Bum-Seok Seo , Myoung-Jae Lee , June-Mo Koo , Sun-Ae Seo , Young-Kwan Cha
发明人： Sung-Ho Park , Bum-Seok Seo , Myoung-Jae Lee , June-Mo Koo , Sun-Ae Seo , Young-Kwan Cha
IPC分类号： H01L21/00
CPC分类号： H01L27/115 , C23C16/406 , C23C16/45553 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1616
摘要： Example embodiments relate to a method of manufacturing amorphous NiO thin films and nonvolatile memory devices including amorphous thin films that use a resistance material. Other example embodiments relate to a method of manufacturing amorphous NiO thin films having improved switching and resistance characteristics by reducing a leakage current and non-volatile memory devices using an amorphous NiO thin film. Provided is a method of manufacturing an amorphous NiO thin film having improved switching behavior by reducing leakage current and improving resistance characteristics. The method may include preparing a substrate in a vacuum chamber, preparing a nickel precursor material, preparing a source gas by vaporizing the nickel precursor material, preparing a reaction gas, preparing a purge gas and forming a monolayer NiO thin film on the substrate by performing one cycle of sequentially supplying the source gas, the purge gas, the reaction gas and the purge gas into the vacuum chamber.
摘要翻译：示例性实施例涉及制造非晶NiO薄膜的方法和包括使用电阻材料的非晶薄膜的非易失性存储器件。其他示例实施例涉及通过减少漏电流而制造具有改进的开关和电阻特性的非晶NiO薄膜的方法，以及使用非晶态NiO薄膜的非易失性存储器件。提供了通过减少漏电流和改善电阻特性来制造具有改进的开关行为的非晶NiO薄膜的方法。该方法可以包括在真空室中准备衬底，制备镍前体材料，通过汽化镍前体材料制备源气体，制备反应气体，制备吹扫气体并通过执行在衬底上形成单层NiO薄膜将源气体，净化气体，反应气体和吹扫气体依次供给到真空室中的一个循环。

3. 发明申请

US20050156256A1 Method of fabricating lanthanum oxide layer and method of fabricating MOSFET and capacitor using the same 有权
标题翻译：制造氧化镧层的方法及使用其制造MOSFET和电容器的方法
公开(公告)号：US20050156256A1
公开(公告)日：2005-07-21
申请号：US11034512
申请日：2005-01-12
申请人： Jong-Pyo Kim , Jung-Hyun Lee , Bum-Seok Seo , Jung-Hyoung Lee
发明人： Jong-Pyo Kim , Jung-Hyun Lee , Bum-Seok Seo , Jung-Hyoung Lee
IPC分类号： H01L21/31 , C23C16/40 , H01L21/314 , H01L21/316 , H01L29/76
CPC分类号： H01L21/0228 , C23C16/40 , H01L21/02175 , H01L21/02192 , H01L21/022 , H01L21/28194 , H01L21/3141 , H01L21/31604 , H01L29/517
摘要： Methods of fabricating a lanthanum oxide layer, and methods of fabricating a MOSFET and/or a capacitor especially adapted for semiconductor applications using such a lanthanum oxide layer are disclosed. The methods include a preliminary step of disposing a semiconductor substrate into a chamber. Tris(bis(trimethylsilyl)amino)Lanthanum as a lanthanum precursor is then injected into the chamber such that the lanthanum precursor is chemisorbed on the semiconductor substrate. Then, after carrying out a first purge of the chamber, at least one oxidizer is injected into the chamber such that the oxidizer is chemisorbed with the lanthanum precursor on the semiconductor substrate. Then, the chamber is purged a second time. The described steps of injecting the lanthanum precursor into the chamber, first-purging the chamber, injecting an oxidizer into the chamber, and second-purging the chamber may be sequentially and repeatedly performed to form a lanthanum oxide layer of a desired thickness having enhanced semiconductor characteristics.
摘要翻译：公开了制造氧化镧层的方法以及特别适用于使用这种氧化镧层的半导体应用的MOSFET和/或电容器的制造方法。所述方法包括将半导体衬底设置到腔室中的预备步骤。然后将三（双（三甲基甲硅烷基）氨基）镧作为镧前体注入室中，使得镧前体在半导体衬底上被化学吸附。然后，在进行室的第一次吹扫之后，至少一个氧化剂被注入到室中，使得氧化剂与半导体衬底上的镧前体化学吸附。然后，房间被第二次清除。将镧前体注入到室中，首先清洗室，将氧化剂注入到室中，以及对室进行第二次净化的所述步骤可以被顺序地和重复地进行，以形成具有增强的半导体的所需厚度的氧化镧层特点

4. 发明授权

US07153786B2 Method of fabricating lanthanum oxide layer and method of fabricating MOSFET and capacitor using the same 有权
标题翻译：制造氧化镧层的方法及使用其制造MOSFET和电容器的方法
公开(公告)号：US07153786B2
公开(公告)日：2006-12-26
申请号：US11034512
申请日：2005-01-12
申请人： Jong-Pyo Kim , Jung-Hyun Lee , Bum-Seok Seo , Jung-Hyoung Lee
发明人： Jong-Pyo Kim , Jung-Hyun Lee , Bum-Seok Seo , Jung-Hyoung Lee
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/0228 , C23C16/40 , H01L21/02175 , H01L21/02192 , H01L21/022 , H01L21/28194 , H01L21/3141 , H01L21/31604 , H01L29/517
摘要： Methods of fabricating a lanthanum oxide layer, and methods of fabricating a MOSFET and/or a capacitor especially adapted for semiconductor applications using such a lanthanum oxide layer are disclosed. The methods include a preliminary step of disposing a semiconductor substrate into a chamber. Tris(bis(trimethylsilyl)amino)Lanthanum as a lanthanum precursor is then injected into the chamber such that the lanthanum precursor is chemisorbed on the semiconductor substrate. Then, after carrying out a first purge of the chamber, at least one oxidizer is injected into the chamber such that the oxidizer is chemisorbed with the lanthanum precursor on the semiconductor substrate. Then, the chamber is purged a second time. The described steps of injecting the lanthanum precursor into the chamber, first-purging the chamber, injecting an oxidizer into the chamber, and second-purging the chamber may be sequentially and repeatedly performed to form a lanthanum oxide layer of a desired thickness having enhanced semiconductor characteristics.
摘要翻译：公开了制造氧化镧层的方法以及特别适用于使用这种氧化镧层的半导体应用的MOSFET和/或电容器的制造方法。所述方法包括将半导体衬底设置到腔室中的预备步骤。然后将三（双（三甲基甲硅烷基）氨基）镧作为镧前体注入室中，使得镧前体在半导体衬底上被化学吸附。然后，在进行室的第一次吹扫之后，至少一个氧化剂被注入到室中，使得氧化剂与半导体衬底上的镧前体化学吸附。然后，房间被第二次清除。将镧前体注入到室中，首先清洗室，将氧化剂注入到室中，以及对室进行第二次净化的所述步骤可以被顺序地和重复地进行，以形成具有增强的半导体的所需厚度的氧化镧层特点

5. 发明授权

US09356071B2 Methods of forming patterns and methods of manufacturing semiconductor devices using the same 有权
公开(公告)号：US09356071B2
公开(公告)日：2016-05-31
申请号：US14804310
申请日：2015-07-20
申请人： Bum-Seok Seo , Ki-Joon Kim , Kil-Ho Lee
发明人： Bum-Seok Seo , Ki-Joon Kim , Kil-Ho Lee
IPC分类号： H01L27/22 , H01L43/12 , H01L43/02 , H01L43/08 , H01L21/311 , H01L29/82 , H01L21/033 , H01L21/768
CPC分类号： H01L27/228 , H01L21/0337 , H01L21/31144 , H01L21/76816 , H01L29/82 , H01L43/02 , H01L43/08 , H01L43/12
摘要： An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.

6. 发明申请

US20070059447A1 Method of fabricating lanthanum oxide layer and method of fabricating MOSFET and capacitor using the same 审中-公开
标题翻译：制造氧化镧层的方法及使用其制造MOSFET和电容器的方法
公开(公告)号：US20070059447A1
公开(公告)日：2007-03-15
申请号：US11599207
申请日：2006-11-14
申请人： Jong-Pyo Kim , Jung-Hyun Lee , Bum-Seok Seo , Jung-Hyoung Lee
发明人： Jong-Pyo Kim , Jung-Hyun Lee , Bum-Seok Seo , Jung-Hyoung Lee
IPC分类号： C23C16/00
CPC分类号： H01L21/0228 , C23C16/40 , H01L21/02175 , H01L21/02192 , H01L21/022 , H01L21/28194 , H01L21/3141 , H01L21/31604 , H01L29/517
摘要： Methods of fabricating a lanthanum oxide layer, and methods of fabricating a MOSFET and/or a capacitor especially adapted for semiconductor applications using such a lanthanum oxide layer are disclosed. The methods include a preliminary step of disposing a semiconductor substrate into a chamber. Tris(bis(trimethylsilyl)amino)Lanthanum as a lanthanum precursor is then injected into the chamber such that the lanthanum precursor is chemisorbed on the semiconductor substrate. Then, after carrying out a first purge of the chamber, at least one oxidizer is injected into the chamber such that the oxidizer is chemisorbed with the lanthanum precursor on the semiconductor substrate. Then, the chamber is purged a second time. The described steps of injecting the lanthanum precursor into the chamber, first-purging the chamber, injecting an oxidizer into the chamber, and second-purging the chamber may be sequentially and repeatedly performed to form a lanthanum oxide layer of a desired thickness having enhanced semiconductor characteristics.
摘要翻译：公开了制造氧化镧层的方法以及特别适用于使用这种氧化镧层的半导体应用的MOSFET和/或电容器的制造方法。所述方法包括将半导体衬底设置到腔室中的预备步骤。然后将三（双（三甲基甲硅烷基）氨基）镧作为镧前体注入室中，使得镧前体在半导体衬底上被化学吸附。然后，在进行室的第一次吹扫之后，至少一个氧化剂被注入到室中，使得氧化剂与半导体衬底上的镧前体化学吸附。然后，房间被第二次清除。将镧前体注入到室中，首先清洗室，将氧化剂注入到室中，以及对室进行第二次净化的所述步骤可以被顺序地和重复地进行，以形成具有增强的半导体的所需厚度的氧化镧层特点

7. 发明授权

US09118002B2 Methods of forming patterns and methods of manufacturing semiconductor devices using the same 有权
标题翻译：形成图案的方法和使用其制造半导体器件的方法
公开(公告)号：US09118002B2
公开(公告)日：2015-08-25
申请号：US14210329
申请日：2014-03-13
申请人： Bum-Seok Seo , Ki-Joon Kim , Kil-Ho Lee
发明人： Bum-Seok Seo , Ki-Joon Kim , Kil-Ho Lee
IPC分类号： H01L43/02 , H01L43/12 , H01L21/311 , H01L29/82 , H01L21/033 , H01L21/768
CPC分类号： H01L27/228 , H01L21/0337 , H01L21/31144 , H01L21/76816 , H01L29/82 , H01L43/02 , H01L43/08 , H01L43/12
摘要： An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.
摘要翻译：在基板上形成绝缘层。在绝缘层上形成第一掩模。第一掩模包括沿第二方向布置的多个线图案。多个线图案沿着基本上垂直于第二方向的第一方向延伸。在绝缘层和第一掩模上形成第二掩模。第二掩模包括部分地暴露多个线图案的开口。开口在第一方向的第一端部和第一方向的第三方向的第二方向的第一方向的一侧具有不均匀的边界。使用第一掩模和第二掩模作为蚀刻掩模来部分去除绝缘层，从而形成多个第一沟槽和第二沟槽。多个第一沟槽和第二沟槽以交错图案布置。

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