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1. 发明公开

EP0817081A3 Flushing of cache memory in a computer system 失效
标题翻译：在计算机系统中刷新高速缓冲存储器
公开(公告)号：EP0817081A3
公开(公告)日：1998-02-04
申请号：EP97304796.2
申请日：1997-06-30
申请人： SUN MICROSYSTEMS, INC.
发明人： Hagersten, Erik E. , Guzovskiy, Aleksandr
IPC分类号： G06F12/08
CPC分类号： G06F12/0813 , G06F12/0808 , G06F2212/2542
摘要： An efficient streamlined cache coherent protocol for replacing data is provided in a multiprocessor distributed-memory computer system. In one implementation, the computer system includes a plurality of subsystems, each subsystem includes at least one processor and an associated cache and directory. The subsystems are coupled to a global interconnect via global interfaces. In one embodiment, when data is replaced from a requesting subsystem, an asynchronous flush operation is initiated. In this implementation, the flush operation includes a pair of decoupled local flush instruction and corresponding global flush instruction. By decoupling the local flush instructions from the global flush instructions, once the requesting processor in the requesting subsystem is done issuing the local flush instruction, the requesting processor does not have to wait for a corresponding response from home location associated with the data being replaced. Instead, the requesting processor is freed up quickly since there is no need to wait for an acknowledgment from the home location (home subsystem) over the global interconnect. The home subsystem responds with an appropriate ACK message. The requesting subsystem reissues a read-to-own (RTO) transaction on its local interconnect thereby retrieving and invalidating any copy(s) of the data in the requesting subsystem. A Completion message is sent to the home subsystem together with the dirty data. Subsequently, a confirmation of the completion of the flush operation can be implemented using a "synchronization" mechanism to verify that all previously valid cache lines associated with a page have been successfully replaced with respect to their home location and the replaced cache lines are now marked "invalid" at the home subsystem.
摘要翻译：在多处理器分布式存储器计算机系统中提供了用于替换数据的有效简化的高速缓存一致性协议。在一个实现中，计算机系统包括多个子系统，每个子系统包括至少一个处理器和关联的高速缓存和目录。子系统通过全局接口连接到全局互连。在一个实施例中，当数据从请求子系统被替换时，启动异步刷新操作。在这个实现中，刷新操作包括一对分离的本地刷新指令和相应的全局刷新指令。通过将本地清除指令与全局清除指令解耦，一旦请求子系统中的请求处理器完成了本地清除指令的发出，请求处理器就不必等待与被替换的数据相关联的来自本地位置的相应响应。相反，请求处理器被快速释放，因为不需要等待来自家庭位置（家庭子系统）的通过全局互连的确认。家庭子系统用适当的ACK消息进行响应。请求子系统在其本地互连上重新发出读取到拥有（RTO）事务，从而检索并使请求子系统中的任何数据副本无效。完成消息与脏数据一起发送到家庭子系统。随后，可以使用“同步”机制来实现对刷新操作的完成的确认，以验证与页面相关联的所有先前有效的高速缓存行已经相对于其归属位置被成功替换，并且现在替换的高速缓存行被标记家庭子系统中的“无效”。

2. 发明授权

EP0817063B1 Encoding method for directory state in cache coherent distributed shared memory system 失效
标题翻译：编码的目录状态的方法与相干缓冲器公共的共享存储器系统
公开(公告)号：EP0817063B1
公开(公告)日：2003-12-17
申请号：EP97304387.0
申请日：1997-06-23
申请人： Sun Microsystems, Inc.
发明人： Guzovskiy, Aleksandr , Zak, Robert C., Jr. , Bromley, Mark
IPC分类号： G06F12/08
CPC分类号： G06F12/0826

3. 发明公开

EP0817075A1 A multiprocessing system configured to perform synchronization operations 失效
标题翻译： Ein Mehrrechnersystem，das konfiguriert ist，um Synchronisierungsoperationenauszuführen
公开(公告)号：EP0817075A1
公开(公告)日：1998-01-07
申请号：EP97304651.9
申请日：1997-06-27
申请人： SUN MICROSYSTEMS, INC.
发明人： Hagersten, Erik E. , Zak, Robert C. Jr. , Yang, Shaw-Wen , Guzovskiy, Aleksandr , Nesheim, William A. , Wong-Chan, Monica C. , Nguyen, Hien R.
IPC分类号： G06F12/08 , G06F13/38
CPC分类号： G06F9/52 , G06F12/0828
摘要： When a processor within a computer system performs a synchronization operation, the system interface within the node delays subsequent transactions from the processor until outstanding coherency activity is completed. Therefore, the computer system may employ asynchronous operations. The synchronization operations may be used when needed to guarantee global completion of one or more prior asynchronous operations. In one embodiment, the synchronization operation is placed into a queue within the system interface. When the synchronization operation reaches the head of the queue, it may be initiated within the system interface. The system interface further includes a request agent comprising multiple control units, each of which may concurrently service coherency activity with respect to a different transaction. Furthermore, the system interface includes a synchronization control vector register which stores a bit for each control unit. Upon initiation of the synchronization operation within the system interface, bits corresponding to those control units which are performing coherency activity (i.e. those which are not idle) are set while other bits are cleared. As each control unit returns to the idle state, the corresponding bit -is cleared as well. Once all the bits within the synchronization control vector register are cleared, the coherency activity which was outstanding when the synchronization operation was initiated is complete. The synchronization operation may then be completed.
摘要翻译：当计算机系统内的处理器执行同步操作时，节点内的系统接口将延迟来自处理器的后续事务，直到完成一致的一致性活动。因此，计算机系统可以采用异步操作。当需要保证一个或多个现有异步操作的全局完成时，可以使用同步操作。在一个实施例中，同步操作被放置在系统接口内的队列中。当同步操作到达队列的头部时，可以在系统界面内启动。系统接口还包括包括多个控制单元的请求代理，每个控制单元可以相对于不同的事务同时服务一致性活动。此外，系统接口包括存储每个控制单元的位的同步控制向量寄存器。当在系统接口内启动同步操作时，与执行一致性活动的那些控制单元相对应的位（即那些不是空闲的）被设置，而其他位被清除。当每个控制单元返回到空闲状态时，相应的位也被清除。一旦清除了同步控制向量寄存器中的所有位，则完成同步操作时未完成的一致性活动。然后可以完成同步操作。

4. 发明公开

EP0817063A3 Encoding method for directory state in cache coherent distributed shared memory system 失效
标题翻译：编码的目录状态的方法与相干缓冲器公共的共享存储器系统
公开(公告)号：EP0817063A3
公开(公告)日：1999-01-27
申请号：EP97304387.0
申请日：1997-06-23
申请人： SUN MICROSYSTEMS, INC.
发明人： Guzovskiy, Aleksandr , Zak, Robert C., Jr. , Bromley, Mark
IPC分类号： G06F12/08
CPC分类号： G06F12/0826
摘要： A directory system directs cache line access requests from processors in a multi-processor system with a shared memory system through a cache line states directory. The cache line states directory stores a state value that identifies a cache line shared states word. The cache line shared states word identifies the processor that owns the cache line and the state of access of each processor that shares access to the cache line. A state value encoder encodes a cache line shared state word into a state value and loads the state value into the cache line states directory. A state value decoder decodes the state value into a cache line shared state word for use by the cache line directory system in retrieving the cache line. A plurality of cache line tables are used with each cache line assigned to one of the tables. The cache line table stores a state value for each cache line shared states word stored in the table. The encoder and decoder perform a table look-up to convert between a cache line shared state word and a state value. Each of said cache line tables stores an ordered list of cache line shared state words and their corresponding state values. The ordered list is a list of cache line shared state words that have the most significance to the multi-processor system.

5. 发明公开

EP0817063A2 Encoding method for directory state in cache coherent distributed shared memory system 失效
标题翻译：编码的目录状态的方法与相干缓冲器公共的共享存储器系统
公开(公告)号：EP0817063A2
公开(公告)日：1998-01-07
申请号：EP97304387.0
申请日：1997-06-23
申请人： SUN MICROSYSTEMS, INC.
发明人： Guzovskiy, Aleksandr , Zak, Robert C., Jr. , Bromley, Mark
IPC分类号： G06F12/08
CPC分类号： G06F12/0826
摘要： A directory system directs cache line access requests from processors in a multi-processor system with a shared memory system through a cache line states directory. The cache line states directory stores a state value that identifies a cache line shared states word. The cache line shared states word identifies the processor that owns the cache line and the state of access of each processor that shares access to the cache line.
A state value encoder encodes a cache line shared state word into a state value and loads the state value into the cache line states directory. A state value decoder decodes the state value into a cache line shared state word for use by the cache line directory system in retrieving the cache line. A plurality of cache line tables are used with each cache line assigned to one of the tables. The cache line table stores a state value for each cache line shared states word stored in the table. The encoder and decoder perform a table look-up to convert between a cache line shared state word and a state value. Each of said cache line tables stores an ordered list of cache line shared state words and their corresponding state values. The ordered list is a list of cache line shared state words that have the most significance to the multi-processor system.
摘要翻译：从处理器通过一个高速缓存行的目录系统ausrichtet高速缓存线的访问请求与共享存储器系统的多处理器系统规定的目录。高速缓存行规定目录存储的状态值没有标识的缓存行的共享状态字。高速缓存行的共享状态字标识处理器确实拥有高速缓存行，每个处理器的访问的状态的确股进入高速缓存行。状态值编码器编码的高速缓存线的共享状态字到状态值并加载状态值到高速缓存线状态的目录。状态值译码器中检索所述高速缓存线的状态值转换成用于由高速缓存行目录系统中使用的高速缓存线的共享状态字进行解码。高速缓存行的表的多个被用于与分配给一个表的每个高速缓存行。该高速缓存线表存储用于存储在所述表中的每个高速缓存线的共享状态字的状态值。该编码器和解码器执行表查找以高速缓存行共享状态字和一个状态值之间进行转换。每个所述高速缓存行的表存储在缓存行的共享状态字和它们对应的状态值有序列表。有序列表的是高速缓存线的共享状态字的列表thathave到多处理器系统中最显着性。

6. 发明公开

EP0817039A3 Maintaining a sequential store order (SSO) in a non-SSO machine 失效
标题翻译：在非SSO单元接收顺序存储器命令（SSO）
公开(公告)号：EP0817039A3
公开(公告)日：2003-02-12
申请号：EP97304386.2
申请日：1997-06-23
申请人： SUN MICROSYSTEMS, INC.
发明人： Guzovskiy, Aleksandr , Nesheim, William A. , Singhal, Ashok
IPC分类号： G06F9/46
CPC分类号： G06F9/52
摘要： In a multiprocessor system, a method, apparatus, and article of manufacture for maintaining the proper sequence of store/write operations between multiple processors to remote I/O devices without requiring changes to application software. A synchronizer is employed to synchronize write operations to the remote I/O device, and the write operations are synchronized individually upon detection and emulation, or as a group upon detection of the release of a mutual exclusion lock.

7. 发明公开

EP0817039A2 Maintaining a sequential store order (SSO) in a non-SSO machine 失效
标题翻译：在einem Nicht-SSO-Gerät中的Erhalten序列号Speicherkommandos（SSO）
公开(公告)号：EP0817039A2
公开(公告)日：1998-01-07
申请号：EP97304386.2
申请日：1997-06-23
申请人： SUN MICROSYSTEMS, INC.
发明人： Guzovskiy, Aleksandr , Nesheim, William A. , Singhal, Ashok
IPC分类号： G06F9/46
CPC分类号： G06F9/52
摘要： In a multiprocessor system, a method, apparatus, and article of manufacture for maintaining the proper sequence of store/write operations between multiple processors to remote I/O devices without requiring changes to application software. A synchronizer is employed to synchronize write operations to the remote I/O device, and the write operations are synchronized individually upon detection and emulation, or as a group upon detection of the release of a mutual exclusion lock.
摘要翻译：在多处理器系统中，一种方法，装置和制品，用于将多个处理器之间的存储/写入操作的适当序列维持到远程I / O设备，而不需要更改应用软件。使用同步器将写入操作与远程I / O设备同步，并且在检测和仿真时单独同步写入操作，或者在检测到互斥锁的释放时作为组。

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