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1. 发明专利

JP2012199398A COMPOUND GaN SUBSTRATE, MANUFACTURING METHOD OF THE SAME, GROUP III NITRIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 审中-公开
标题翻译：化合物GaN衬底，其制造方法，III族氮化物半导体器件及其制造方法
公开(公告)号：JP2012199398A
公开(公告)日：2012-10-18
申请号：JP2011062795
申请日：2011-03-22
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： KIYAMA MAKOTO , MATSUBARA HIDEKI , OKAHISA TAKUJI
IPC分类号： H01L21/338 , C23C16/34 , H01L21/205 , H01L29/778 , H01L29/812
CPC分类号： H01L29/2003 , C30B29/406 , H01L21/02389 , H01L21/0254 , H01L21/02579 , H01L21/02581 , H01L21/0262 , H01L29/66462 , H01L29/7787 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a high performance and reasonably priced compound GaN substrate, a manufacturing method of the same, a group III nitride semiconductor device and a manufacturing method of the same.SOLUTION: The present compound GaN substrate 1 includes: a conductive GaN substrate 10 which has resistivity of less than 1 Ωcm; and a semi-insulating GaN layer 20 arranged on the conductive GaN substrate 10, which has resistivity of 1×10Ωcm and over and a thickness of 5 μm and over. The group III nitride semiconductor device 2 includes: the above-described compound GaN substrate 1; and at least one layer of a group III nitride semiconductor layer 30 arranged on the semi-insulating GaN layer 20 of the compound GaN substrate 1.
摘要翻译：要解决的问题：为了提供高性能且价格合理的复合GaN衬底，其制造方法，III族氮化物半导体器件及其制造方法。本发明的化合物GaN衬底1包括：电阻率小于1Ωcm的导电GaN衬底10; 以及布置在导电性GaN衬底10上的半绝缘GaN层20，其电阻率为1×10 4 Ωcm并且厚度为5μm以上。 III族氮化物半导体器件2包括：上述化合物GaN衬底1; 以及布置在化合物GaN衬底1的半绝缘GaN层20上的III族氮化物半导体层30的至少一层。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2012134548A Manufacturing method of group iii nitride crystal 审中-公开
标题翻译： III类硝酸盐晶体的制备方法
公开(公告)号：JP2012134548A
公开(公告)日：2012-07-12
申请号：JP2012060084
申请日：2012-03-16
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： KASAI HITOSHI , OKAHISA TAKUJI , FUJITA SHUNSUKE , MATSUMOTO NAOKI , IJIRI HIDEYUKI , SATO FUMITAKA , MOTOKI KENSAKU , NAKAHATA SEIJI , UEMATSU KOJI , HIROTA TATSU
IPC分类号： H01L21/205 , C23C16/34 , C23C16/44 , C30B15/00 , C30B29/38
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a group III nitride crystal including a method for effectively cleaning deposits adhering to the interior of a reaction chamber during crystal growth.SOLUTION: A growth method of a group III nitride crystal 11 includes a step of cleaning the interior of a reaction chamber 110 by introducing a HCl gas 1 into the reaction chamber 110 and a step of vapor-depositing the group III nitride crystal 11 while doping a Si atom in the cleaned reaction chamber 110. Alternatively, this growth method includes a step of cleaning the interior of the reaction chamber 110 by introducing the HCl gas 1 into the reaction chamber 110 and a step of vapor-depositing the group III nitride crystal 11 while trapping an ammonia chloride powder generated as a by-product in a trap device 116 mounted on the cleaned reaction chamber 110.
摘要翻译：解决的问题：提供一种III族氮化物晶体的制造方法，其包括在晶体生长期间有效地清除附着在反应室内部的沉积物的方法。解决方案：III族氮化物晶体11的生长方法包括通过将HCl气体1引入反应室110中来清洁反应室110的内部的步骤，以及气相沉积III族氮化物晶体的步骤或者，该生长方法包括通过将HCl气体1引入反应室110来清洁反应室110的内部的步骤，以及蒸发沉积该反应室的步骤 III族氮化物晶体11，同时将作为副产物产生的氯化氨粉末捕获在安装在清洁的反应室110上的捕集装置116中。（C）2012，JPO＆INPIT

3. 发明专利

JP2011139084A Epitaxial substrate and semiconductor element 有权
标题翻译：外延衬底和半导体元件
公开(公告)号：JP2011139084A
公开(公告)日：2011-07-14
申请号：JP2011029890
申请日：2011-02-15
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： KIYAMA MAKOTO , OKAHISA TAKUJI , SAKURADA TAKASHI
IPC分类号： H01L21/20 , H01L21/329 , H01L21/336 , H01L29/12 , H01L29/47 , H01L29/78 , H01L29/861 , H01L29/868 , H01L29/872
CPC分类号： H01L29/7802 , H01L29/045 , H01L29/2003 , H01L29/41741 , H01L29/4238 , H01L29/861 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a group-III nitride semiconductor element having a structure capable of improving a backward withstand voltage.
SOLUTION: In a Schottky diode 11, a gallium nitride support base 13 includes a first surface 13a and a second surface 13b opposite from the first surface and has a carrier concentration exceeding 1×10
18 cm
-3 . A gallium nitride epitaxial layer 15 is disposed on the first surface 13a. An Ohmic electrode 17 is disposed on the second surface 13b. The Schottky electrode 19 is disposed on the gallium nitride epitaxial layer 15. A thickness D1 of the gallium nitride epitaxial layer 15 is at least 5 μm and no more than 1,000 μm. Also, the carrier density of the gallium nitride epitaxial layer 15 is at least 1×10
14 cm
-3 and no more than 1×10
17 cm
-3 .
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供具有能够提高反向耐受电压的结构的III族氮化物半导体元件。解决方案：在肖特基二极管11中，氮化镓支撑基底13包括第一表面13a和与第一表面相对的第二表面13b，其载流子浓度超过1×10 30 SP -3 。氮化镓外延层15设置在第一表面13a上。欧姆电极17设置在第二表面13b上。肖特基电极19设置在氮化镓外延层15上。氮化镓外延层15的厚度D1至少为5μm且不大于1000μm。此外，氮化镓外延层15的载流子密度至少为1×10 14 / SP 3，而不超过1×10 17 厘米 -3 。版权所有（C）2011，JPO＆INPIT

4. 发明专利

JP2009161433A GaN SINGLE CRYSTAL SUBSTRATE, METHOD FOR MANUFACTURING GaN SINGLE CRYSTAL SUBSTRATE, LIGHT-EMITTING ELEMENT MANUFACTURED ON GaN SINGLE CRYSTAL SUBSTRATE AND METHOD FOR MANUFACTURING THE LIGHT-EMITTING ELEMENT 审中-公开
标题翻译： GaN单晶衬底，制造GaN单晶衬底的方法，制造GaN单晶衬底的发光元件及其制造发光元件的方法
公开(公告)号：JP2009161433A
公开(公告)日：2009-07-23
申请号：JP2009022836
申请日：2009-02-03
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： MOTOKI KENSAKU , OKAHISA TAKUJI , MATSUMOTO NAOKI
IPC分类号： C30B33/00 , C30B29/38 , H01L33/32
摘要： PROBLEM TO BE SOLVED: To provide a GaN single crystal substrate which has a wide area and little warp and is self-supportable; and to provide a method for manufacturing the same. SOLUTION: The GaN single crystal substrate has a diameter of ≥20 mm and a thickness of ≥0.07 mm, and is self-supportable and characterized in that the angle formed by the normal line of a polished substrate surface and the normal line of the crystal plane of a low plane index having highest parallelism with the polished substrate surface is ≤3° in the substrate, at least one surface is polished, and the content of carbon contained in the crystal is a background level of the analysis. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供具有宽的面积和小的翘曲并且是可自我支撑的GaN单晶衬底; 并提供其制造方法。解决方案：GaN单晶基板的直径为≥20mm，厚度为≥0.07mm，是自支撑的，其特征在于，由抛光的基板表面的法线和法线形成的角度与抛光的基板表面具有最高平行度的低平面折射率的晶面在基板中≤3°，抛光至少一个表面，并且晶体中包含的碳含量是分析的背景水平。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2009126722A Group iii nitride semiconductor crystal substrate and semiconductor device 有权
标题翻译： III类氮化物半导体晶体基板和半导体器件
公开(公告)号：JP2009126722A
公开(公告)日：2009-06-11
申请号：JP2007300460
申请日：2007-11-20
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： OKAHISA TAKUJI , KAWASE TOMOHIRO , KAMIMURA TOMOYOSHI , NISHIOKA SHIKO , ARAKAWA SATOSHI
IPC分类号： C30B29/38 , C23C16/34 , H01L21/205 , H01L29/47 , H01L29/872 , H01L33/32
CPC分类号： H01L29/2003 , C30B25/02 , C30B29/403
摘要： PROBLEM TO BE SOLVED: To provide a group III nitride semiconductor crystal substrate allowing the resistivity to be reduced and preventing degradation of the resistivity in-plane distribution. SOLUTION: The group III nitride semiconductor crystal substrate is a group III nitride semiconductor crystal substrate 20a having a diameter of at least 25 mm and not more than 160 mm. The resistivity of the group III nitride semiconductor crystal substrate 20a is at least 1×10 -4 Ωcm and not more than 0.1 Ωcm. The resistivity distribution in the diameter direction of the group III nitride semiconductor crystal substrate 20a is at least -30% and not more than 30%. The resistivity distribution in the thickness direction of the group III nitride semiconductor crystal substrate 20a is at least -16% and not more than 16%. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供允许电阻率降低并防止电阻率面内分布的劣化的III族氮化物半导体晶体基板。解决方案：III族氮化物半导体晶体衬底是具有至少25mm且不大于160mm的直径的III族氮化物半导体晶体衬底20a。 III族氮化物半导体晶体基板20a的电阻率至少为1×10 -6 -4Ωcm，不大于0.1Ωcm。 III族氮化物半导体晶体基板20a的直径方向的电阻率分布为-30％以上且30％以下。 III族氮化物半导体晶体基板20a的厚度方向的电阻率分布为16％以上且16％以下。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2006273716A METHOD OF MANUFACTURING GaN SINGLE CRYSTAL SUBSTRATE 有权
标题翻译：制造GaN单晶基板的方法
公开(公告)号：JP2006273716A
公开(公告)日：2006-10-12
申请号：JP2006167953
申请日：2006-06-16
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： MOTOKI KENSAKU , OKAHISA TAKUJI , MATSUMOTO NAOKI
IPC分类号： C30B29/38 , C30B33/00 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a GaN single crystal substrate in which crystal defects such as dislocations are reduced.
SOLUTION: The method of manufacturing the GaN single crystal substrate comprises an ingot forming step of forming an ingot 64 of a GaN single crystal by growing an epitaxial layer 62 comprising a hexagonal GaN on a GaN single crystal being a seed crystal and a cutting step for cutting the formed ingot 64 into a plurality of sheets.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造其中晶体缺陷如位错的GaN单晶衬底的制造方法。解决方案：制造GaN单晶衬底的方法包括：通过在作为晶种的GaN单晶上生长包括六边形GaN的外延层62，形成GaN单晶锭64的锭形成步骤和切割步骤，用于将形成的锭64切割成多个片材。版权所有（C）2007，JPO＆INPIT

7. 发明专利

JP2006265101A Gallium nitride crystal, gallium nitride substrate and semiconductor laser device 有权
标题翻译：硝酸锌晶体，氮化镓基板和半导体激光器件
公开(公告)号：JP2006265101A
公开(公告)日：2006-10-05
申请号：JP2006174864
申请日：2006-06-26
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： MOTOKI KENSAKU , OKAHISA TAKUJI , NAKAHATA SEIJI , HIROTA TATSU , UEMATSU KOJI
IPC分类号： C30B29/38 , H01S5/323
摘要： PROBLEM TO BE SOLVED: To solve such difficult problems, associated with the facet growth method in which gallium nitride is grown while facets are formed and maintained, wherein, for example, planar defects develop radially, while dislocations spread mistily from a pit center region composed of the facet faces and, as a result, a device cannot be designed on a substrate because the formation position of the pit is uncontrollable. SOLUTION: Seeds are arranged in a regular pattern on a ground substrate, on which GaN is facet-grown while forming and maintaining the pits consisting of the facets. Closed defect accumulating regions H are made on the pit bottoms composed of the facet faces, to which the dislocations are assembled so that the surrounding accompanying low dislocation single crystal regions Z and extra low dislocation single crystal regions Y are low-dislocated. The closed defect accumulating regions H are closed so that the dislocations are arrested and their release is forbidden. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了解决与在形成和保持小面时生长氮化镓的小面生长方法相关的这样的困难问题，其中例如平面缺陷径向发展，同时位错从凹坑中传播中心区域由小平面组成，因此，由于凹坑的形成位置是不可控制的，因此不能将设备设计在基板上。解决方案：将种子以规则图案排列在接地衬底上，在其上形成并保持由小面组成的凹坑，在其上面生长GaN。闭合缺陷积聚区域H由在由面形成的凹坑底部形成，位错组装在其上，使得周围伴随的低位错单晶区域Z和极低位错单晶区域Y位错。闭合的缺陷积聚区域H被封闭，使得位错被阻止并且它们的释放被禁止。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2003031509A Method for manufacturing compound semiconductor 有权
标题翻译：制造化合物半导体的方法
公开(公告)号：JP2003031509A
公开(公告)日：2003-01-31
申请号：JP2001218681
申请日：2001-07-18
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： OKAHISA TAKUJI , TAKEMOTO KIKUROU , MOTOKI KENSAKU , KOKETSU AKINORI
IPC分类号： H01L21/205 , H01L21/302 , H01L21/306 , H01L21/3065 , H01L33/32
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a compound semiconductor, capable of forming a good nitride base compound semiconductor layer on a GaN single-crystal substrate.
SOLUTION: This method for manufacturing the compound semiconductor, provided with the nitride base compound semiconductor layer 2 on the GaN single-crystal substrate 1 comprises a gas phase etching step for etching the surface layer of the substrate 1 by heating the GaN single-crystal substrate 1 in a mixed gas atmosphere containing hydrogen chloride gas, and a semiconductor layer growing step for forming the nitride base compound semiconductor layer, by supplying the raw material of the nitride base compound semiconductor layer 2 onto the GaN single-crystal substrate 1 after the gas phase etching step.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供能够在GaN单晶衬底上形成良好的氮化物基化合物半导体层的化合物半导体的制造方法。解决方案：在GaN单晶衬底1上设置有氮化物基化合物半导体层2的化合物半导体的制造方法包括气相蚀刻工序，用于通过加热GaN单晶衬底来蚀刻衬底1的表面层 1，在含有氯化氢气体的混合气体气氛中，以及用于形成氮化物基础化合物半导体层的半导体层生长步骤，通过在氮化物基础化合物半导体层2的原料在气体相蚀刻步骤。

9. 发明专利

JP2011256082A FREESTANDING GaN CRYSTAL SUBSTRATE AND METHOD OF MANUFACTURING SAME 审中-公开
标题翻译：自由GaN晶体基板及其制造方法
公开(公告)号：JP2011256082A
公开(公告)日：2011-12-22
申请号：JP2010132623
申请日：2010-06-10
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： FUJIWARA SHINSUKE , UEMATSU KOJI , KASAI HITOSHI , OKAHISA TAKUJI
IPC分类号： C30B29/38 , C30B25/16 , H01L21/205
CPC分类号： H01L33/325 , C30B25/02 , C30B29/406 , H01L21/0237 , H01L21/02389 , H01L21/0254 , H01L21/02576 , H01L21/02609 , H01L21/02664
摘要： PROBLEM TO BE SOLVED: To provide a freestanding GaN crystal substrate that is electrically conductive and emits little yellow light from all surfaces, and to provide a method of manufacturing the same.SOLUTION: The freestanding GaN crystal substrate is grown by an HVPE (Hydride Vapor Phase Epitaxy) method in such a state that the (0001) face and at least either of the {10-11} face and the {11-22} face exist in a mixed state, as a crystal growth surface excluding crystal side surfaces. In the (0001) face growth crystal region, the carbon concentration is ≤5×10at/cm, the silicon concentration is ≥5×10at/cmand ≤2×10at/cm, and the oxygen concentration is ≤1×10at/cm, and in a faceted crystal region, grown using at least either of the {10-11} face and the {11-22} face as a growth face, the carbon concentration is ≤3×10at/cm, the silicon concentration is ≤5×10at/cm, and the oxygen concentration is ≥5×10at/cmand ≤5×10at/cm.
摘要翻译：要解决的问题：提供一种独立的GaN晶体基板，其具有导电性并且从所有表面发射少量黄光，并提供其制造方法。解决方案：通过HVPE（氢化物气相外延）方法，在（0001）面和ä10-11}面和ä11-22}面中的至少任一面的状态下，独立GaN晶体衬底生长以混合状态存在，作为不包括晶体侧表面的晶体生长表面。在（0001）面生长晶体区域中，在/ cm 2处的碳浓度为≤5×10 16 ，硅浓度在/ cm 3 和≤2×10 18时，≥5×10 17 / SP> at / cm 3 ，氧浓度≤1×10 17 at / cm 3 ，并且在使用ä10-11}面和ä11-22}面中的至少任一个生长的小平面晶体区域作为生长面，碳浓度为≤3×10 16 在/ cm 3 时，硅浓度≤5×10 17 / cm 3 ，氧浓度≥5×10 17 at / cm 3 和/ 5 3 中的≤5×10 18 。版权所有（C）2012，JPO＆INPIT

10. 发明专利

JP2010254576A SINGLE CRYSTAL GaN SUBSTRATE 有权
标题翻译：单晶GaN衬底
公开(公告)号：JP2010254576A
公开(公告)日：2010-11-11
申请号：JP2010175231
申请日：2010-08-04
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： MOTOKI KENSAKU , KASAI HITOSHI , OKAHISA TAKUJI
IPC分类号： C30B29/38 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method for producing a GaN substrate and a GaN substrate having low penetration dislocation density and no flux of dislocation present even on the substrate surface and preventing disturbance in a cleavage plane. SOLUTION: The substrate is obtained by growing a GaN single crystal on a substrate in a vapor phase and slicing the GaN single crystal ingot obtained by the vapor phase growth along a plane parallel to the growth direction. When the crystal is sliced parallel to the growth direction, that is, the crystal is sliced parallel to an extending direction of dislocations as dislocations run in the growth direction. As the dislocations run parallel to the surface in the sliced substrate, which results in low dislocation density. The substrate is further used as a seed crystal to grow GaN. Since the surface dislocation density is low, the GaN grown in the second time has fewer dislocations, which can be also used as a GaN substrate. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造具有低穿透位错密度的GaN衬底和GaN衬底的方法，并且即使在衬底表面上也没有存在位错磁通，并且防止了解理面中的干扰。解决方案：通过在气相中在衬底上生长GaN单晶并通过平行于生长方向的平面将通过气相生长获得的GaN单晶锭切片来获得衬底。当晶体平行于生长方向切片时，即随着位错沿生长方向运动，晶体被平行于位错的延伸方向切片。当位错平行于切片的基底中的表面延伸时，这导致位错密度低。该衬底进一步用作晶种以生长GaN。由于表面位错密度低，所以第二次生长的GaN具有较少的位错，这也可用作GaN衬底。版权所有（C）2011，JPO＆INPIT

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