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1. 发明申请

US20060281236A1 Method and apparatus for improving stability of a 6T CMOS SRAM cell 有权
标题翻译：提高6T CMOS SRAM单元的稳定性的方法和装置
公开(公告)号：US20060281236A1
公开(公告)日：2006-12-14
申请号：US11508009
申请日：2006-08-21
申请人： Suman Datta , Brian Doyle , Robert Chau , Jack Kavalieros , Bo Zheng , Scott Hareland
发明人： Suman Datta , Brian Doyle , Robert Chau , Jack Kavalieros , Bo Zheng , Scott Hareland
IPC分类号： H01L21/84
CPC分类号： G11C11/412 , H01L21/845 , H01L27/11 , H01L27/1104 , H01L27/1211 , H01L29/42384 , H01L29/66795 , H01L29/785 , H01L29/7854
摘要： The present invention is a CMOS SRAM cell comprising two access devices, each access device comprised of a tri-gate transistor having a single fin; two pull-up devices, each pull-up device comprised of a tri-gate transistor having a single fin; and two pull-down devices, each pull-down device comprised of a tri-gate transistor having multiple fins. A method for manufacturing the CMOS SRAM cell, including the dual fin tri-gate transistor is also provided.
摘要翻译：本发明是包括两个存取装置的CMOS SRAM单元，每个存取装置由具有单个鳍片的三栅晶体管组成; 两个上拉装置，每个上拉装置由具有单个鳍片的三栅极晶体管组成; 和两个下拉器件，每个下拉器件由具有多个鳍片的三栅晶体管组成。还提供了一种用于制造包括双鳍三栅极晶体管的CMOS SRAM单元的方法。

2. 发明申请

US20050073060A1 Method and apparatus for improving stability of a 6T CMOS SRAM cell 有权
公开(公告)号：US20050073060A1
公开(公告)日：2005-04-07
申请号：US10679124
申请日：2003-10-02
申请人： Suman Datta , Brian Doyle , Robert Chau , Jack Kavalieros , Bo Zheng , Scott Hareland
发明人： Suman Datta , Brian Doyle , Robert Chau , Jack Kavalieros , Bo Zheng , Scott Hareland
IPC分类号： G11C11/412 , H01L21/336 , H01L21/8244 , H01L27/11 , H01L29/423 , H01L29/786
CPC分类号： G11C11/412 , H01L21/845 , H01L27/11 , H01L27/1104 , H01L27/1211 , H01L29/42384 , H01L29/66795 , H01L29/785 , H01L29/7854
摘要： The present invention is a CMOS SRAM cell comprising two access devices, each access device comprised of a tri-gate transistor having a single fin; two pull-up devices, each pull-up device comprised of a tri-gate transistor having a single fin; and two pull-down devices, each pull-down device comprised of a tri-gate transistor having multiple fins. A method for manufacturing the CMOS SRAM cell, including the dual fin tri-gate transistor is also provided.

3. 发明申请

US20050237850A1 Method and apparatus for improving stability of a 6T CMOS SRAM cell 有权
公开(公告)号：US20050237850A1
公开(公告)日：2005-10-27
申请号：US11165724
申请日：2005-06-24
申请人： Suman Datta , Brian Doyle , Robert Chau , Jack Kavalieros , Bo Zheng , Scott Hareland
发明人： Suman Datta , Brian Doyle , Robert Chau , Jack Kavalieros , Bo Zheng , Scott Hareland
IPC分类号： G11C11/412 , H01L21/336 , H01L21/8244 , H01L27/11 , H01L29/423 , H01L29/786 , G11C8/02
CPC分类号： G11C11/412 , H01L21/845 , H01L27/11 , H01L27/1104 , H01L27/1211 , H01L29/42384 , H01L29/66795 , H01L29/785 , H01L29/7854
摘要： The present invention is a CMOS SRAM cell comprising two access devices, each access device comprised of a tri-gate transistor having a single fin; two pull-up devices, each pull-up device comprised of a tri-gate transistor having a single fin; and two pull-down devices, each pull-down device comprised of a tri-gate transistor having multiple fins. A method for manufacturing the CMOS SRAM cell, including the dual fin tri-gate transistor is also provided.

4. 发明授权

US06970373B2 Method and apparatus for improving stability of a 6T CMOS SRAM cell 有权
标题翻译：提高6T CMOS SRAM单元的稳定性的方法和装置
公开(公告)号：US06970373B2
公开(公告)日：2005-11-29
申请号：US10679124
申请日：2003-10-02
申请人： Suman Datta , Brian S. Doyle , Robert S. Chau , Jack Kavalieros , Bo Zheng , Scott A. Hareland
发明人： Suman Datta , Brian S. Doyle , Robert S. Chau , Jack Kavalieros , Bo Zheng , Scott A. Hareland
IPC分类号： G11C11/412 , H01L21/336 , H01L21/8244 , H01L27/11 , H01L29/423 , H01L29/786 , G11C11/00
CPC分类号： G11C11/412 , H01L21/845 , H01L27/11 , H01L27/1104 , H01L27/1211 , H01L29/42384 , H01L29/66795 , H01L29/785 , H01L29/7854
摘要： The present invention is a CMOS SRAM cell comprising two access devices, each access device comprised of a tri-gate transistor having a single fin; two pull-up devices, each pull-up device comprised of a tri-gate transistor having a single fin; and two pull-down devices, each pull-down device comprised of a tri-gate transistor having multiple fins. A method for manufacturing the CMOS SRAM cell, including the dual fin tri-gate transistor is also provided.
摘要翻译：本发明是包括两个存取装置的CMOS SRAM单元，每个存取装置由具有单个鳍片的三栅晶体管组成; 两个上拉装置，每个上拉装置由具有单个鳍片的三栅极晶体管组成; 和两个下拉器件，每个下拉器件由具有多个鳍片的三栅晶体管组成。还提供了一种用于制造包括双鳍三栅极晶体管的CMOS SRAM单元的方法。

5. 发明授权

US07445980B2 Method and apparatus for improving stability of a 6T CMOS SRAM cell 有权
标题翻译：提高6T CMOS SRAM单元的稳定性的方法和装置
公开(公告)号：US07445980B2
公开(公告)日：2008-11-04
申请号：US11508009
申请日：2006-08-21
申请人： Suman Datta , Brian S. Doyle , Robert S. Chau , Jack Kavalieros , Bo Zheng , Scott A. Hareland
发明人： Suman Datta , Brian S. Doyle , Robert S. Chau , Jack Kavalieros , Bo Zheng , Scott A. Hareland
IPC分类号： H01L21/8238
CPC分类号： G11C11/412 , H01L21/845 , H01L27/11 , H01L27/1104 , H01L27/1211 , H01L29/42384 , H01L29/66795 , H01L29/785 , H01L29/7854
摘要： The present invention is a CMOS SRAM cell comprising two access devices, each access device comprised of a tri-gate transistor having a single fin; two pull-up devices, each pull-up device comprised of a tri-gate transistor having a single fin; and two pull-down devices, each pull-down device comprised of a tri-gate transistor having multiple fins. A method for manufacturing the CMOS SRAM cell, including the dual fin tri-gate transistor is also provided.
摘要翻译：本发明是包括两个存取装置的CMOS SRAM单元，每个存取装置由具有单个鳍片的三栅晶体管组成; 两个上拉装置，每个上拉装置由具有单个鳍片的三栅极晶体管组成; 和两个下拉器件，每个下拉器件由具有多个鳍片的三栅晶体管组成。还提供了一种用于制造包括双鳍三栅极晶体管的CMOS SRAM单元的方法。

6. 发明授权

US07138305B2 Method and apparatus for improving stability of a 6T CMOS SRAM cell 有权
公开(公告)号：US07138305B2
公开(公告)日：2006-11-21
申请号：US11165724
申请日：2005-06-24
申请人： Suman Datta , Brian S. Doyle , Robert S. Chau , Jack Kavalieros , Bo Zheng , Scott A. Hareland
发明人： Suman Datta , Brian S. Doyle , Robert S. Chau , Jack Kavalieros , Bo Zheng , Scott A. Hareland
IPC分类号： H01L21/00
CPC分类号： G11C11/412 , H01L21/845 , H01L27/11 , H01L27/1104 , H01L27/1211 , H01L29/42384 , H01L29/66795 , H01L29/785 , H01L29/7854
摘要： The present invention is a CMOS SRAM cell comprising two access devices, each access device comprised of a tri-gate transistor having a single fin; two pull-up devices, each pull-up device comprised of a tri-gate transistor having a single fin; and two pull-down devices, each pull-down device comprised of a tri-gate transistor having multiple fins. A method for manufacturing the CMOS SRAM cell, including the dual fin tri-gate transistor is also provided.

7. 发明授权

US08304193B2 Method for conducting an autocatalytic reaction in plugs in a microfluidic system 有权
标题翻译：在微流体系统中的插塞中进行自催化反应的方法
公开(公告)号：US08304193B2
公开(公告)日：2012-11-06
申请号：US13024155
申请日：2011-02-09
申请人： Rustem F Ismagilov , Joshua David Tice , Cory John Gerdts , Bo Zheng
发明人： Rustem F Ismagilov , Joshua David Tice , Cory John Gerdts , Bo Zheng
IPC分类号： C12Q1/68
CPC分类号： B01L3/502784 , B01D9/0072 , B01D2009/0086 , B01F5/0646 , B01F5/0647 , B01F13/0071 , B01J14/00 , B01J19/0046 , B01J19/0093 , B01J2219/00286 , B01J2219/00576 , B01J2219/00585 , B01J2219/00599 , B01J2219/00722 , B01J2219/00725 , B01J2219/00736 , B01J2219/00756 , B01J2219/00783 , B01J2219/00837 , B01J2219/0086 , B01J2219/00869 , B01J2219/00889 , B01J2219/00891 , B01J2219/00894 , B01J2219/00903 , B01J2219/00975 , B01J2219/00977 , B01L3/502715 , B01L3/50273 , B01L2200/0673 , B01L2200/12 , B01L2300/0867 , B01L2400/0487 , B82Y30/00 , C07K14/43 , C12N9/2462 , C12Q1/6806 , C12Y302/01017 , C30B7/14 , C30B29/54 , C30B29/58 , G01N1/28 , G01N35/08 , Y10T117/10 , Y10T137/0318 , Y10T436/117497 , Y10T436/143333 , Y10T436/25
摘要： The present invention provides microfabricated substrates and methods of conducting reactions within these substrates. The reactions occur in plugs transported in the flow of a carrier-fluid.
摘要翻译：本发明提供微制造的底物和在这些底物内进行反应的方法。反应发生在在载体流体流中输送的塞子中。

8. 发明申请

US20120047175A1 Short Point-Of-Interest Title Generation 审中-公开
标题翻译：短期利益标题生成
公开(公告)号：US20120047175A1
公开(公告)日：2012-02-23
申请号：US13266614
申请日：2009-04-29
申请人： Jiang Qian , Vincent Zhou , Bo Zheng , Yu Zheng
发明人： Jiang Qian , Vincent Zhou , Bo Zheng , Yu Zheng
IPC分类号： G06F17/30
CPC分类号： G06F17/2745
摘要： Short POI titles are generated by removing unnecessary administrative area prefixes from existing POI titles and replacing necessary administrative area prefixes with shorter aliases. Administrative area prefixes are identified and analyzed to determine whether they are necessary. The analysis includes determining (1) whether the remainders with the prefixes excluded include a common suffix as a prefix, and (2) whether the remainders are unique in an applicable metropolis area. If a remainder does not include as a prefix a common suffix and is unique in the applicable metropolis area, the corresponding prefix is determined unnecessary and removed from the existing POI title to generate a short POI title. Otherwise, the corresponding prefix is determined necessary and replaced with a shorter alias to generate a short POI title.
摘要翻译：通过从现有POI标题中删除不必要的管理区域前缀，并用较短的别名替换必要的管理区域前缀来生成简短的POI标题。对行政区域前缀进行识别和分析，以确定它们是否必要。分析包括确定（1）排除前缀的余数是否包括作为前缀的公共后缀，以及（2）在适用的大都会区域中剩余部分是否是唯一的。如果余数不包括作为前缀的公共后缀，并且在适用的大都市区域中是唯一的，则相应的前缀被确定为不必要的并且从现有POI标题中移除以生成短的POI标题。否则，相应的前缀被确定为必需，并用较短的别名替换以生成短的POI标题。

9. 发明申请

US20120000422A1 APPARATUSES AND METHODS FOR ATOMIC LAYER DEPOSITION 有权
标题翻译：用于原子层沉积的装置和方法
公开(公告)号：US20120000422A1
公开(公告)日：2012-01-05
申请号：US13232317
申请日：2011-09-14
申请人： Hyman Lam , Bo Zheng , Hua Ai , Michael Jackson , Xiaoxiong (John) Yuan , Hou Gong Wang , Salvador P. Umotoy , Sang Ho Yu
发明人： Hyman Lam , Bo Zheng , Hua Ai , Michael Jackson , Xiaoxiong (John) Yuan , Hou Gong Wang , Salvador P. Umotoy , Sang Ho Yu
IPC分类号： C23C16/455 , F17D1/20
CPC分类号： C23C16/45565 , C23C16/4412 , C23C16/45536 , C23C16/45544 , C23C16/4558 , H01J37/32449 , Y10T137/87265
摘要： Embodiments of the invention provide apparatuses and methods for atomic layer deposition (ALD), such as plasma-enhanced ALD (PE-ALD). In some embodiments, a PE-ALD chamber is provided which includes a chamber lid assembly coupled with a chamber body having a substrate support therein. In one embodiment, the chamber lid assembly has an inlet manifold assembly containing an annular channel encompassing a centralized channel, wherein the centralized channel extends through the inlet manifold assembly, and the inlet manifold assembly further contains injection holes extending from the annular channel, through a sidewall of the centralized channel, and to the centralized channel. The chamber lid assembly further contains a showerhead assembly disposed below the inlet manifold assembly, a water box disposed between the inlet manifold assembly and the showerhead assembly, and a remote plasma system (RPS) disposed above and coupled with the inlet manifold assembly, and in fluid communication with the centralized channel.
摘要翻译：本发明的实施例提供了诸如等离子体增强型ALD（PE-ALD）的原子层沉积（ALD）的装置和方法。在一些实施例中，提供了一种PE-ALD室，其包括与其中具有基板支撑件的室主体耦合的室盖组件。在一个实施例中，室盖组件具有入口歧管组件，其包含围绕集中通道的环形通道，其中集中通道延伸穿过入口歧管组件，并且入口歧管组件还包含从环形通道延伸的注入孔，集中通道侧壁，集中通道。腔室盖组件还包括设置在入口歧管组件下方的喷头组件，设置在入口歧管组件和喷头组件之间的水箱，以及设置在入口歧管组件上方并与入口歧管组件耦合的远程等离子体系统（RPS）与集中通道的流体通信。

10. 发明申请

US20100233026A1 DEVICE AND METHOD FOR PRESSURE-DRIVEN PLUG TRANSPORT AND REACTION 审中-公开
标题翻译：用于压力驱动输送和反应的装置和方法
公开(公告)号：US20100233026A1
公开(公告)日：2010-09-16
申请号：US12777099
申请日：2010-05-10
申请人： Rustem F. Ismagliov , Joshua David Tice , Cory John Gerdts , Bo Zheng
发明人： Rustem F. Ismagliov , Joshua David Tice , Cory John Gerdts , Bo Zheng
IPC分类号： G01N33/68
CPC分类号： B01L3/502784 , B01D9/0072 , B01D2009/0086 , B01F5/0646 , B01F5/0647 , B01F13/0071 , B01J14/00 , B01J19/0046 , B01J19/0093 , B01J2219/00286 , B01J2219/00576 , B01J2219/00585 , B01J2219/00599 , B01J2219/00722 , B01J2219/00725 , B01J2219/00736 , B01J2219/00756 , B01J2219/00783 , B01J2219/00837 , B01J2219/0086 , B01J2219/00869 , B01J2219/00889 , B01J2219/00891 , B01J2219/00894 , B01J2219/00903 , B01J2219/00975 , B01J2219/00977 , B01L3/502715 , B01L3/50273 , B01L2200/0673 , B01L2200/12 , B01L2300/0867 , B01L2400/0487 , B82Y30/00 , C07K14/43 , C12N9/2462 , C12Q1/6806 , C12Y302/01017 , C30B7/14 , C30B29/54 , C30B29/58 , G01N1/28 , G01N35/08 , Y10T117/10 , Y10T137/0318 , Y10T436/117497 , Y10T436/143333 , Y10T436/25
摘要： The present invention provides microfabricated substrates and methods of conducting reactions within these substrates. The reactions occur in plugs transported in the flow of a carrier-fluid.
摘要翻译：本发明提供微制造的底物和在这些底物内进行反应的方法。反应发生在在载体流体流中输送的塞子中。

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