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1. 发明申请

US20060168489A1 System and shadow circuits with output joining circuit 有权
标题翻译：具有输出接合电路的系统和阴影电路
公开(公告)号：US20060168489A1
公开(公告)日：2006-07-27
申请号：US11044826
申请日：2005-01-26
申请人： Subhasish Mitra , Ming Zhang , Tak Mak , Quan Shi , Kee Kim
发明人： Subhasish Mitra , Ming Zhang , Tak Mak , Quan Shi , Kee Kim
IPC分类号： G01R31/28
CPC分类号： G01R31/318541
摘要： In one embodiment, an apparatus includes a system circuit adapted to generate at a first output terminal a first output signal in response to a data input signal and at least one system clock signal; a shadow circuit adapted to generate at a second output terminal a second output signal in response the data input signal and the at least one system clock signal; and an output joining circuit coupled to at least the first output terminal and the second output terminal.
摘要翻译：在一个实施例中，一种装置包括适于在第一输出端产生响应于数据输入信号和至少一个系统时钟信号的第一输出信号的系统电路; 阴影电路，其适于在第二输出端产生响应于所述数据输入信号和所述至少一个系统时钟信号的第二输出信号; 以及耦合到至少第一输出端子和第二输出端子的输出接合电路。

2. 发明申请

US20060005103A1 System and scanout circuits with error resilience circuit 失效
标题翻译：具有错误恢复电路的系统和扫描电路
公开(公告)号：US20060005103A1
公开(公告)日：2006-01-05
申请号：US11050996
申请日：2005-02-04
申请人： Ming Zhang , Subhasish Mitra , Tak Mak , Victor Zia
发明人： Ming Zhang , Subhasish Mitra , Tak Mak , Victor Zia
IPC分类号： G01R31/28 , H03M13/00
CPC分类号： G01R31/318566 , G01R31/31816 , G01R31/318541 , G01R31/318572 , G11C2029/3202
摘要： In one embodiment, an apparatus is provided with a system circuit, a scanout circuit and an error detecting circuit. The system circuit is adapted to generate a first output signal in response to a data input signal and a system clock signal. The scanout circuit is adapted to generate a second output signal in response the data input signal and the system clock signal. The error detecting circuit, coupled to the system circuit and the scanout circuit, is adapted to generate an error signal in response to a relative condition between the first output signal and the second output signal.
摘要翻译：在一个实施例中，设备具有系统电路，扫描输出电路和错误检测电路。系统电路适于响应于数据输入信号和系统时钟信号产生第一输出信号。扫描输出电路适于响应于数据输入信号和系统时钟信号产生第二输出信号。耦合到系统电路和扫描输出电路的误差检测电路适于响应于第一输出信号和第二输出信号之间的相对条件产生误差信号。

3. 发明申请

US20060168487A1 System pulse latch and shadow pulse latch coupled to output joining circuit 有权
标题翻译：系统脉冲锁存和阴影脉冲锁存器耦合到输出接合电路
公开(公告)号：US20060168487A1
公开(公告)日：2006-07-27
申请号：US11128692
申请日：2005-05-12
申请人： Tak Mak , Ming Zhang , Subhasish Mitra , Paul Shipley
发明人： Tak Mak , Ming Zhang , Subhasish Mitra , Paul Shipley
IPC分类号： G11B20/20 , G06K5/04 , G11B5/00
CPC分类号： H03K3/356156 , G01R31/318583 , H03K3/0375
摘要： In one embodiment, an apparatus includes a system pulse latch to generate at least one system latch signal in response to a data input signal and a pulsed system clock signal; a shadow pulse latch to generate at least one shadow latch signal in response to the data input signal and the pulsed system clock signal; and an output joining circuit, coupled to the system pulse latch and the shadow pulse latch, to provide a data output signal in response to the at least one system latch signal and the at least one shadow latch signal.
摘要翻译：在一个实施例中，一种装置包括系统脉冲锁存器，用于响应于数据输入信号和脉冲系统时钟信号而产生至少一个系统锁存信号; 阴影脉冲锁存器，用于响应于数据输入信号和脉冲系统时钟信号而产生至少一个阴影锁存信号; 以及耦合到系统脉冲锁存器和阴影脉冲锁存器的输出连接电路，以响应于至少一个系统锁存信号和至少一个阴影锁存信号来提供数据输出信号。

4. 发明授权

US07278074B2 System and shadow circuits with output joining circuit 有权
标题翻译：具有输出接合电路的系统和阴影电路
公开(公告)号：US07278074B2
公开(公告)日：2007-10-02
申请号：US11044826
申请日：2005-01-26
申请人： Subhasish Mitra , Ming Zhang , Tak M. Mak , Quan Shi , Kee Sup Kim
发明人： Subhasish Mitra , Ming Zhang , Tak M. Mak , Quan Shi , Kee Sup Kim
IPC分类号： G01R31/28
CPC分类号： G01R31/318541
摘要： In one embodiment, an apparatus includes a system circuit adapted to generate at a first output terminal a first output signal in response to a data input signal and at least one system clock signal; a shadow circuit adapted to generate at a second output terminal a second output signal in response the data input signal and the at least one system clock signal; and an output joining circuit coupled to at least the first output terminal and the second output terminal.
摘要翻译：在一个实施例中，一种装置包括适于在第一输出端产生响应于数据输入信号和至少一个系统时钟信号的第一输出信号的系统电路; 阴影电路，其适于在第二输出端产生响应于所述数据输入信号和所述至少一个系统时钟信号的第二输出信号; 以及耦合到至少第一输出端子和第二输出端子的输出接合电路。

5. 发明申请

US20060015786A1 System and shadow bistable circuits coupled to output joining circuit 失效
公开(公告)号：US20060015786A1
公开(公告)日：2006-01-19
申请号：US11218979
申请日：2005-09-02
申请人： Subhasish Mitra , Ming Zhang , Kee Kim
发明人： Subhasish Mitra , Ming Zhang , Kee Kim
IPC分类号： G01R31/28
CPC分类号： G01R31/318536 , G01R31/318525
摘要： In one embodiment, an apparatus is provide with a combinational logic circuit to generate a data input signal; a delay element, coupled to the combinational logic circuit, to provide a delayed data input signal in response to the data input signal. Additionally, the apparatus is provided with a system bistable circuit, coupled to the combinational logic circuit, to generate a system bistable signal in response to at least the data input signal; a shadow bistable circuit, coupled to the delay element, to generate a shadow bistable signal in response to at least the delayed data input signal. Further, the apparatus is provided with an output joining circuit, coupled to the system and the shadow bistable circuits, to provide a data output signal in response to the system and the shadow bistable signals.

6. 发明授权

US07523371B2 System and shadow bistable circuits coupled to output joining circuit 失效
标题翻译：耦合到输出接合电路的系统和阴影双稳态电路
公开(公告)号：US07523371B2
公开(公告)日：2009-04-21
申请号：US11218979
申请日：2005-09-02
申请人： Subhasish Mitra , Ming Zhang , Kee Sup Kim
发明人： Subhasish Mitra , Ming Zhang , Kee Sup Kim
IPC分类号： G01R31/28 , G06F7/02 , G06F13/00
CPC分类号： G01R31/318536 , G01R31/318525
摘要： In one embodiment, an apparatus is provide with a combinational logic circuit to generate a data input signal; a delay element, coupled to the combinational logic circuit, to provide a delayed data input signal in response to the data input signal. Additionally, the apparatus is provided with a system bistable circuit, coupled to the combinational logic circuit, to generate a system bistable signal in response to at least the data input signal; a shadow bistable circuit, coupled to the delay element, to generate a shadow bistable signal in response to at least the delayed data input signal. Further, the apparatus is provided with an output joining circuit, coupled to the system and the shadow bistable circuits, to provide a data output signal in response to the system and the shadow bistable signals.
摘要翻译：在一个实施例中，设备提供组合逻辑电路以产生数据输入信号; 耦合到组合逻辑电路的延迟元件，以响应于数据输入信号提供延迟的数据输入信号。另外，该装置设置有耦合到组合逻辑电路的系统双稳态电路，以响应于至少数据输入信号产生系统双稳态信号; 耦合到延迟元件的阴影双稳态电路，以响应于至少延迟的数据输入信号产生阴影双稳态信号。此外，该装置设置有耦合到系统和阴影双稳态电路的输出接合电路，以响应于系统和阴影双稳态信号提供数据输出信号。

7. 发明授权

US07373572B2 System pulse latch and shadow pulse latch coupled to output joining circuit 有权
标题翻译：系统脉冲锁存和阴影脉冲锁存器耦合到输出接合电路
公开(公告)号：US07373572B2
公开(公告)日：2008-05-13
申请号：US11128692
申请日：2005-05-12
申请人： Tak M. Mak , Ming Zhang , Subhasish Mitra , Paul E. Shipley
发明人： Tak M. Mak , Ming Zhang , Subhasish Mitra , Paul E. Shipley
IPC分类号： G01R31/28
CPC分类号： H03K3/356156 , G01R31/318583 , H03K3/0375
摘要： In one embodiment, an apparatus includes a system pulse latch to generate at least one system latch signal in response to a data input signal and a pulsed system clock signal; a shadow pulse latch to generate at least one shadow latch signal in response to the data input signal and the pulsed system clock signal; and an output joining circuit, coupled to the system pulse latch and the shadow pulse latch, to provide a data output signal in response to the at least one system latch signal and the at least one shadow latch signal.
摘要翻译：在一个实施例中，一种装置包括系统脉冲锁存器，用于响应于数据输入信号和脉冲系统时钟信号而产生至少一个系统锁存信号; 阴影脉冲锁存器，用于响应于数据输入信号和脉冲系统时钟信号而产生至少一个阴影锁存信号; 以及耦合到系统脉冲锁存器和阴影脉冲锁存器的输出连接电路，以响应于至少一个系统锁存信号和至少一个阴影锁存信号来提供数据输出信号。

8. 发明授权

US07278076B2 System and scanout circuits with error resilience circuit 失效
标题翻译：具有错误恢复电路的系统和扫描电路
公开(公告)号：US07278076B2
公开(公告)日：2007-10-02
申请号：US11050996
申请日：2005-02-04
申请人： Ming Zhang , Subhasish Mitra , Tak M. Mak , Victor Zia
发明人： Ming Zhang , Subhasish Mitra , Tak M. Mak , Victor Zia
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G01R31/318566 , G01R31/31816 , G01R31/318541 , G01R31/318572 , G11C2029/3202
摘要： In one embodiment, an apparatus is provided with a system circuit, a scanout circuit and an error detecting circuit. The system circuit is adapted to generate a first output signal in response to a data input signal and a system clock signal. The scanout circuit is adapted to generate a second output signal in response the data input signal and the system clock signal. The error detecting circuit, coupled to the system circuit and the scanout circuit, is adapted to generate an error signal in response to a relative condition between the first output signal and the second output signal.
摘要翻译：在一个实施例中，设备具有系统电路，扫描输出电路和错误检测电路。系统电路适于响应于数据输入信号和系统时钟信号产生第一输出信号。扫描输出电路适于响应于数据输入信号和系统时钟信号产生第二输出信号。耦合到系统电路和扫描输出电路的误差检测电路适于响应于第一输出信号和第二输出信号之间的相对条件产生误差信号。

9. 发明授权

US11512486B2 House structure with expandable function 有权
公开(公告)号：US11512486B2
公开(公告)日：2022-11-29
申请号：US16904591
申请日：2020-06-18
申请人： Chuan Yu , Ming Zhang , Dechong Zeng , Jiangshan Li
发明人： Chuan Yu , Ming Zhang , Dechong Zeng , Jiangshan Li
IPC分类号： E04H1/00 , E04H14/00 , G01C21/20 , G01S19/42 , G05D1/02
摘要： The invention discloses a house structure with expandable function, comprising a house body (20), wherein an elevator shaft (21) is provided in the house body (20), and a carrying elevator (22) is provided in the elevator shaft (21); a multifunctional balcony (23) is further provided on both sides of the elevator shaft (21), and the multifunctional balcony (23) and the elevator shaft (21) are connected via a landing door (24); the car of the carrying elevator (22) is provided with a car front door, a car left door and a car right door, respectively; a multifunctional cabin (1) can be detachably connected to an automatic carrying system (35) capable of autonomous driving. The house structure provided by the invention can take into account the owner's demand for various aspects of the house, and improves the functionality of the house.

10. 发明授权

US11511641B2 Automatic charging system for intelligent driving electric vehicles and charging method thereof 有权
公开(公告)号：US11511641B2
公开(公告)日：2022-11-29
申请号：US16836963
申请日：2020-04-01
申请人： Ming Zhang
发明人： Ming Zhang
IPC分类号： B60L53/66 , B60L58/12 , G05D1/00 , G08G1/14
摘要： An automatic charging system for intelligent driving electric vehicles and charging method thereof, comprising a vehicle-mounted terminal and a charging terminal; the vehicle-mounted terminal comprises a battery module, which is communicatively connected to a battery management system, and the battery module is electrically connected to a power receiving controller; the battery management system is connected to a vehicle control unit via a vehicle-mounted communication unit, the vehicle control unit is connected to an unmanned system, and the power receiving controller is electrically connected to a receiving coil; the charging terminal comprises a charging management system, which is respectively connected to the vehicle-mounted communication unit and a charging communication unit that is communicatively connected to a power transmitting controller, and the power transmitting controller is electrically connected to a transmitting coil. The invention realizes the flexibility and rapidization of charging, improves charging efficiency, and saves charging pile resource.

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