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    • 8. 发明授权
    • Enhanced write abort mechanism for non-volatile memory
    • 用于非易失性存储器的增强写入中止机制
    • US07599241B2
    • 2009-10-06
    • US11890734
    • 2007-08-06
    • Steven T. SprouseDhaval ParikhArjun Kapoor
    • Steven T. SprouseDhaval ParikhArjun Kapoor
    • G11C5/14
    • G11C16/225
    • In a non-volatile memory (NVM) device having a controller and a non-volatile memory array controlled by the controller a voltage supervisor circuit monitors an output of a voltage supply powering the NVM device. The voltage supervisor circuit may be part of the NVM device or coupled to it. The voltage supervisor circuit is configured to assert a “low-voltage” signal responsive to detecting the output of the voltage supply powering the NVM device dropping below a predetermined value. The controller is configured to write data into the memory array while the “low-voltage” signal is deasserted and to suspend writing data while the “low-voltage” signal is asserted. In response to assertion of the “low-voltage” signal, the controller completes a write cycle/program operation, if pending, and prevents any additional write cycles/program operation(s) during assertion of the “low-voltage” signal.
    • 在具有由控制器控制的控制器和非易失性存储器阵列的非易失性存储器(NVM)器件中,电压监控器电路监视为NVM器件供电的电压源的输出。 电压监控器电路可以是NVM器件的一部分或耦合到其上。 电压监控器电路被配置为响应于检测到NVM器件供电的电压输出下降到预定值以下来断言“低电压”信号。 控制器被配置为在“低电压”信号被断言时将数据写入存储器阵列,并且在“低电压”信号被断言时暂停写入数据。 响应于“低电压”信号的声明,控制器完成写入周期/编程操作,如果挂起,并且在断言“低电压”信号期间防止任何额外的写周期/编程操作。