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    • 10. 发明授权
    • Methods of forming mixed gate CMOS with single poly deposition
    • 使用单个聚合物沉积形成混合栅极CMOS的方法
    • US07741181B2
    • 2010-06-22
    • US11936061
    • 2007-11-06
    • Bruce B. DorisCharlotte DeWan AdamsNaim MoumenYing Zhang
    • Bruce B. DorisCharlotte DeWan AdamsNaim MoumenYing Zhang
    • H01L21/8234
    • H01L21/823842H01L21/28079H01L21/28088H01L21/823857H01L29/785
    • A method for fabricating metal gate and polysilicon gate FET devices on the same chip is disclosed. The method avoids the use of two separate masks during gate stack fabrication of the differing gates. By using a single mask, tighter NFET to PFET distances can be achieved, and the fabrication process is simplified. After blanket disposing layers for the fabrication of the metal gate stack, a covering protective material layer is formed, again in blanket fashion. A block level mask is used to clear the surface for the gate insulator formation in the poly gate device regions. During oxidation, which forms the gate dielectric for the poly gate devices, the protective material prevents damage of the metal gate device regions. Following oxidation, a single common polysilicon cover is disposed in blanket manner for continuing the fabrication of the gate stacks. The protective material is selected in such a way to be either easily removable upon oxidation, or to be conductive upon oxidation. In this latter case the oxidized protective material is incorporated into the metal gate stack, which incorporation results in a novel CMOS structure.
    • 公开了一种在同一芯片上制造金属栅极和多晶硅栅极FET器件的方法。 该方法避免了在不同栅极的栅堆叠制造期间使用两个分离的掩模。 通过使用单个掩模,可以实现更紧密的NFET至PFET距离,并简化制造工艺。 在用于制造金属栅极堆叠的毯布设置层之后,再次以毯子形式形成覆盖保护材料层。 块级别掩模用于清除多晶硅栅极器件区域中的栅极绝缘体形成的表面。 在形成用于多晶硅栅极器件的栅极电介质的氧化期间,保护材料防止金属栅极器件区域的损坏。 在氧化之后,以橡皮布方式设置单个公共多晶硅盖,以继续制造栅极堆叠。 保护材料选择为在氧化时易于除去或在氧化时导电。 在后一种情况下,氧化的保护材料被并入到金属栅极堆叠中,其结合形成了新的CMOS结构。