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1. 发明授权

US5856697A Integrated dual layer emitter mask and emitter trench for BiCMOS processes 失效
标题翻译：用于BiCMOS工艺的集成双层发射极掩模和发射极沟槽
公开(公告)号：US5856697A
公开(公告)日：1999-01-05
申请号：US895270
申请日：1997-07-14
申请人： Stephen Chambers , Brian J. Brown , Chan-Hong Chern , Robert Chau , Leopoldo D. Yau
发明人： Stephen Chambers , Brian J. Brown , Chan-Hong Chern , Robert Chau , Leopoldo D. Yau
IPC分类号： H01L21/331 , H01L21/8249 , H01L29/08 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L29/66272 , H01L21/8249 , H01L29/0804 , Y10S148/01 , Y10S148/011
摘要： A new method of isolating a polysilicon emitter from the base region of a bipolar transistor, trenching the polysilicon emitter into the semiconductor substrate, and maintaining a consistent base width of a bipolar transistor independent of variations in emitter mask thicknesses is disclosed. The polysilicon emitter isolation provides for better electrical breakdown characteristics between the emitter and the base by protecting the dielectric layer between the polysilicon emitter and base regions from defects and contamination associated with the BiCMOS manufacturing environment. The polysilicon emitter is trenched into the semiconductor substrate in order to reduce transistor operation problems associated with hot electron injection. Consistent base widths improve transistor performance uniformity thereby improving manufacturability and reliability.
摘要翻译：公开了一种从双极晶体管的基极区域隔离多晶硅发射极的新方法，将多晶硅发射极沟槽到半导体衬底中，并保持独立于发射极掩模厚度变化的双极晶体管的一致的基底宽度。多晶硅发射极隔离通过保护多晶硅发射极和基极区域之间的电介质层与BiCMOS制造环境相关的缺陷和污染来提供发射极和基极之间的更好的电击穿特性。为了减少与热电子注入相关的晶体管操作问题，多晶硅发射极被沟入半导体衬底。一致的基极宽度提高了晶体管的性能均匀性，从而提高了可制造性和可靠性。

2. 发明授权

US5488003A Method of making emitter trench BiCMOS using integrated dual layer emitter mask 失效
标题翻译：使用集成双层发射器掩模制造发射极沟槽BiCMOS的方法
公开(公告)号：US5488003A
公开(公告)日：1996-01-30
申请号：US40673
申请日：1993-03-31
申请人： Stephen Chambers , Brian J. Brown , Chan-Hong Chern , Robert Chau , Leopoldo D. Yau
发明人： Stephen Chambers , Brian J. Brown , Chan-Hong Chern , Robert Chau , Leopoldo D. Yau
IPC分类号： H01L21/331 , H01L21/8249 , H01L29/08 , H01L21/265
CPC分类号： H01L29/66272 , H01L21/8249 , H01L29/0804 , Y10S148/01 , Y10S148/011
摘要： A new method of isolating a polysilicon emitter from the base region of a bipolar transistor, trenching the polysilicon emitter into the semiconductor substrate, and maintaining a consistent base width of a bipolar transistor independent of variations in emitter mask thicknesses is disclosed. The polysilicon emitter isolation provides for better electrical breakdown characteristics between the emitter and the base by protecting the dielectric layer between the polysilicon emitter and base regions from defects and contamination associated with the BiCMOS manufacturing environment. The polysilicon emitter is trenched into the semiconductor substrate in order to reduce transistor operation problems associated with hot electron injection. Consistent base widths improve transistor performance uniformity thereby improving manufacturability and reliability.
摘要翻译：公开了一种从双极晶体管的基极区域隔离多晶硅发射极的新方法，将多晶硅发射极沟槽到半导体衬底中，并保持独立于发射极掩模厚度变化的双极晶体管的一致的基底宽度。多晶硅发射极隔离通过保护多晶硅发射极和基极区域之间的电介质层与BiCMOS制造环境相关的缺陷和污染来提供发射极和基极之间的更好的电击穿特性。为了减少与热电子注入相关的晶体管操作问题，多晶硅发射极被沟入半导体衬底。一致的基极宽度提高了晶体管的性能均匀性，从而提高了可制造性和可靠性。

3. 发明授权

US06579771B1 Self aligned compact bipolar junction transistor layout, and method of making same 有权
标题翻译：自对准紧凑型双极结晶体管布局及其制造方法
公开(公告)号：US06579771B1
公开(公告)日：2003-06-17
申请号：US10013225
申请日：2001-12-10
申请人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green , Anand Murthy
发明人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green , Anand Murthy
IPC分类号： H01L218228
CPC分类号： H01L29/66287
摘要： The invention relates to a process of forming a bipolar junction transistor (BJT) that includes forming a topology over a substrate. Thereafter, a spacer is formed at the topology. A base layer is formed from epitaxial silicon above the spacer and at the topology. A leakage block structure is formed in the substrate by out-diffusion from the spacer. Thereafter a BJT is completed with the base layer and the spacer.
摘要翻译：本发明涉及一种形成双极结型晶体管（BJT）的方法，其包括在衬底上形成拓扑结构。此后，在拓扑形成间隔物。基底层由间隔物上方的外延硅和拓扑形成。通过从间隔物的扩散形成在衬底中的泄漏块结构。此后，BJT完成了基层和隔离层。

4. 发明授权

US07064042B1 Self aligned compact bipolar junction transistor layout, and method of making same 失效
公开(公告)号：US07064042B1
公开(公告)日：2006-06-20
申请号：US10877749
申请日：2004-06-24
申请人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green , Anand Murthy
发明人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green , Anand Murthy
IPC分类号： H01L21/331
CPC分类号： H01L29/66272 , H01L29/0821 , H01L29/732
摘要： The invention relates to a process of forming a bipolar junction transistor (BJT) that includes forming a topology over a substrate. Thereafter, a spacer is formed at the topology. A base layer is formed from epitaxial silicon above the spacer and at the topology. A leakage block structure is formed in the substrate by out-diffusion from the spacer. Thereafter a BJT is completed with the base layer and the spacer.

5. 发明申请

US20140009603A1 METHODS AND SYSTEMS FOR AUTOMATIC CAPTURE OF AN IMAGE OF A FAINT PATTERN OF LIGHT EMITTED BY A SPECIMEN 审中-公开
标题翻译：用于自动捕获由样本发射的光的图形的方法和系统
公开(公告)号：US20140009603A1
公开(公告)日：2014-01-09
申请号：US13988579
申请日：2011-11-22
申请人： Philip Atkin , Stephen Chambers
发明人： Philip Atkin , Stephen Chambers
IPC分类号： A61B5/00
CPC分类号： A61B5/0033 , G01N21/6456 , G01N21/76 , G06K9/2027 , H04N5/2351 , H04N5/2353
摘要： An imaging system 10 for automatically capturing an image of a faint pattern of light emitted by a specimen comprises: an electronic image capture device 12, such as a camera having a CCD sensor; a light-tight enclosure 24 having within a platform 32 for mounting a light-emitting specimen 30 thereon within the field of view of the image capture device 12; and a computer 50, connected to at least the image capture device 12. The computer 50 is adapted to: estimate a maximum signal level that can be expected from the specimen 30 and calculate, based on said estimated maximum signal level, a peak signal level estimate (psle); calculate an exposure time on the basis of the psle and a desired resolution for a captured image; and capture an image for the calculated exposure time. The desired resolution may a user-selected choice, balancing a need for quality of final image against the time required to capture it. An associated method is also disclosed. Multiple exposures may be combined in odder to arrive at a final captured image, which helps to reduce overall image capture time whilst maintaining reasonable quality final images.
摘要翻译：用于自动捕获由样本发射的光的微弱图案的图像的成像系统10包括：电子图像捕获装置12，例如具有CCD传感器的相机; 具有在平台32内用于将发光样本30安装在其上的图像捕获装置12的视野内的不透光外壳24; 以及连接到至少图像捕获装置12的计算机50.计算机50适于：估计可以从样本30预期的最大信号电平，并基于所述估计的最大信号电平计算峰值信号电平估计（psle）; 基于所述图像计算曝光时间和所捕获图像的期望分辨率; 并捕获计算曝光时间的图像。期望的分辨率可以是用户选择的选择，平衡对最终图像质量的需求与捕获最终图像所需的时间。还公开了一种相关联的方法。可以将多次曝光组合在一起以获得最终拍摄的图像，这有助于减少整体图像捕获时间，同时保持合理质量的最终图像。

6. 发明申请

US20060019337A1 Dual expression vector system and screening methods 有权
公开(公告)号：US20060019337A1
公开(公告)日：2006-01-26
申请号：US11033774
申请日：2005-01-12
申请人： Stephen Chambers
发明人： Stephen Chambers
IPC分类号： C12P21/06 , C12N5/06 , C12N15/86
CPC分类号： C12N15/86 , C12N15/74 , C12N2710/14143 , C12N2830/008
摘要： The present invention features vectors that contain a promoter effective for expression in bacterial cells and a promoter effective for expression in insect cells. The dual promoter system allows use of the same vector in both host cell systems so that construction of only a single vector is needed to express a polynucleotide inserted at a downstream cloning site. In preferred embodiments the vector is used to derive a recombinant baculovirus that is used to infect host cells. In particular vectors the promoters are a baculovirus polh promoter and a T7lac promoter. In particular vectors the promoter effective for expression in bacteria is positioned between the promoter effective for expression in insect cells and a cloning site. The invention also features various high throughput screening methods.

7. 发明授权

US06703685B2 Super self-aligned collector device for mono-and hetero bipolar junction transistors 有权
标题翻译：用于单和双极结型晶体管的超自对准集电极器件
公开(公告)号：US06703685B2
公开(公告)日：2004-03-09
申请号：US10013075
申请日：2001-12-10
申请人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green
发明人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green
IPC分类号： H01L27082
CPC分类号： H01L29/66272 , H01L21/8249 , H01L27/0623 , H01L29/0821
摘要： The invention relates to a process of forming a compact bipolar junction transistor (BJT) that includes forming a self-aligned collector tap adjacent the emitter stack and an isolation structure. A base layer is formed from epitaxial silicon that is disposed in the substrate.
摘要翻译：本发明涉及一种形成紧凑型双极结型晶体管（BJT）的方法，其包括形成邻近发射极堆叠的自对准集电极阱和隔离结构。基底层由设置在基板中的外延硅形成。

8. 发明授权

US07414298B2 Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same 有权
标题翻译：用于单和双极结型晶体管的超自对准集电极器件及其制造方法
公开(公告)号：US07414298B2
公开(公告)日：2008-08-19
申请号：US10633055
申请日：2003-07-31
申请人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green
发明人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green
IPC分类号： H01L29/06
CPC分类号： H01L29/66272 , H01L21/8249 , H01L27/0623 , H01L29/0821
摘要： The invention relates to a process of forming a compact bipolar junction transistor (BJT) that includes forming a self-aligned collector tap adjacent the emitter stack and an isolation structure. A base layer is formed from epitaxial silicon that is disposed in the substrate.
摘要翻译：本发明涉及一种形成紧凑型双极结型晶体管（BJT）的方法，其包括形成邻近发射极堆叠的自对准集电极阱和隔离结构。基底层由设置在基板中的外延硅形成。

9. 发明申请

US20080006584A1 TREATMENT OF A WASTE STREAM THROUGH PRODUCTION AND UTILIZATION OF OXYHYDROGEN GAS 有权
标题翻译：通过生产和利用氧化气来处理废物流
公开(公告)号：US20080006584A1
公开(公告)日：2008-01-10
申请号：US11565240
申请日：2006-11-30
申请人： David Van Vliet , Herbert Campbell , Stephen Chambers
发明人： David Van Vliet , Herbert Campbell , Stephen Chambers
IPC分类号： B01D17/06 , C25B1/04
CPC分类号： C02F1/4672 , C02F1/465 , C02F11/06 , C02F11/12 , C02F2001/46185 , C02F2101/322 , C02F2201/46125 , C02F2201/4617 , C02F2201/46175 , C02F2201/782 , Y02E20/12 , Y02E60/366 , Y02W10/40
摘要： Methods and systems for treating a waste stream in a waste treatment system involve performing a unit process of the waste treatment system by contacting the waste stream with oxyhydrogen-rich gas generated on-site by an oxyhydrogen gas generator that implements water dissociation technology. The oxyhydrogen gas generator involves applying a pulsed electrical signal to a series of closely-spaced electrodes that are submerged in the waste stream to produce oxyhydrogen-rich gas from a water component of the waste stream. Operation of the oxyhydrogen gas generator in the waste stream may accomplish one or more unit processes for waste treatment, such as oxidation, stripping, floatation, disinfection, conditioning, stabilization, thickening, and dewatering, among others. At least a portion of the oxyhydrogen-rich gas can be conveyed for a second use in the waste treatment system, such as a source of combustible fuel for incineration or power generation, for example.
摘要翻译：用于处理废物处理系统中的废物流的方法和系统包括通过使废水与通过实现水解离技术的氢氧气发生器在现场产生的富含富含氢气的气体相接触进行废物处理系统的单元处理。氢氧气体发生器涉及将脉冲电信号施加到一系列紧密间隔的电极，该电极浸没在废物流中以从废物流的水分中产生富含富氢气体。在废物流中操作氢氧气体发生器可以实现一种或多种用于废物处理的单元方法，例如氧化，汽提，漂浮，消毒，调理，稳定化，增稠和脱水等。富含氢氧化合物的气体的至少一部分可以例如在用于焚烧或发电的可燃燃料源的废物处理系统中被输送用于第二次使用。

10. 发明授权

US07202514B2 Self aligned compact bipolar junction transistor layout and method of making same 有权
标题翻译：自对准紧凑型双极结晶体管布局及其制作方法
公开(公告)号：US07202514B2
公开(公告)日：2007-04-10
申请号：US10418395
申请日：2003-04-17
申请人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green , Anand Murthy
发明人： Shahriar Ahmed , Mark Bohr , Stephen Chambers , Richard Green , Anand Murthy
IPC分类号： H01L31/072
CPC分类号： H01L29/66287
摘要： The invention relates to a process of forming a bipolar junction transistor (BJT) that includes forming a topology over a substrate. Thereafter, a spacer is formed at the topology. A base layer is formed from epitaxial silicon above the spacer and at the topology. A leakage block structure is formed in the substrate by out-diffusion from the spacer. Thereafter a BJT is completed with the base layer and the spacer.
摘要翻译：本发明涉及一种形成双极结型晶体管（BJT）的方法，其包括在衬底上形成拓扑结构。此后，在拓扑形成间隔物。基底层由间隔物上方的外延硅和拓扑形成。通过从间隔物的扩散形成在衬底中的泄漏块结构。此后，BJT完成了基层和隔离层。

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