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1. 发明授权

US08549260B2 Apparatus for processing data and method for generating manipulated and re-manipulated configuration data for processor 有权
标题翻译：用于处理数据的装置和用于产生用于处理器的操纵和重新操纵的配置数据的方法
公开(公告)号：US08549260B2
公开(公告)日：2013-10-01
申请号：US12361965
申请日：2009-01-29
申请人： Steffen Marc Sonnekalb
发明人： Steffen Marc Sonnekalb
IPC分类号： G06F9/00
CPC分类号： G06F12/1416 , G06F21/75 , H04L9/002 , H04L2209/12 , H04L2209/34
摘要： Some embodiments comprise an apparatus for processing data, the apparatus having a second configurable processor configured to process data using second configuration data, and a configuration data re-manipulator configured to retrieve manipulated second configuration data and first data of a first processor, to re-manipulate the manipulated second configuration data depending on the first data, and to feed the re-manipulated second configuration data to the second configurable processor as the second configuration data.
摘要翻译：一些实施例包括用于处理数据的装置，该装置具有被配置为使用第二配置数据处理数据的第二可配置处理器，以及被配置为检索被操作的第二配置数据和第一处理器的第一数据的配置数据重新操纵器，根据第一数据操纵被处理的第二配置数据，并且将重新操作的第二配置数据作为第二配置数据提供给第二可配置处理器。

2. 发明授权

US07979783B2 Error detection device and method for error detection for a command decoder 有权
标题翻译：用于命令解码器的错误检测装置和错误检测方法
公开(公告)号：US07979783B2
公开(公告)日：2011-07-12
申请号：US11672652
申请日：2007-02-08
申请人： Michael Goessel , Franz Klug , Steffen Marc Sonnekalb
发明人： Michael Goessel , Franz Klug , Steffen Marc Sonnekalb
IPC分类号： G06F11/00 , G08C25/00 , H03M13/00 , H04L1/00
CPC分类号： G06F11/10
摘要： An error detection device for a command decoder is described, the command decoder reading out an associated sequence of control signal words from a command memory based on an input word, wherein the sequence of control signal words has at least one control signal word, having: a controller designed to provide the input word at a first time and the input word at a second time for reading out the command memory, wherein the second time is delayed with respect to the first time, to effect a readout of the sequence of control signal words at a first time and a readout of the sequence of control signal words at a second time; and a comparator designed to receive and compare the associated sequences of control signal words read out at the first and second times, and to output a signal indicating an error if the associated sequences of control signal words read out at the first and second times are different.
摘要翻译：描述了一种用于命令解码器的错误检测装置，命令解码器基于输入字从命令存储器中读出相关序列的控制信号字，其中控制信号字序列具有至少一个控制信号字，具有：控制器，其被设计为在第一时间提供输入字，并且输入字在第二时间用于读出指令存储器，其中第二时间相对于第一次被延迟，以实现控制信号序列的读出第一时间的字和读出控制信号字的序列; 以及比较器，用于接收和比较在第一次和第二次读出的控制信号字的相关序列，并且如果在第一次和第二次读出的相关序列的控制信号字不同，则输出指示错误的信号。

3. 发明授权

US08612777B2 Apparatus and method for writing data to be stored to a predetermined memory area 有权
标题翻译：将要存储的数据写入预定的存储区域的装置和方法
公开(公告)号：US08612777B2
公开(公告)日：2013-12-17
申请号：US12351151
申请日：2009-01-09
申请人： Steffen Marc Sonnekalb
发明人： Steffen Marc Sonnekalb
IPC分类号： G06F21/00
CPC分类号： G11C7/1006 , G06F11/1008 , G06F21/556 , G11C2029/0411
摘要： Method and apparatus for writing data to be stored to a predetermined memory area, the method comprising: reading stored data from the predetermined memory area, the stored data comprising a stored data block and an associated stored error detection value, manipulating, after reading the stored data, at least one of the stored data block and the associated stored error detection value in the predetermined memory area, and writing, after manipulating, the data to be stored to the predetermined memory area.
摘要翻译：用于将要存储的数据写入预定存储区域的方法和装置，所述方法包括：从所述预定存储区读取存储的数据，所述存储的数据包括存储的数据块和相关联的存储的错误检测值，数据，存储的数据块中的至少一个和预定存储区域中相关联的存储的错误检测值，并且在操纵将要存储的数据到预定存储区域之后进行写入。

4. 发明授权

US08199914B2 Detection of a change of the data of a dataset 有权
标题翻译：检测数据集的数据变化
公开(公告)号：US08199914B2
公开(公告)日：2012-06-12
申请号：US11480826
申请日：2006-07-06
申请人： Steffen Marc Sonnekalb
发明人： Steffen Marc Sonnekalb
IPC分类号： H04L9/00 , H04K1/04
CPC分类号： G06F11/1008 , G06F21/64
摘要： An undesired change of encrypted data words of a stored encrypted dataset may be concluded from the fact that redundancy information is associated with the data words of a dataset prior to encryption, wherein the redundancy information is also encrypted and stored at least partially together with the encrypted data words of the encrypted dataset as an encrypted redundancy data word. The change of the stored encrypted data words may be concluded from the fact that the decrypted data words resulting from decrypting the encrypted data words are used to form a new redundancy data word which is encrypted into a new encrypted redundancy data word. A comparison of the new encrypted redundancy data word to the encrypted redundancy data word enables to examine whether the encrypted data was changed.
摘要翻译：存储的加密数据集的加密数据字的不期望的改变可以从冗余信息与加密之前的数据集的数据字相关联的事实得出，其中冗余信息也被加密并且与加密的数据字一起被部分地存储加密数据集的数据字作为加密冗余数据字。存储的加密数据字的改变可以从以下事实得出：从解密加密数据字得到的解密数据字用于形成新的冗余数据字，该冗余数据字被加密成新的加密冗余数据字。新加密冗余数据字与加密冗余数据字的比较使得能够检查加密数据是否被改变。

5. 发明授权

US07870473B2 Error detection device for an address decoder, and device for error detection for an address decoder 有权
标题翻译：用于地址解码器的错误检测装置，以及用于地址解码器的错误检测装置
公开(公告)号：US07870473B2
公开(公告)日：2011-01-11
申请号：US11672638
申请日：2007-02-08
申请人： Michael Goessel , Franz Klug , Jorge Guajardo Merchan , Steffen Marc Sonnekalb
发明人： Michael Goessel , Franz Klug , Jorge Guajardo Merchan , Steffen Marc Sonnekalb
IPC分类号： G06F7/02 , H03M13/00
CPC分类号： G06F11/1016
摘要： An error detection device for an address decoder converting an input address to an associated output address out of a plurality of valid output addresses using a 1-out-of-n decoder, the error detection device including a regenerator for generating a regenerated address on the basis of the output address from the 1-out-of-n decoder, and a comparer for receiving the input address and the regenerated address and to output a signal, on the basis of a comparison of the input address and the regenerated address, which indicates an error in the conversion of the input address to the output address if the input address and the regenerated address do not match, and which indicates an error-free conversion of the input address to the output address if the input address equals the regenerated address.
摘要翻译：一种用于地址解码器的错误检测装置，其使用1-out-n解码器将多个有效输出地址中的输入地址转换为相关联的输出地址，所述错误检测装置包括：再生器，用于在基于1输出解码器的输出地址的基础，以及用于接收输入地址和再生地址并根据输入地址和再生地址的比较输出信号的比较器，其中如果输入地址和再生地址不匹配，则表示输入地址转换为输出地址的错误，如果输入地址等于重新生成的地址，则表示输入地址无误转换为输出地址。

6. 发明授权

US07240134B2 Circuit with processing prevention unit 有权
标题翻译：电路与加工预防单元
公开(公告)号：US07240134B2
公开(公告)日：2007-07-03
申请号：US10958182
申请日：2004-10-04
申请人： Franz Klug , Thomas Kunemund , Steffen Marc Sonnekalb
发明人： Franz Klug , Thomas Kunemund , Steffen Marc Sonnekalb
IPC分类号： H04L12/40 , H04L29/06 , G06F13/00 , G06F1/28 , G01R31/08
CPC分类号： G07F7/082 , G06F21/72 , G06F21/75 , G06F21/77 , G06F21/85 , G06Q20/341 , G06Q20/40975 , G07F7/1008 , H04L12/40032 , H04L12/403
摘要： Circuit having a bus, a first receiver circuit part coupled to the bus for processing a signal on the bus, a second receiver circuit part coupled to the bus for processing a signal on the bus, a transmitter circuit part coupled to the bus for outputting a signal on the bus, and a unit for preventing processing a signal on the bus by the first receiver circuit part in response to a control signal.
摘要翻译：具有总线的电路，耦合到总线的第一接收器电路部分，用于处理总线上的信号;耦合到总线的第二接收器电路部分，用于处理总线上的信号;耦合到总线的发射机电路部分，用于输出信号，以及用于响应于控制信号防止由第一接收器电路部分处理总线上的信号的单元。

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