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1. 发明授权

US06596980B2 Method and apparatus to measure statistical variation of electrical signal phase in integrated circuits using time-correlated photon counting 失效
标题翻译：使用时间相关光子计数来测量集成电路中电信号相位的统计变化的方法和装置
公开(公告)号：US06596980B2
公开(公告)日：2003-07-22
申请号：US09944240
申请日：2001-08-31
申请人： Stefan Rusu , Harry Muljono , Gary L. Woods , Jeremy A. Rowlette , Dean J. Grannes
发明人： Stefan Rusu , Harry Muljono , Gary L. Woods , Jeremy A. Rowlette , Dean J. Grannes
IPC分类号： H01L3100
CPC分类号： G01R31/31709 , G01R31/311
摘要： Time-correlated photon counting is used to measure integrated circuit (IC) performance related to signal jitter (such as clock jitter) in a manner that is non-invasive to the circuit or node of interest. The signal jitter is measured by counting photon emissions at various nodes of interest across a controlled collapse chip connect (C4) mounted die, without interfering with the normal operation of the circuit of interest. This increases the precision and accuracy of the measurement of signal jitter significantly, since small amounts of phase noise on a particular clock signal edge can be detected. The emitted photons can be detected and subsequently correlated to a precise time base to obtain a statistical spread of switching events in time. The range of the photon distribution can be used to reliably determine safe and reasonable timing guard bands for clock and data paths in an IC.
摘要翻译：时间相关光子计数用于以对感兴趣的电路或节点无创的方式测量与信号抖动（例如时钟抖动）相关的集成电路（IC）性能。通过在受控的崩溃芯片连接（C4）安装的管芯上计算感兴趣的各个节点处的光子发射来测量信号抖动，而不干扰感兴趣的电路的正常操作。这可以显着提高信号抖动测量的精度和精度，因为可以检测到特定时钟信号边沿上的少量相位噪声。发射的光子可以被检测并随后与精确的时基相关联，以及时获得切换事件的统计扩展。光子分布的范围可用于可靠地确定IC中时钟和数据路径的安全合理的定时保护带。

2. 发明授权

US06610605B2 Method and apparatus for fabricating encapsulated micro-channels in a substrate 失效
标题翻译：用于在衬底中制造封装的微通道的方法和装置
公开(公告)号：US06610605B2
公开(公告)日：2003-08-26
申请号：US09895128
申请日：2001-06-28
申请人： Jeremy A. Rowlette , Paul Winer
发明人： Jeremy A. Rowlette , Paul Winer
IPC分类号： H01L21311
CPC分类号： H01L33/00 , B81C1/00071 , H01L21/311 , H01L31/0328
摘要： A method for fabricating encapsulated micro-channels in a substrate is described. The method includes the formation of a thin film layer over an area of a substrate. Following the formation of the thin layer, a periodic array of access holes are formed within the thin film layer along dimensions of one or more desired micro-channels. Following formation of the access holes, the one or more micro-channels are formed, via the access holes, within an underlying layer of the substrate. Finally, the one or more micro-channels are encapsulated, thereby closing the one or more access holes along the dimensions of the desired micro-channels. Accordingly, the method is suitable in one context for rapid prototyping of micro-electromechanical systems in the areas of, for example, RF micro-systems, fluidic micro-systems and bio-fluidic applications. In addition, the method enables the rapid prototyping of integrated circuits.
摘要翻译：描述了在衬底中制造封装的微通道的方法。该方法包括在衬底的区域上形成薄膜层。在形成薄层之后，沿着一个或多个所需微通道的尺寸在薄膜层内形成周期性的存取孔阵列。在形成接入孔之后，通过接入孔在衬底的下层内形成一个或多个微通道。最后，一个或多个微通道被封装，从而沿着期望的微通道的尺寸闭合一个或多个访问孔。因此，该方法适用于在例如RF微系统，流体微系统和生物流体应用领域中的微机电系统的快速成型的一个上下文中。此外，该方法可以实现集成电路的快速原型设计。

3. 发明授权

US06621174B2 Apparatus for fabricating encapsulated micro-channels in a substrate 失效
公开(公告)号：US06621174B2
公开(公告)日：2003-09-16
申请号：US10196306
申请日：2002-07-15
申请人： Jeremy A. Rowlette , Paul Winer
发明人： Jeremy A. Rowlette , Paul Winer
IPC分类号： H01L2358
CPC分类号： H01L33/00 , B81C1/00071 , H01L21/311 , H01L31/0328
摘要： An apparatus for fabricating encapsulated micro-channels in a substrate is described. The apparatus includes the formation of a thin film layer over an area of a substrate. Following the formation of the thin layer, a periodic array of access windows are formed within the thin film layer along dimensions of one or more desired micro-channels. Following formation of the access windows, the one or more micro-channels are formed within an underlying layer of the substrate. Finally, the one or more micro-channels are encapsulated, thereby closing the one or more access windows along the dimensions of the desired micro-channels. Accordingly, the apparatus is suitable in one context for rapid prototyping of micro-electromechanical systems in the areas of, for example, RF micro-systems, fluidic micro-systems and bio-fluidic applications. In addition, the apparatus enables the rapid prototyping of integrated circuits.

4. 发明授权

US06882170B2 Device speed alteration by electron-hole pair injection and device heating 失效
标题翻译：通过电子 - 空穴对注入和器件加热改变器件速度
公开(公告)号：US06882170B2
公开(公告)日：2005-04-19
申请号：US10313933
申请日：2002-12-05
申请人： Travis Eiles , Jeremy A. Rowlette
发明人： Travis Eiles , Jeremy A. Rowlette
IPC分类号： G01R31/3161 , G01R31/26
CPC分类号： G01R31/3161
摘要： Integrated circuit and integrated circuit device diagnostic methods and apparatus in accordance with the present invention are provided. The IC is operated to produce an output marginally above a pass-fail threshold for a particular performance criteria. The IC is made to fail that criteria by inducing an electrical stress in an IC device that is of marginal design for that particular criteria. The electrical stress acts to minutely degrade the performance of the IC device driving the IC below the pass-fail threshold. When each IC device is stressed in accordance with the embodiments of the present invention, marginal IC devices are identified to enable the design to be modified. The induced electrical stress is non-destructive to the IC device and IC, which permits a repeatable diagnostic process, as well as allows for the diagnostic testing of other IC devices in the same microcircuit.
摘要翻译：提供了根据本发明的集成电路和集成电路设备诊断方法和装置。运行IC以产生略高于特定性能标准的通过失败阈值的输出。通过在针对该特定标准的边缘设计的IC器件中引起电应力来使IC失效。电应力微小地降低驱动IC的IC器件的性能，低于通过失败阈值。当根据本发明的实施例对每个IC器件进行应力时，识别边缘IC器件使得能够修改该设计。感应电应力对IC器件和IC是非破坏性的，这允许可重复的诊断过程，并且允许在同一微电路中对其它IC器件进行诊断测试。

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