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1. 发明授权

US5744284A Method for fabricating resilient z-axis contacts for electrically interconnecting integrated circuits on a plurality of stacked carriers 失效
标题翻译：用于制造用于将多个堆叠载体上的集成电路电连接的弹性z轴接触件的方法
公开(公告)号：US5744284A
公开(公告)日：1998-04-28
申请号：US835627
申请日：1997-04-09
申请人： Soyeon P. Laub , Michael J. Little , James A. Foschaar , Hugh L. Garvin , Michael W. Yung
发明人： Soyeon P. Laub , Michael J. Little , James A. Foschaar , Hugh L. Garvin , Michael W. Yung
IPC分类号： G03F7/00 , H01L21/48 , H01L21/98 , H01L23/498 , H05K3/40 , G03F7/26
CPC分类号： H01L25/50 , G03F7/00 , H01L21/4853 , H01L23/49811 , H01L24/01 , H05K3/4092 , H01L2224/16 , H01L2924/09701 , H01L2924/14
摘要： A method for fabricating resilient z-axis contacts to electrically interconnect IC wafers or MCMs in 3-D integrated circuits uses photolithography to provide larger carrier sizes, higher contact densities by decreasing the spacing, smaller contact footpads, and precise control of the contact's shape and position. The contacts are fabricated by forming photoresist patterns on the carrier's top and bottom surfaces that are initially rectangular, and then reflowing the photoresist materials to provide smooth surfaces suitable for forming the metal contacts, and depositing metal layers over the respective patterns. Second photoresist patterns are formed over respective metal layers to conform with the contact's shape, the metal is etched away according to the pattern, and the photoresists are removed such that the remaining metalization forms a resilient z-axis contact that is attached to the carrier and extends therefrom with a predetermined shape.
摘要翻译：用于制造弹性z轴接触以在3-D集成电路中电连接IC晶片或MCM的方法使用光刻法通过减小间隔，较小的接触脚垫和接触件形状的精确控制来提供更大的载体尺寸，更高的接触密度，位置。通过在最初为矩形的载体的顶部和底部表面上形成光致抗蚀剂图案，然后回流光致抗蚀剂材料以提供适合于形成金属接触的光滑表面，以及在相应的图案上沉积金属层来制造触点。在相应的金属层上形成第二光致抗蚀剂图案以符合接触件的形状，根据图案将金属蚀刻掉，并且除去光致抗蚀剂，使得剩余的金属化形成连接到载体的弹性z轴接触，以预定的形状从其延伸。

2. 发明授权

US09407239B2 Wide bandwidth automatic tuning circuit 有权
标题翻译：宽带宽自动调谐电路
公开(公告)号：US09407239B2
公开(公告)日：2016-08-02
申请号：US13472396
申请日：2012-05-15
申请人： Carson R. White , Joseph S. Colburn , Michael W. Yung , Donald A. Hitko
发明人： Carson R. White , Joseph S. Colburn , Michael W. Yung , Donald A. Hitko
IPC分类号： H03H7/40 , H03H11/30
CPC分类号： H03H11/30 , H03H7/40
摘要： An automatic tuning circuit for matching an antenna to a radio receiver. The automatic tuning circuit includes a tunable non-Foster circuit for coupling the receiver and the antenna; and sensing and feedback circuits for sensing the combined capacitance of the tunable non-Foster circuit and the antenna and for tuning the tunable non-Foster circuit to automatically minimize the combined capacitance of the tunable non-Foster circuit and the antenna.
摘要翻译：一种用于将天线与无线电接收机相匹配的自动调谐电路。自动调谐电路包括用于耦合接收器和天线的可调谐非福斯特电路; 以及感测和反馈电路，用于感测可调谐非福斯特电路和天线的组合电容，并用于调谐可调谐非福斯特电路，以自动最小化可调谐非福斯特电路和天线的组合电容。

3. 发明申请

US20120256709A1 Differential negative impedance converters and inverters with variable or tunable conversion ratios 有权
标题翻译：差分负阻抗变换器和具有可变或可调谐转换比的逆变器
公开(公告)号：US20120256709A1
公开(公告)日：2012-10-11
申请号：US13441730
申请日：2012-04-06
申请人： Donald A. Hitko , Carson R. White , Michael W. Yung , David S. Matthews , Susan L. Morton , Jason W. May , Joseph S. Colburn
发明人： Donald A. Hitko , Carson R. White , Michael W. Yung , David S. Matthews , Susan L. Morton , Jason W. May , Joseph S. Colburn
IPC分类号： H03H11/44
CPC分类号： H03H11/10 , H03F1/56 , H03F2200/369 , H03H11/44 , H03H11/48 , H04B1/0458 , H04B1/18
摘要： A differential circuit topology that produces a tunable floating negative inductance, negative capacitance, negative resistance/conductance, or a combination of the three. These circuits are commonly referred to as “non-Foster circuits.” The disclosed embodiments of the circuits comprises two differential pairs of transistors that are cross-coupled, a load immittance, multiple current sources, two Common-Mode FeedBack (CMFB) networks, at least one tunable (variable) resistance, and two terminals across which the desired immittance is present. The disclosed embodiments of the circuits may be configured as either a Negative Impedance Inverter (NII) or a Negative Impedance Converter (NIC) and as either Open-Circuit-Stable (OCS) and Short-Circuit-Stable (SCS).
摘要翻译：差分电路拓扑产生可调浮动负电感，负电容，负电阻/电导或三者的组合。这些电路通常被称为非福斯特电路。所公开的电路实施例包括交叉耦合的两个差分对晶体管，负载导纳，多个电流源，两个共模反馈（CMFB）网络，至少一个可调谐（可变）电阻和两个终端存在所需的导纳。所公开的电路实施例可以被配置为负阻抗逆变器（NII）或负阻抗转换器（NIC）以及作为开路稳定（OCS）和短路稳定（SCS）。

4. 发明申请

US20130009722A1 WIDE BANDWIDTH AUTOMATIC TUNING CIRCUIT 有权
公开(公告)号：US20130009722A1
公开(公告)日：2013-01-10
申请号：US13472396
申请日：2012-05-15
申请人： Carson R. White , Joseph S. Colburn , Michael W. Yung , Donald A. Hitko
发明人： Carson R. White , Joseph S. Colburn , Michael W. Yung , Donald A. Hitko
IPC分类号： H03H7/40 , H01Q1/50
CPC分类号： H03H11/30 , H03H7/40
摘要： An automatic tuning circuit for matching an antenna to a radio receiver. The automatic tuning circuit includes a tunable non-Foster circuit for coupling the receiver and the antenna; and sensing and feedback circuits for sensing the combined capacitance of the tunable non-Foster circuit and the antenna and for tuning the tunable non-Foster circuit to automatically minimize the combined capacitance of the tunable non-Foster circuit and the antenna.

5. 发明授权

US5371744A System and method for enumerating all acyclic paths in a processing system for reconfiguration and fault tolerance 失效
标题翻译：用于枚举处理系统中所有非循环路径的系统和方法，用于重新配置和容错
公开(公告)号：US5371744A
公开(公告)日：1994-12-06
申请号：US855401
申请日：1992-03-23
申请人： Michael L. Campbell , Michael W. Yung
发明人： Michael L. Campbell , Michael W. Yung
IPC分类号： G06F11/00 , G06F15/173 , G06F13/00
CPC分类号： G06F11/2007 , G06F15/17343 , G06F11/202
摘要： A system (30) and method is provided for enumerating acyclic paths in an information processing system. The system (30) incorporates multiple processor nodes (18) or functional units interconnected by point-to-point links (20). The hardware of the information processor is represented as a mixed graph with graph nodes (32) for processors and with graph edges (34) representing communication links (20). All the useful paths from the source nodes of the data to the destination nodes of the data are determined in accordance with the system and method of the present invention. These paths are then stored as a list in a table indexed by the source and destination nodes. Thus, when the need for a interprocessor communication path arises, the table can be consulted to find a permissible path. The system (30) efficiently performs interprocessor communication routing and can be utilized in real time.
摘要翻译：提供了一种在信息处理系统中枚举非循环路径的系统（30）和方法。系统（30）包括通过点对点链路（20）互连的多个处理器节点（18）或功能单元。信息处理器的硬件被表示为具有用于处理器的图形节点（32）和表示通信链路（20）的图形边缘（34）的混合图形。根据本发明的系统和方法确定从数据的源节点到数据的目标节点的所有有用的路径。然后，这些路径作为列表存储在由源节点和目标节点索引的表中。因此，当需要处理器间通信路径时，可以查看表以找到允许的路径。系统（30）有效地执行处理器间通信路由，并可实时使用。

6. 发明授权

US5274264A Defect tolerant power distribution network and method for integrated circuits 失效
标题翻译：集成电路缺陷容错配电网络及方法
公开(公告)号：US5274264A
公开(公告)日：1993-12-28
申请号：US626645
申请日：1990-12-12
申请人： Michael W. Yung
发明人： Michael W. Yung
IPC分类号： H01L21/66 , H01L21/82 , H01L23/525 , H03K19/003 , H01L27/02 , H01L23/48 , H01L27/10
CPC分类号： H01L22/22 , H01L23/5258 , H01L2924/0002 , H01L2924/3011 , Y10S257/92
摘要： Short circuits in the power distribution network of a circuit structure are accurately located and isolated by providing selected power distribution lines with areas whose width is reduced sufficiently to produce a highly resolved current-induced hot spot in response to a downstream short circuit. The invention is particularly applicable to crossovers of power distribution lines separated by an insulating layer. The upper line is divided into a plurality of spaced parallel channels in the crossover vicinity. The channels each include areas of further reduced width at their opposite ends, preferably outside of but proximate to the crossover area, where the hot spots are formed. A short circuit on any of the channels is isolated by cutting at the areas of further reduced width on either side of the fault. Terminal lines of the power distribution network can also be provided with areas of reduced width proximate to the global power distribution line from which they are supplied; these areas form a hot spot in response to a short circuit on the terminal line, and can be cut to isolate the terminal line. Low level faults can be detected with a high degree of resolution and very small space requirements.

7. 发明授权

US4908525A Cut-only CMOS switch for discretionary connect and disconnect 失效
标题翻译：切断式CMOS开关可自由连接和断开
公开(公告)号：US4908525A
公开(公告)日：1990-03-13
申请号：US307372
申请日：1989-02-03
申请人： Michael W. Yung
发明人： Michael W. Yung
IPC分类号： G11C29/00 , H01L27/118 , H03K17/22 , H03K17/687 , H03K17/693
CPC分类号： H03K17/6872 , G11C29/006 , H01L27/118 , H03K17/223 , H03K17/693
摘要： To provide for improving the yield in the manufacture of wafer-scale integrated (WSI) or restructurable very-large-scale integrated (RVLSI) CMOS circuitry, a low power switch circuit, fabricated with standard CMOS process, provides both discretionary disconnect and connect capability, by a simple cut of one metal line to replace defective components with redundant good ones. The circuit uses either a reverse bias p-n junction or a transistor biased for sub-threshold conduction as a "pull-up" device, hence consuming very little power in either the original or the "cut" state. Large numbers of this switch can be incorporated into complex circuits without significantly loading the power supply.
摘要翻译：为了提高晶片级集成（WSI）或可重构的大规模集成（RVLSI）CMOS电路的制造中的产量，采用标准CMOS工艺制造的低功率开关电路可提供任意断开和连接能力通过一个金属线的简单切割来代替有缺陷的部件与冗余的好的。该电路使用反向偏置p-n结或用于子阈值导通的晶体管作为“上拉”器件，因此在原始或“切断”状态下消耗很少的功率。大量的这种开关可以并入复杂的电路中，而不会明显地加载电源。

8. 发明授权

US08988173B2 Differential negative impedance converters and inverters with variable or tunable conversion ratios 有权
标题翻译：差分负阻抗变换器和具有可变或可调谐转换比的逆变器
公开(公告)号：US08988173B2
公开(公告)日：2015-03-24
申请号：US13441730
申请日：2012-04-06
申请人： Donald A. Hitko , Carson R. White , Michael W. Yung , David S. Matthews , Susan L. Morton , Jason W. May , Joseph S. Colburn
发明人： Donald A. Hitko , Carson R. White , Michael W. Yung , David S. Matthews , Susan L. Morton , Jason W. May , Joseph S. Colburn
IPC分类号： H03H11/10 , H03H11/48
CPC分类号： H03H11/10 , H03F1/56 , H03F2200/369 , H03H11/44 , H03H11/48 , H04B1/0458 , H04B1/18
摘要： A differential circuit topology that produces a tunable floating negative inductance, negative capacitance, negative resistance/conductance, or a combination of the three. These circuits are commonly referred to as “non-Foster circuits.” The disclosed embodiments of the circuits comprises two differential pairs of transistors that are cross-coupled, a load immittance, multiple current sources, two Common-Mode FeedBack (CMFB) networks, at least one tunable (variable) resistance, and two terminals across which the desired immittance is present. The disclosed embodiments of the circuits may be configured as either a Negative Impedance Inverter (NII) or a Negative Impedance Converter (NIC) and as either Open-Circuit-Stable (OCS) and Short-Circuit-Stable (SCS).
摘要翻译：差分电路拓扑产生可调浮动负电感，负电容，负电阻/电导或三者的组合。这些电路通常被称为“非福斯特电路”。所公开的电路实施例包括交叉耦合的两个差分对晶体管，负载导纳，多个电流源，两个共模反馈（CMFB）网络，至少一个可调谐（可变）电阻，以及两个端子，跨过其中存在所需的导纳。所公开的电路实施例可以被配置为负阻抗逆变器（NII）或负阻抗转换器（NIC）以及作为开路稳定（OCS）和短路稳定（SCS）。

9. 发明授权

US09054798B2 Non-foster circuit stabilization method 有权
标题翻译：非养护电路稳定方法
公开(公告)号：US09054798B2
公开(公告)日：2015-06-09
申请号：US13542654
申请日：2012-07-05
申请人： Zhiwei Xu , Michael W. Yung , Donald A. Hitko , Carson R. White
发明人： Zhiwei Xu , Michael W. Yung , Donald A. Hitko , Carson R. White
IPC分类号： H03H7/38 , H04B1/10 , H04B1/04
CPC分类号： H04B17/104 , H03H11/30 , H03H11/44 , H04B1/0458 , H04B17/345
摘要： A method of and circuit for improving stabilization of a non-Foster circuit. The method comprises steps of and the circuit includes means for measuring a noise hump power at an antenna port or an output port of the non-Foster circuit, comparing the measured noise hump power with a desired level of noise power that corresponds to a desired operating state of the non-Foster circuit, and tuning the non-Foster circuit to generate the desired level of noise power to achieve the desired operating state of the non-Foster circuit.
摘要翻译：一种用于改善非福斯特电路稳定性的方法和电路。该方法包括以下步骤，并且电路包括用于测量非福斯特电路的天线端口或输出端口处的噪声驼峰功率的装置，将测得的噪声驼峰功率与对应于所需操作的期望噪声功率水平进行比较非福斯特电路的状态，以及调谐非福斯特电路以产生期望的噪声功率水平以实现非福斯特电路的期望工作状态。

10. 发明授权

US08374561B1 Non-foster impedance power amplifier 有权
标题翻译：非阻抗功率放大器
公开(公告)号：US08374561B1
公开(公告)日：2013-02-12
申请号：US12768563
申请日：2010-04-27
申请人： Michael W. Yung , Donald A. Hitko
发明人： Michael W. Yung , Donald A. Hitko
IPC分类号： H04B1/04
CPC分类号： H04B1/0458
摘要： A non-Foster impedance power amplifier has a current amplifying device coupled in either an emitter-follower or source-follower configuration with a reactive load such as an antenna load. A negative impedance circuit is provided upstream of a gate or base or other control element of said current amplifying device.
摘要翻译：非福斯特阻抗功率放大器具有以射极跟随器或源跟随器配置耦合的电流放大器件以及诸如天线负载的无功负载。在所述电流放大装置的栅极或基极或其它控制元件的上游设置负阻抗电路。

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