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    • 4. 发明申请
    • GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME
    • 闸门驱动电路和显示装置
    • US20100177082A1
    • 2010-07-15
    • US12534403
    • 2009-08-03
    • Soong-Yong JooHyoung-Sik MoonDong-Yub Lee
    • Soong-Yong JooHyoung-Sik MoonDong-Yub Lee
    • G09G5/00G09G3/36
    • G09G3/3677G09G2310/0286G11C19/28
    • A gate driving circuit includes a shift register in which the stages are connected to each other one after another. An m-th stage includes a pull-up section outputting a high voltage of a first clock signal as a gate signal in response to a voltage of a first node, a pull-down section pulling down the gate signal to an off voltage in response to the first clock signal or the second clock signal, a driving section turning on and turning off the pull-up section and a holding section maintaining a voltage of the first node at the off voltage in response to the first clock signal, and a voltage maintenance section blocking a leakage current through the pull-up driving section and the holding section during an output interval of the gate signal to delay a voltage drop of the first node.
    • 门驱动电路包括一个移位寄存器,其中各级相继连接。 第m级包括响应于第一节点的电压而输出第一时钟信号的高电压作为栅极信号的上拉部分,响应于将该栅极信号拉低至截止电压的下拉部分 第一时钟信号或第二时钟信号,驱动部分接通和断开上拉部分,以及保持部分,响应于第一时钟信号将第一节点的电压保持在截止电压,并且电压 维护部分在栅极信号的输出间隔期间阻断通过上拉驱动部分和保持部分的漏电流,以延迟第一节点的电压降。